1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 static int __i3c_first_dynamic_bus_num; 25 26 /** 27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 28 * @bus: I3C bus to take the lock on 29 * 30 * This function takes the bus lock so that no other operations can occur on 31 * the bus. This is needed for all kind of bus maintenance operation, like 32 * - enabling/disabling slave events 33 * - re-triggering DAA 34 * - changing the dynamic address of a device 35 * - relinquishing mastership 36 * - ... 37 * 38 * The reason for this kind of locking is that we don't want drivers and core 39 * logic to rely on I3C device information that could be changed behind their 40 * back. 41 */ 42 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 43 { 44 down_write(&bus->lock); 45 } 46 47 /** 48 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 49 * operation 50 * @bus: I3C bus to release the lock on 51 * 52 * Should be called when the bus maintenance operation is done. See 53 * i3c_bus_maintenance_lock() for more details on what these maintenance 54 * operations are. 55 */ 56 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 57 { 58 up_write(&bus->lock); 59 } 60 61 /** 62 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 63 * @bus: I3C bus to take the lock on 64 * 65 * This function takes the bus lock for any operation that is not a maintenance 66 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 67 * maintenance operations). Basically all communications with I3C devices are 68 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 69 * state or I3C dynamic address). 70 * 71 * Note that this lock is not guaranteeing serialization of normal operations. 72 * In other words, transfer requests passed to the I3C master can be submitted 73 * in parallel and I3C master drivers have to use their own locking to make 74 * sure two different communications are not inter-mixed, or access to the 75 * output/input queue is not done while the engine is busy. 76 */ 77 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 78 { 79 down_read(&bus->lock); 80 } 81 82 /** 83 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 84 * @bus: I3C bus to release the lock on 85 * 86 * Should be called when a normal operation is done. See 87 * i3c_bus_normaluse_lock() for more details on what these normal operations 88 * are. 89 */ 90 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 91 { 92 up_read(&bus->lock); 93 } 94 95 static struct i3c_master_controller * 96 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 97 { 98 return container_of(i3cbus, struct i3c_master_controller, bus); 99 } 100 101 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 102 { 103 return container_of(dev, struct i3c_master_controller, dev); 104 } 105 106 static const struct device_type i3c_device_type; 107 108 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 109 { 110 struct i3c_master_controller *master; 111 112 if (dev->type == &i3c_device_type) 113 return dev_to_i3cdev(dev)->bus; 114 115 master = dev_to_i3cmaster(dev); 116 117 return &master->bus; 118 } 119 120 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 121 { 122 struct i3c_master_controller *master; 123 124 if (dev->type == &i3c_device_type) 125 return dev_to_i3cdev(dev)->desc; 126 127 master = dev_to_i3cmaster(dev); 128 129 return master->this; 130 } 131 132 static ssize_t bcr_show(struct device *dev, 133 struct device_attribute *da, 134 char *buf) 135 { 136 struct i3c_bus *bus = dev_to_i3cbus(dev); 137 struct i3c_dev_desc *desc; 138 ssize_t ret; 139 140 i3c_bus_normaluse_lock(bus); 141 desc = dev_to_i3cdesc(dev); 142 ret = sprintf(buf, "%x\n", desc->info.bcr); 143 i3c_bus_normaluse_unlock(bus); 144 145 return ret; 146 } 147 static DEVICE_ATTR_RO(bcr); 148 149 static ssize_t dcr_show(struct device *dev, 150 struct device_attribute *da, 151 char *buf) 152 { 153 struct i3c_bus *bus = dev_to_i3cbus(dev); 154 struct i3c_dev_desc *desc; 155 ssize_t ret; 156 157 i3c_bus_normaluse_lock(bus); 158 desc = dev_to_i3cdesc(dev); 159 ret = sprintf(buf, "%x\n", desc->info.dcr); 160 i3c_bus_normaluse_unlock(bus); 161 162 return ret; 163 } 164 static DEVICE_ATTR_RO(dcr); 165 166 static ssize_t pid_show(struct device *dev, 167 struct device_attribute *da, 168 char *buf) 169 { 170 struct i3c_bus *bus = dev_to_i3cbus(dev); 171 struct i3c_dev_desc *desc; 172 ssize_t ret; 173 174 i3c_bus_normaluse_lock(bus); 175 desc = dev_to_i3cdesc(dev); 176 ret = sprintf(buf, "%llx\n", desc->info.pid); 177 i3c_bus_normaluse_unlock(bus); 178 179 return ret; 180 } 181 static DEVICE_ATTR_RO(pid); 182 183 static ssize_t dynamic_address_show(struct device *dev, 184 struct device_attribute *da, 185 char *buf) 186 { 187 struct i3c_bus *bus = dev_to_i3cbus(dev); 188 struct i3c_dev_desc *desc; 189 ssize_t ret; 190 191 i3c_bus_normaluse_lock(bus); 192 desc = dev_to_i3cdesc(dev); 193 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 194 i3c_bus_normaluse_unlock(bus); 195 196 return ret; 197 } 198 static DEVICE_ATTR_RO(dynamic_address); 199 200 static const char * const hdrcap_strings[] = { 201 "hdr-ddr", "hdr-tsp", "hdr-tsl", 202 }; 203 204 static ssize_t hdrcap_show(struct device *dev, 205 struct device_attribute *da, 206 char *buf) 207 { 208 struct i3c_bus *bus = dev_to_i3cbus(dev); 209 struct i3c_dev_desc *desc; 210 ssize_t offset = 0, ret; 211 unsigned long caps; 212 int mode; 213 214 i3c_bus_normaluse_lock(bus); 215 desc = dev_to_i3cdesc(dev); 216 caps = desc->info.hdr_cap; 217 for_each_set_bit(mode, &caps, 8) { 218 if (mode >= ARRAY_SIZE(hdrcap_strings)) 219 break; 220 221 if (!hdrcap_strings[mode]) 222 continue; 223 224 ret = sprintf(buf + offset, offset ? " %s" : "%s", 225 hdrcap_strings[mode]); 226 if (ret < 0) 227 goto out; 228 229 offset += ret; 230 } 231 232 ret = sprintf(buf + offset, "\n"); 233 if (ret < 0) 234 goto out; 235 236 ret = offset + ret; 237 238 out: 239 i3c_bus_normaluse_unlock(bus); 240 241 return ret; 242 } 243 static DEVICE_ATTR_RO(hdrcap); 244 245 static ssize_t modalias_show(struct device *dev, 246 struct device_attribute *da, char *buf) 247 { 248 struct i3c_device *i3c = dev_to_i3cdev(dev); 249 struct i3c_device_info devinfo; 250 u16 manuf, part, ext; 251 252 i3c_device_get_info(i3c, &devinfo); 253 manuf = I3C_PID_MANUF_ID(devinfo.pid); 254 part = I3C_PID_PART_ID(devinfo.pid); 255 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 256 257 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 258 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 259 manuf); 260 261 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 262 devinfo.dcr, manuf, part, ext); 263 } 264 static DEVICE_ATTR_RO(modalias); 265 266 static struct attribute *i3c_device_attrs[] = { 267 &dev_attr_bcr.attr, 268 &dev_attr_dcr.attr, 269 &dev_attr_pid.attr, 270 &dev_attr_dynamic_address.attr, 271 &dev_attr_hdrcap.attr, 272 &dev_attr_modalias.attr, 273 NULL, 274 }; 275 ATTRIBUTE_GROUPS(i3c_device); 276 277 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 278 { 279 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 280 struct i3c_device_info devinfo; 281 u16 manuf, part, ext; 282 283 i3c_device_get_info(i3cdev, &devinfo); 284 manuf = I3C_PID_MANUF_ID(devinfo.pid); 285 part = I3C_PID_PART_ID(devinfo.pid); 286 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 287 288 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 289 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 290 devinfo.dcr, manuf); 291 292 return add_uevent_var(env, 293 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 294 devinfo.dcr, manuf, part, ext); 295 } 296 297 static const struct device_type i3c_device_type = { 298 .groups = i3c_device_groups, 299 .uevent = i3c_device_uevent, 300 }; 301 302 static int i3c_device_match(struct device *dev, struct device_driver *drv) 303 { 304 struct i3c_device *i3cdev; 305 struct i3c_driver *i3cdrv; 306 307 if (dev->type != &i3c_device_type) 308 return 0; 309 310 i3cdev = dev_to_i3cdev(dev); 311 i3cdrv = drv_to_i3cdrv(drv); 312 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 313 return 1; 314 315 return 0; 316 } 317 318 static int i3c_device_probe(struct device *dev) 319 { 320 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 321 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 322 323 return driver->probe(i3cdev); 324 } 325 326 static void i3c_device_remove(struct device *dev) 327 { 328 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 329 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 330 331 if (driver->remove) 332 driver->remove(i3cdev); 333 334 i3c_device_free_ibi(i3cdev); 335 } 336 337 struct bus_type i3c_bus_type = { 338 .name = "i3c", 339 .match = i3c_device_match, 340 .probe = i3c_device_probe, 341 .remove = i3c_device_remove, 342 }; 343 344 static enum i3c_addr_slot_status 345 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 346 { 347 unsigned long status; 348 int bitpos = addr * 2; 349 350 if (addr > I2C_MAX_ADDR) 351 return I3C_ADDR_SLOT_RSVD; 352 353 status = bus->addrslots[bitpos / BITS_PER_LONG]; 354 status >>= bitpos % BITS_PER_LONG; 355 356 return status & I3C_ADDR_SLOT_STATUS_MASK; 357 } 358 359 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 360 enum i3c_addr_slot_status status) 361 { 362 int bitpos = addr * 2; 363 unsigned long *ptr; 364 365 if (addr > I2C_MAX_ADDR) 366 return; 367 368 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 369 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 370 (bitpos % BITS_PER_LONG)); 371 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 372 } 373 374 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 375 { 376 enum i3c_addr_slot_status status; 377 378 status = i3c_bus_get_addr_slot_status(bus, addr); 379 380 return status == I3C_ADDR_SLOT_FREE; 381 } 382 383 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 384 { 385 enum i3c_addr_slot_status status; 386 u8 addr; 387 388 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 389 status = i3c_bus_get_addr_slot_status(bus, addr); 390 if (status == I3C_ADDR_SLOT_FREE) 391 return addr; 392 } 393 394 return -ENOMEM; 395 } 396 397 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 398 { 399 int i; 400 401 /* Addresses 0 to 7 are reserved. */ 402 for (i = 0; i < 8; i++) 403 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 404 405 /* 406 * Reserve broadcast address and all addresses that might collide 407 * with the broadcast address when facing a single bit error. 408 */ 409 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 410 I3C_ADDR_SLOT_RSVD); 411 for (i = 0; i < 7; i++) 412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 413 I3C_ADDR_SLOT_RSVD); 414 } 415 416 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 417 { 418 mutex_lock(&i3c_core_lock); 419 idr_remove(&i3c_bus_idr, i3cbus->id); 420 mutex_unlock(&i3c_core_lock); 421 } 422 423 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 424 { 425 int ret, start, end, id = -1; 426 427 init_rwsem(&i3cbus->lock); 428 INIT_LIST_HEAD(&i3cbus->devs.i2c); 429 INIT_LIST_HEAD(&i3cbus->devs.i3c); 430 i3c_bus_init_addrslots(i3cbus); 431 i3cbus->mode = I3C_BUS_MODE_PURE; 432 433 if (np) 434 id = of_alias_get_id(np, "i3c"); 435 436 mutex_lock(&i3c_core_lock); 437 if (id >= 0) { 438 start = id; 439 end = start + 1; 440 } else { 441 start = __i3c_first_dynamic_bus_num; 442 end = 0; 443 } 444 445 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 446 mutex_unlock(&i3c_core_lock); 447 448 if (ret < 0) 449 return ret; 450 451 i3cbus->id = ret; 452 453 return 0; 454 } 455 456 static const char * const i3c_bus_mode_strings[] = { 457 [I3C_BUS_MODE_PURE] = "pure", 458 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 459 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 460 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 461 }; 462 463 static ssize_t mode_show(struct device *dev, 464 struct device_attribute *da, 465 char *buf) 466 { 467 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 468 ssize_t ret; 469 470 i3c_bus_normaluse_lock(i3cbus); 471 if (i3cbus->mode < 0 || 472 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 473 !i3c_bus_mode_strings[i3cbus->mode]) 474 ret = sprintf(buf, "unknown\n"); 475 else 476 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 477 i3c_bus_normaluse_unlock(i3cbus); 478 479 return ret; 480 } 481 static DEVICE_ATTR_RO(mode); 482 483 static ssize_t current_master_show(struct device *dev, 484 struct device_attribute *da, 485 char *buf) 486 { 487 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 488 ssize_t ret; 489 490 i3c_bus_normaluse_lock(i3cbus); 491 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 492 i3cbus->cur_master->info.pid); 493 i3c_bus_normaluse_unlock(i3cbus); 494 495 return ret; 496 } 497 static DEVICE_ATTR_RO(current_master); 498 499 static ssize_t i3c_scl_frequency_show(struct device *dev, 500 struct device_attribute *da, 501 char *buf) 502 { 503 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 504 ssize_t ret; 505 506 i3c_bus_normaluse_lock(i3cbus); 507 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 508 i3c_bus_normaluse_unlock(i3cbus); 509 510 return ret; 511 } 512 static DEVICE_ATTR_RO(i3c_scl_frequency); 513 514 static ssize_t i2c_scl_frequency_show(struct device *dev, 515 struct device_attribute *da, 516 char *buf) 517 { 518 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 519 ssize_t ret; 520 521 i3c_bus_normaluse_lock(i3cbus); 522 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 523 i3c_bus_normaluse_unlock(i3cbus); 524 525 return ret; 526 } 527 static DEVICE_ATTR_RO(i2c_scl_frequency); 528 529 static struct attribute *i3c_masterdev_attrs[] = { 530 &dev_attr_mode.attr, 531 &dev_attr_current_master.attr, 532 &dev_attr_i3c_scl_frequency.attr, 533 &dev_attr_i2c_scl_frequency.attr, 534 &dev_attr_bcr.attr, 535 &dev_attr_dcr.attr, 536 &dev_attr_pid.attr, 537 &dev_attr_dynamic_address.attr, 538 &dev_attr_hdrcap.attr, 539 NULL, 540 }; 541 ATTRIBUTE_GROUPS(i3c_masterdev); 542 543 static void i3c_masterdev_release(struct device *dev) 544 { 545 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 546 struct i3c_bus *bus = dev_to_i3cbus(dev); 547 548 if (master->wq) 549 destroy_workqueue(master->wq); 550 551 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 552 i3c_bus_cleanup(bus); 553 554 of_node_put(dev->of_node); 555 } 556 557 static const struct device_type i3c_masterdev_type = { 558 .groups = i3c_masterdev_groups, 559 }; 560 561 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 562 unsigned long max_i2c_scl_rate) 563 { 564 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 565 566 i3cbus->mode = mode; 567 568 switch (i3cbus->mode) { 569 case I3C_BUS_MODE_PURE: 570 if (!i3cbus->scl_rate.i3c) 571 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 572 break; 573 case I3C_BUS_MODE_MIXED_FAST: 574 case I3C_BUS_MODE_MIXED_LIMITED: 575 if (!i3cbus->scl_rate.i3c) 576 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 577 if (!i3cbus->scl_rate.i2c) 578 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 579 break; 580 case I3C_BUS_MODE_MIXED_SLOW: 581 if (!i3cbus->scl_rate.i2c) 582 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 583 if (!i3cbus->scl_rate.i3c || 584 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 585 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 586 break; 587 default: 588 return -EINVAL; 589 } 590 591 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 592 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 593 594 /* 595 * I3C/I2C frequency may have been overridden, check that user-provided 596 * values are not exceeding max possible frequency. 597 */ 598 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 599 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 600 return -EINVAL; 601 602 return 0; 603 } 604 605 static struct i3c_master_controller * 606 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 607 { 608 return container_of(adap, struct i3c_master_controller, i2c); 609 } 610 611 static struct i2c_adapter * 612 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 613 { 614 return &master->i2c; 615 } 616 617 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 618 { 619 kfree(dev); 620 } 621 622 static struct i2c_dev_desc * 623 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 624 u16 addr, u8 lvr) 625 { 626 struct i2c_dev_desc *dev; 627 628 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 629 if (!dev) 630 return ERR_PTR(-ENOMEM); 631 632 dev->common.master = master; 633 dev->addr = addr; 634 dev->lvr = lvr; 635 636 return dev; 637 } 638 639 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 640 u16 payloadlen) 641 { 642 dest->addr = addr; 643 dest->payload.len = payloadlen; 644 if (payloadlen) 645 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 646 else 647 dest->payload.data = NULL; 648 649 return dest->payload.data; 650 } 651 652 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 653 { 654 kfree(dest->payload.data); 655 } 656 657 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 658 struct i3c_ccc_cmd_dest *dests, 659 unsigned int ndests) 660 { 661 cmd->rnw = rnw ? 1 : 0; 662 cmd->id = id; 663 cmd->dests = dests; 664 cmd->ndests = ndests; 665 cmd->err = I3C_ERROR_UNKNOWN; 666 } 667 668 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 669 struct i3c_ccc_cmd *cmd) 670 { 671 int ret; 672 673 if (!cmd || !master) 674 return -EINVAL; 675 676 if (WARN_ON(master->init_done && 677 !rwsem_is_locked(&master->bus.lock))) 678 return -EINVAL; 679 680 if (!master->ops->send_ccc_cmd) 681 return -ENOTSUPP; 682 683 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 684 return -EINVAL; 685 686 if (master->ops->supports_ccc_cmd && 687 !master->ops->supports_ccc_cmd(master, cmd)) 688 return -ENOTSUPP; 689 690 ret = master->ops->send_ccc_cmd(master, cmd); 691 if (ret) { 692 if (cmd->err != I3C_ERROR_UNKNOWN) 693 return cmd->err; 694 695 return ret; 696 } 697 698 return 0; 699 } 700 701 static struct i2c_dev_desc * 702 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 703 u16 addr) 704 { 705 struct i2c_dev_desc *dev; 706 707 i3c_bus_for_each_i2cdev(&master->bus, dev) { 708 if (dev->addr == addr) 709 return dev; 710 } 711 712 return NULL; 713 } 714 715 /** 716 * i3c_master_get_free_addr() - get a free address on the bus 717 * @master: I3C master object 718 * @start_addr: where to start searching 719 * 720 * This function must be called with the bus lock held in write mode. 721 * 722 * Return: the first free address starting at @start_addr (included) or -ENOMEM 723 * if there's no more address available. 724 */ 725 int i3c_master_get_free_addr(struct i3c_master_controller *master, 726 u8 start_addr) 727 { 728 return i3c_bus_get_free_addr(&master->bus, start_addr); 729 } 730 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 731 732 static void i3c_device_release(struct device *dev) 733 { 734 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 735 736 WARN_ON(i3cdev->desc); 737 738 of_node_put(i3cdev->dev.of_node); 739 kfree(i3cdev); 740 } 741 742 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 743 { 744 kfree(dev); 745 } 746 747 static struct i3c_dev_desc * 748 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 749 const struct i3c_device_info *info) 750 { 751 struct i3c_dev_desc *dev; 752 753 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 754 if (!dev) 755 return ERR_PTR(-ENOMEM); 756 757 dev->common.master = master; 758 dev->info = *info; 759 mutex_init(&dev->ibi_lock); 760 761 return dev; 762 } 763 764 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 765 u8 addr) 766 { 767 enum i3c_addr_slot_status addrstat; 768 struct i3c_ccc_cmd_dest dest; 769 struct i3c_ccc_cmd cmd; 770 int ret; 771 772 if (!master) 773 return -EINVAL; 774 775 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 776 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 777 return -EINVAL; 778 779 i3c_ccc_cmd_dest_init(&dest, addr, 0); 780 i3c_ccc_cmd_init(&cmd, false, 781 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 782 &dest, 1); 783 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 784 i3c_ccc_cmd_dest_cleanup(&dest); 785 786 return ret; 787 } 788 789 /** 790 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 791 * procedure 792 * @master: master used to send frames on the bus 793 * 794 * Send a ENTDAA CCC command to start a DAA procedure. 795 * 796 * Note that this function only sends the ENTDAA CCC command, all the logic 797 * behind dynamic address assignment has to be handled in the I3C master 798 * driver. 799 * 800 * This function must be called with the bus lock held in write mode. 801 * 802 * Return: 0 in case of success, a positive I3C error code if the error is 803 * one of the official Mx error codes, and a negative error code otherwise. 804 */ 805 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 806 { 807 struct i3c_ccc_cmd_dest dest; 808 struct i3c_ccc_cmd cmd; 809 int ret; 810 811 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 812 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 813 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 814 i3c_ccc_cmd_dest_cleanup(&dest); 815 816 return ret; 817 } 818 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 819 820 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 821 u8 addr, bool enable, u8 evts) 822 { 823 struct i3c_ccc_events *events; 824 struct i3c_ccc_cmd_dest dest; 825 struct i3c_ccc_cmd cmd; 826 int ret; 827 828 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 829 if (!events) 830 return -ENOMEM; 831 832 events->events = evts; 833 i3c_ccc_cmd_init(&cmd, false, 834 enable ? 835 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 836 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 837 &dest, 1); 838 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 839 i3c_ccc_cmd_dest_cleanup(&dest); 840 841 return ret; 842 } 843 844 /** 845 * i3c_master_disec_locked() - send a DISEC CCC command 846 * @master: master used to send frames on the bus 847 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 848 * @evts: events to disable 849 * 850 * Send a DISEC CCC command to disable some or all events coming from a 851 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 852 * 853 * This function must be called with the bus lock held in write mode. 854 * 855 * Return: 0 in case of success, a positive I3C error code if the error is 856 * one of the official Mx error codes, and a negative error code otherwise. 857 */ 858 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 859 u8 evts) 860 { 861 return i3c_master_enec_disec_locked(master, addr, false, evts); 862 } 863 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 864 865 /** 866 * i3c_master_enec_locked() - send an ENEC CCC command 867 * @master: master used to send frames on the bus 868 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 869 * @evts: events to disable 870 * 871 * Sends an ENEC CCC command to enable some or all events coming from a 872 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 873 * 874 * This function must be called with the bus lock held in write mode. 875 * 876 * Return: 0 in case of success, a positive I3C error code if the error is 877 * one of the official Mx error codes, and a negative error code otherwise. 878 */ 879 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 880 u8 evts) 881 { 882 return i3c_master_enec_disec_locked(master, addr, true, evts); 883 } 884 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 885 886 /** 887 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 888 * @master: master used to send frames on the bus 889 * 890 * Send a DEFSLVS CCC command containing all the devices known to the @master. 891 * This is useful when you have secondary masters on the bus to propagate 892 * device information. 893 * 894 * This should be called after all I3C devices have been discovered (in other 895 * words, after the DAA procedure has finished) and instantiated in 896 * &i3c_master_controller_ops->bus_init(). 897 * It should also be called if a master ACKed an Hot-Join request and assigned 898 * a dynamic address to the device joining the bus. 899 * 900 * This function must be called with the bus lock held in write mode. 901 * 902 * Return: 0 in case of success, a positive I3C error code if the error is 903 * one of the official Mx error codes, and a negative error code otherwise. 904 */ 905 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 906 { 907 struct i3c_ccc_defslvs *defslvs; 908 struct i3c_ccc_dev_desc *desc; 909 struct i3c_ccc_cmd_dest dest; 910 struct i3c_dev_desc *i3cdev; 911 struct i2c_dev_desc *i2cdev; 912 struct i3c_ccc_cmd cmd; 913 struct i3c_bus *bus; 914 bool send = false; 915 int ndevs = 0, ret; 916 917 if (!master) 918 return -EINVAL; 919 920 bus = i3c_master_get_bus(master); 921 i3c_bus_for_each_i3cdev(bus, i3cdev) { 922 ndevs++; 923 924 if (i3cdev == master->this) 925 continue; 926 927 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 928 I3C_BCR_I3C_MASTER) 929 send = true; 930 } 931 932 /* No other master on the bus, skip DEFSLVS. */ 933 if (!send) 934 return 0; 935 936 i3c_bus_for_each_i2cdev(bus, i2cdev) 937 ndevs++; 938 939 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 940 struct_size(defslvs, slaves, 941 ndevs - 1)); 942 if (!defslvs) 943 return -ENOMEM; 944 945 defslvs->count = ndevs; 946 defslvs->master.bcr = master->this->info.bcr; 947 defslvs->master.dcr = master->this->info.dcr; 948 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 949 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 950 951 desc = defslvs->slaves; 952 i3c_bus_for_each_i2cdev(bus, i2cdev) { 953 desc->lvr = i2cdev->lvr; 954 desc->static_addr = i2cdev->addr << 1; 955 desc++; 956 } 957 958 i3c_bus_for_each_i3cdev(bus, i3cdev) { 959 /* Skip the I3C dev representing this master. */ 960 if (i3cdev == master->this) 961 continue; 962 963 desc->bcr = i3cdev->info.bcr; 964 desc->dcr = i3cdev->info.dcr; 965 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 966 desc->static_addr = i3cdev->info.static_addr << 1; 967 desc++; 968 } 969 970 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 971 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 972 i3c_ccc_cmd_dest_cleanup(&dest); 973 974 return ret; 975 } 976 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 977 978 static int i3c_master_setda_locked(struct i3c_master_controller *master, 979 u8 oldaddr, u8 newaddr, bool setdasa) 980 { 981 struct i3c_ccc_cmd_dest dest; 982 struct i3c_ccc_setda *setda; 983 struct i3c_ccc_cmd cmd; 984 int ret; 985 986 if (!oldaddr || !newaddr) 987 return -EINVAL; 988 989 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 990 if (!setda) 991 return -ENOMEM; 992 993 setda->addr = newaddr << 1; 994 i3c_ccc_cmd_init(&cmd, false, 995 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 996 &dest, 1); 997 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 998 i3c_ccc_cmd_dest_cleanup(&dest); 999 1000 return ret; 1001 } 1002 1003 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1004 u8 static_addr, u8 dyn_addr) 1005 { 1006 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1007 } 1008 1009 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1010 u8 oldaddr, u8 newaddr) 1011 { 1012 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1013 } 1014 1015 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1016 struct i3c_device_info *info) 1017 { 1018 struct i3c_ccc_cmd_dest dest; 1019 struct i3c_ccc_mrl *mrl; 1020 struct i3c_ccc_cmd cmd; 1021 int ret; 1022 1023 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1024 if (!mrl) 1025 return -ENOMEM; 1026 1027 /* 1028 * When the device does not have IBI payload GETMRL only returns 2 1029 * bytes of data. 1030 */ 1031 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1032 dest.payload.len -= 1; 1033 1034 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1035 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1036 if (ret) 1037 goto out; 1038 1039 switch (dest.payload.len) { 1040 case 3: 1041 info->max_ibi_len = mrl->ibi_len; 1042 fallthrough; 1043 case 2: 1044 info->max_read_len = be16_to_cpu(mrl->read_len); 1045 break; 1046 default: 1047 ret = -EIO; 1048 goto out; 1049 } 1050 1051 out: 1052 i3c_ccc_cmd_dest_cleanup(&dest); 1053 1054 return ret; 1055 } 1056 1057 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1058 struct i3c_device_info *info) 1059 { 1060 struct i3c_ccc_cmd_dest dest; 1061 struct i3c_ccc_mwl *mwl; 1062 struct i3c_ccc_cmd cmd; 1063 int ret; 1064 1065 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1066 if (!mwl) 1067 return -ENOMEM; 1068 1069 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1070 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1071 if (ret) 1072 goto out; 1073 1074 if (dest.payload.len != sizeof(*mwl)) { 1075 ret = -EIO; 1076 goto out; 1077 } 1078 1079 info->max_write_len = be16_to_cpu(mwl->len); 1080 1081 out: 1082 i3c_ccc_cmd_dest_cleanup(&dest); 1083 1084 return ret; 1085 } 1086 1087 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1088 struct i3c_device_info *info) 1089 { 1090 struct i3c_ccc_getmxds *getmaxds; 1091 struct i3c_ccc_cmd_dest dest; 1092 struct i3c_ccc_cmd cmd; 1093 int ret; 1094 1095 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1096 sizeof(*getmaxds)); 1097 if (!getmaxds) 1098 return -ENOMEM; 1099 1100 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1101 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1102 if (ret) 1103 goto out; 1104 1105 if (dest.payload.len != 2 && dest.payload.len != 5) { 1106 ret = -EIO; 1107 goto out; 1108 } 1109 1110 info->max_read_ds = getmaxds->maxrd; 1111 info->max_write_ds = getmaxds->maxwr; 1112 if (dest.payload.len == 5) 1113 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1114 ((u32)getmaxds->maxrdturn[1] << 8) | 1115 ((u32)getmaxds->maxrdturn[2] << 16); 1116 1117 out: 1118 i3c_ccc_cmd_dest_cleanup(&dest); 1119 1120 return ret; 1121 } 1122 1123 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1124 struct i3c_device_info *info) 1125 { 1126 struct i3c_ccc_gethdrcap *gethdrcap; 1127 struct i3c_ccc_cmd_dest dest; 1128 struct i3c_ccc_cmd cmd; 1129 int ret; 1130 1131 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1132 sizeof(*gethdrcap)); 1133 if (!gethdrcap) 1134 return -ENOMEM; 1135 1136 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1137 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1138 if (ret) 1139 goto out; 1140 1141 if (dest.payload.len != 1) { 1142 ret = -EIO; 1143 goto out; 1144 } 1145 1146 info->hdr_cap = gethdrcap->modes; 1147 1148 out: 1149 i3c_ccc_cmd_dest_cleanup(&dest); 1150 1151 return ret; 1152 } 1153 1154 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1155 struct i3c_device_info *info) 1156 { 1157 struct i3c_ccc_getpid *getpid; 1158 struct i3c_ccc_cmd_dest dest; 1159 struct i3c_ccc_cmd cmd; 1160 int ret, i; 1161 1162 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1163 if (!getpid) 1164 return -ENOMEM; 1165 1166 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1167 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1168 if (ret) 1169 goto out; 1170 1171 info->pid = 0; 1172 for (i = 0; i < sizeof(getpid->pid); i++) { 1173 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1174 1175 info->pid |= (u64)getpid->pid[i] << sft; 1176 } 1177 1178 out: 1179 i3c_ccc_cmd_dest_cleanup(&dest); 1180 1181 return ret; 1182 } 1183 1184 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1185 struct i3c_device_info *info) 1186 { 1187 struct i3c_ccc_getbcr *getbcr; 1188 struct i3c_ccc_cmd_dest dest; 1189 struct i3c_ccc_cmd cmd; 1190 int ret; 1191 1192 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1193 if (!getbcr) 1194 return -ENOMEM; 1195 1196 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1197 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1198 if (ret) 1199 goto out; 1200 1201 info->bcr = getbcr->bcr; 1202 1203 out: 1204 i3c_ccc_cmd_dest_cleanup(&dest); 1205 1206 return ret; 1207 } 1208 1209 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1210 struct i3c_device_info *info) 1211 { 1212 struct i3c_ccc_getdcr *getdcr; 1213 struct i3c_ccc_cmd_dest dest; 1214 struct i3c_ccc_cmd cmd; 1215 int ret; 1216 1217 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1218 if (!getdcr) 1219 return -ENOMEM; 1220 1221 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1222 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1223 if (ret) 1224 goto out; 1225 1226 info->dcr = getdcr->dcr; 1227 1228 out: 1229 i3c_ccc_cmd_dest_cleanup(&dest); 1230 1231 return ret; 1232 } 1233 1234 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1235 { 1236 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1237 enum i3c_addr_slot_status slot_status; 1238 int ret; 1239 1240 if (!dev->info.dyn_addr) 1241 return -EINVAL; 1242 1243 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1244 dev->info.dyn_addr); 1245 if (slot_status == I3C_ADDR_SLOT_RSVD || 1246 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1247 return -EINVAL; 1248 1249 ret = i3c_master_getpid_locked(master, &dev->info); 1250 if (ret) 1251 return ret; 1252 1253 ret = i3c_master_getbcr_locked(master, &dev->info); 1254 if (ret) 1255 return ret; 1256 1257 ret = i3c_master_getdcr_locked(master, &dev->info); 1258 if (ret) 1259 return ret; 1260 1261 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1262 ret = i3c_master_getmxds_locked(master, &dev->info); 1263 if (ret) 1264 return ret; 1265 } 1266 1267 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1268 dev->info.max_ibi_len = 1; 1269 1270 i3c_master_getmrl_locked(master, &dev->info); 1271 i3c_master_getmwl_locked(master, &dev->info); 1272 1273 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1274 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1275 if (ret) 1276 return ret; 1277 } 1278 1279 return 0; 1280 } 1281 1282 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1283 { 1284 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1285 1286 if (dev->info.static_addr) 1287 i3c_bus_set_addr_slot_status(&master->bus, 1288 dev->info.static_addr, 1289 I3C_ADDR_SLOT_FREE); 1290 1291 if (dev->info.dyn_addr) 1292 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1293 I3C_ADDR_SLOT_FREE); 1294 1295 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1296 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1297 I3C_ADDR_SLOT_FREE); 1298 } 1299 1300 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1301 { 1302 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1303 enum i3c_addr_slot_status status; 1304 1305 if (!dev->info.static_addr && !dev->info.dyn_addr) 1306 return 0; 1307 1308 if (dev->info.static_addr) { 1309 status = i3c_bus_get_addr_slot_status(&master->bus, 1310 dev->info.static_addr); 1311 if (status != I3C_ADDR_SLOT_FREE) 1312 return -EBUSY; 1313 1314 i3c_bus_set_addr_slot_status(&master->bus, 1315 dev->info.static_addr, 1316 I3C_ADDR_SLOT_I3C_DEV); 1317 } 1318 1319 /* 1320 * ->init_dyn_addr should have been reserved before that, so, if we're 1321 * trying to apply a pre-reserved dynamic address, we should not try 1322 * to reserve the address slot a second time. 1323 */ 1324 if (dev->info.dyn_addr && 1325 (!dev->boardinfo || 1326 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1327 status = i3c_bus_get_addr_slot_status(&master->bus, 1328 dev->info.dyn_addr); 1329 if (status != I3C_ADDR_SLOT_FREE) 1330 goto err_release_static_addr; 1331 1332 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1333 I3C_ADDR_SLOT_I3C_DEV); 1334 } 1335 1336 return 0; 1337 1338 err_release_static_addr: 1339 if (dev->info.static_addr) 1340 i3c_bus_set_addr_slot_status(&master->bus, 1341 dev->info.static_addr, 1342 I3C_ADDR_SLOT_FREE); 1343 1344 return -EBUSY; 1345 } 1346 1347 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1348 struct i3c_dev_desc *dev) 1349 { 1350 int ret; 1351 1352 /* 1353 * We don't attach devices to the controller until they are 1354 * addressable on the bus. 1355 */ 1356 if (!dev->info.static_addr && !dev->info.dyn_addr) 1357 return 0; 1358 1359 ret = i3c_master_get_i3c_addrs(dev); 1360 if (ret) 1361 return ret; 1362 1363 /* Do not attach the master device itself. */ 1364 if (master->this != dev && master->ops->attach_i3c_dev) { 1365 ret = master->ops->attach_i3c_dev(dev); 1366 if (ret) { 1367 i3c_master_put_i3c_addrs(dev); 1368 return ret; 1369 } 1370 } 1371 1372 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1373 1374 return 0; 1375 } 1376 1377 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1378 u8 old_dyn_addr) 1379 { 1380 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1381 enum i3c_addr_slot_status status; 1382 int ret; 1383 1384 if (dev->info.dyn_addr != old_dyn_addr && 1385 (!dev->boardinfo || 1386 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1387 status = i3c_bus_get_addr_slot_status(&master->bus, 1388 dev->info.dyn_addr); 1389 if (status != I3C_ADDR_SLOT_FREE) 1390 return -EBUSY; 1391 i3c_bus_set_addr_slot_status(&master->bus, 1392 dev->info.dyn_addr, 1393 I3C_ADDR_SLOT_I3C_DEV); 1394 if (old_dyn_addr) 1395 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1396 I3C_ADDR_SLOT_FREE); 1397 } 1398 1399 if (master->ops->reattach_i3c_dev) { 1400 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1401 if (ret) { 1402 i3c_master_put_i3c_addrs(dev); 1403 return ret; 1404 } 1405 } 1406 1407 return 0; 1408 } 1409 1410 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1411 { 1412 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1413 1414 /* Do not detach the master device itself. */ 1415 if (master->this != dev && master->ops->detach_i3c_dev) 1416 master->ops->detach_i3c_dev(dev); 1417 1418 i3c_master_put_i3c_addrs(dev); 1419 list_del(&dev->common.node); 1420 } 1421 1422 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1423 struct i2c_dev_desc *dev) 1424 { 1425 int ret; 1426 1427 if (master->ops->attach_i2c_dev) { 1428 ret = master->ops->attach_i2c_dev(dev); 1429 if (ret) 1430 return ret; 1431 } 1432 1433 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1434 1435 return 0; 1436 } 1437 1438 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1439 { 1440 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1441 1442 list_del(&dev->common.node); 1443 1444 if (master->ops->detach_i2c_dev) 1445 master->ops->detach_i2c_dev(dev); 1446 } 1447 1448 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1449 struct i3c_dev_boardinfo *boardinfo) 1450 { 1451 struct i3c_device_info info = { 1452 .static_addr = boardinfo->static_addr, 1453 .pid = boardinfo->pid, 1454 }; 1455 struct i3c_dev_desc *i3cdev; 1456 int ret; 1457 1458 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1459 if (IS_ERR(i3cdev)) 1460 return -ENOMEM; 1461 1462 i3cdev->boardinfo = boardinfo; 1463 1464 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1465 if (ret) 1466 goto err_free_dev; 1467 1468 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1469 i3cdev->boardinfo->init_dyn_addr); 1470 if (ret) 1471 goto err_detach_dev; 1472 1473 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1474 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1475 if (ret) 1476 goto err_rstdaa; 1477 1478 ret = i3c_master_retrieve_dev_info(i3cdev); 1479 if (ret) 1480 goto err_rstdaa; 1481 1482 return 0; 1483 1484 err_rstdaa: 1485 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1486 err_detach_dev: 1487 i3c_master_detach_i3c_dev(i3cdev); 1488 err_free_dev: 1489 i3c_master_free_i3c_dev(i3cdev); 1490 1491 return ret; 1492 } 1493 1494 static void 1495 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1496 { 1497 struct i3c_dev_desc *desc; 1498 int ret; 1499 1500 if (!master->init_done) 1501 return; 1502 1503 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1504 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1505 continue; 1506 1507 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1508 if (!desc->dev) 1509 continue; 1510 1511 desc->dev->bus = &master->bus; 1512 desc->dev->desc = desc; 1513 desc->dev->dev.parent = &master->dev; 1514 desc->dev->dev.type = &i3c_device_type; 1515 desc->dev->dev.bus = &i3c_bus_type; 1516 desc->dev->dev.release = i3c_device_release; 1517 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1518 desc->info.pid); 1519 1520 if (desc->boardinfo) 1521 desc->dev->dev.of_node = desc->boardinfo->of_node; 1522 1523 ret = device_register(&desc->dev->dev); 1524 if (ret) 1525 dev_err(&master->dev, 1526 "Failed to add I3C device (err = %d)\n", ret); 1527 } 1528 } 1529 1530 /** 1531 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1532 * @master: master doing the DAA 1533 * 1534 * This function is instantiating an I3C device object and adding it to the 1535 * I3C device list. All device information are automatically retrieved using 1536 * standard CCC commands. 1537 * 1538 * The I3C device object is returned in case the master wants to attach 1539 * private data to it using i3c_dev_set_master_data(). 1540 * 1541 * This function must be called with the bus lock held in write mode. 1542 * 1543 * Return: a 0 in case of success, an negative error code otherwise. 1544 */ 1545 int i3c_master_do_daa(struct i3c_master_controller *master) 1546 { 1547 int ret; 1548 1549 i3c_bus_maintenance_lock(&master->bus); 1550 ret = master->ops->do_daa(master); 1551 i3c_bus_maintenance_unlock(&master->bus); 1552 1553 if (ret) 1554 return ret; 1555 1556 i3c_bus_normaluse_lock(&master->bus); 1557 i3c_master_register_new_i3c_devs(master); 1558 i3c_bus_normaluse_unlock(&master->bus); 1559 1560 return 0; 1561 } 1562 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1563 1564 /** 1565 * i3c_master_set_info() - set master device information 1566 * @master: master used to send frames on the bus 1567 * @info: I3C device information 1568 * 1569 * Set master device info. This should be called from 1570 * &i3c_master_controller_ops->bus_init(). 1571 * 1572 * Not all &i3c_device_info fields are meaningful for a master device. 1573 * Here is a list of fields that should be properly filled: 1574 * 1575 * - &i3c_device_info->dyn_addr 1576 * - &i3c_device_info->bcr 1577 * - &i3c_device_info->dcr 1578 * - &i3c_device_info->pid 1579 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1580 * &i3c_device_info->bcr 1581 * 1582 * This function must be called with the bus lock held in maintenance mode. 1583 * 1584 * Return: 0 if @info contains valid information (not every piece of 1585 * information can be checked, but we can at least make sure @info->dyn_addr 1586 * and @info->bcr are correct), -EINVAL otherwise. 1587 */ 1588 int i3c_master_set_info(struct i3c_master_controller *master, 1589 const struct i3c_device_info *info) 1590 { 1591 struct i3c_dev_desc *i3cdev; 1592 int ret; 1593 1594 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1595 return -EINVAL; 1596 1597 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1598 master->secondary) 1599 return -EINVAL; 1600 1601 if (master->this) 1602 return -EINVAL; 1603 1604 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1605 if (IS_ERR(i3cdev)) 1606 return PTR_ERR(i3cdev); 1607 1608 master->this = i3cdev; 1609 master->bus.cur_master = master->this; 1610 1611 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1612 if (ret) 1613 goto err_free_dev; 1614 1615 return 0; 1616 1617 err_free_dev: 1618 i3c_master_free_i3c_dev(i3cdev); 1619 1620 return ret; 1621 } 1622 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1623 1624 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1625 { 1626 struct i3c_dev_desc *i3cdev, *i3ctmp; 1627 struct i2c_dev_desc *i2cdev, *i2ctmp; 1628 1629 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1630 common.node) { 1631 i3c_master_detach_i3c_dev(i3cdev); 1632 1633 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1634 i3c_bus_set_addr_slot_status(&master->bus, 1635 i3cdev->boardinfo->init_dyn_addr, 1636 I3C_ADDR_SLOT_FREE); 1637 1638 i3c_master_free_i3c_dev(i3cdev); 1639 } 1640 1641 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1642 common.node) { 1643 i3c_master_detach_i2c_dev(i2cdev); 1644 i3c_bus_set_addr_slot_status(&master->bus, 1645 i2cdev->addr, 1646 I3C_ADDR_SLOT_FREE); 1647 i3c_master_free_i2c_dev(i2cdev); 1648 } 1649 } 1650 1651 /** 1652 * i3c_master_bus_init() - initialize an I3C bus 1653 * @master: main master initializing the bus 1654 * 1655 * This function is following all initialisation steps described in the I3C 1656 * specification: 1657 * 1658 * 1. Attach I2C devs to the master so that the master can fill its internal 1659 * device table appropriately 1660 * 1661 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1662 * the master controller. That's usually where the bus mode is selected 1663 * (pure bus or mixed fast/slow bus) 1664 * 1665 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1666 * particularly important when the bus was previously configured by someone 1667 * else (for example the bootloader) 1668 * 1669 * 4. Disable all slave events. 1670 * 1671 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1672 * also have static_addr, try to pre-assign dynamic addresses requested by 1673 * the FW with SETDASA and attach corresponding statically defined I3C 1674 * devices to the master. 1675 * 1676 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1677 * remaining I3C devices 1678 * 1679 * Once this is done, all I3C and I2C devices should be usable. 1680 * 1681 * Return: a 0 in case of success, an negative error code otherwise. 1682 */ 1683 static int i3c_master_bus_init(struct i3c_master_controller *master) 1684 { 1685 enum i3c_addr_slot_status status; 1686 struct i2c_dev_boardinfo *i2cboardinfo; 1687 struct i3c_dev_boardinfo *i3cboardinfo; 1688 struct i2c_dev_desc *i2cdev; 1689 int ret; 1690 1691 /* 1692 * First attach all devices with static definitions provided by the 1693 * FW. 1694 */ 1695 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1696 status = i3c_bus_get_addr_slot_status(&master->bus, 1697 i2cboardinfo->base.addr); 1698 if (status != I3C_ADDR_SLOT_FREE) { 1699 ret = -EBUSY; 1700 goto err_detach_devs; 1701 } 1702 1703 i3c_bus_set_addr_slot_status(&master->bus, 1704 i2cboardinfo->base.addr, 1705 I3C_ADDR_SLOT_I2C_DEV); 1706 1707 i2cdev = i3c_master_alloc_i2c_dev(master, 1708 i2cboardinfo->base.addr, 1709 i2cboardinfo->lvr); 1710 if (IS_ERR(i2cdev)) { 1711 ret = PTR_ERR(i2cdev); 1712 goto err_detach_devs; 1713 } 1714 1715 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1716 if (ret) { 1717 i3c_master_free_i2c_dev(i2cdev); 1718 goto err_detach_devs; 1719 } 1720 } 1721 1722 /* 1723 * Now execute the controller specific ->bus_init() routine, which 1724 * might configure its internal logic to match the bus limitations. 1725 */ 1726 ret = master->ops->bus_init(master); 1727 if (ret) 1728 goto err_detach_devs; 1729 1730 /* 1731 * The master device should have been instantiated in ->bus_init(), 1732 * complain if this was not the case. 1733 */ 1734 if (!master->this) { 1735 dev_err(&master->dev, 1736 "master_set_info() was not called in ->bus_init()\n"); 1737 ret = -EINVAL; 1738 goto err_bus_cleanup; 1739 } 1740 1741 /* 1742 * Reset all dynamic address that may have been assigned before 1743 * (assigned by the bootloader for example). 1744 */ 1745 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1746 if (ret && ret != I3C_ERROR_M2) 1747 goto err_bus_cleanup; 1748 1749 /* Disable all slave events before starting DAA. */ 1750 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1751 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1752 I3C_CCC_EVENT_HJ); 1753 if (ret && ret != I3C_ERROR_M2) 1754 goto err_bus_cleanup; 1755 1756 /* 1757 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1758 * address and retrieve device information if needed. 1759 * In case pre-assign dynamic address fails, setting dynamic address to 1760 * the requested init_dyn_addr is retried after DAA is done in 1761 * i3c_master_add_i3c_dev_locked(). 1762 */ 1763 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1764 1765 /* 1766 * We don't reserve a dynamic address for devices that 1767 * don't explicitly request one. 1768 */ 1769 if (!i3cboardinfo->init_dyn_addr) 1770 continue; 1771 1772 ret = i3c_bus_get_addr_slot_status(&master->bus, 1773 i3cboardinfo->init_dyn_addr); 1774 if (ret != I3C_ADDR_SLOT_FREE) { 1775 ret = -EBUSY; 1776 goto err_rstdaa; 1777 } 1778 1779 i3c_bus_set_addr_slot_status(&master->bus, 1780 i3cboardinfo->init_dyn_addr, 1781 I3C_ADDR_SLOT_I3C_DEV); 1782 1783 /* 1784 * Only try to create/attach devices that have a static 1785 * address. Other devices will be created/attached when 1786 * DAA happens, and the requested dynamic address will 1787 * be set using SETNEWDA once those devices become 1788 * addressable. 1789 */ 1790 1791 if (i3cboardinfo->static_addr) 1792 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1793 } 1794 1795 ret = i3c_master_do_daa(master); 1796 if (ret) 1797 goto err_rstdaa; 1798 1799 return 0; 1800 1801 err_rstdaa: 1802 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1803 1804 err_bus_cleanup: 1805 if (master->ops->bus_cleanup) 1806 master->ops->bus_cleanup(master); 1807 1808 err_detach_devs: 1809 i3c_master_detach_free_devs(master); 1810 1811 return ret; 1812 } 1813 1814 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1815 { 1816 if (master->ops->bus_cleanup) 1817 master->ops->bus_cleanup(master); 1818 1819 i3c_master_detach_free_devs(master); 1820 } 1821 1822 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1823 { 1824 struct i3c_master_controller *master = i3cdev->common.master; 1825 struct i3c_dev_boardinfo *i3cboardinfo; 1826 1827 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1828 if (i3cdev->info.pid != i3cboardinfo->pid) 1829 continue; 1830 1831 i3cdev->boardinfo = i3cboardinfo; 1832 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1833 return; 1834 } 1835 } 1836 1837 static struct i3c_dev_desc * 1838 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1839 { 1840 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1841 struct i3c_dev_desc *i3cdev; 1842 1843 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1844 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1845 return i3cdev; 1846 } 1847 1848 return NULL; 1849 } 1850 1851 /** 1852 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1853 * @master: master used to send frames on the bus 1854 * @addr: I3C slave dynamic address assigned to the device 1855 * 1856 * This function is instantiating an I3C device object and adding it to the 1857 * I3C device list. All device information are automatically retrieved using 1858 * standard CCC commands. 1859 * 1860 * The I3C device object is returned in case the master wants to attach 1861 * private data to it using i3c_dev_set_master_data(). 1862 * 1863 * This function must be called with the bus lock held in write mode. 1864 * 1865 * Return: a 0 in case of success, an negative error code otherwise. 1866 */ 1867 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1868 u8 addr) 1869 { 1870 struct i3c_device_info info = { .dyn_addr = addr }; 1871 struct i3c_dev_desc *newdev, *olddev; 1872 u8 old_dyn_addr = addr, expected_dyn_addr; 1873 struct i3c_ibi_setup ibireq = { }; 1874 bool enable_ibi = false; 1875 int ret; 1876 1877 if (!master) 1878 return -EINVAL; 1879 1880 newdev = i3c_master_alloc_i3c_dev(master, &info); 1881 if (IS_ERR(newdev)) 1882 return PTR_ERR(newdev); 1883 1884 ret = i3c_master_attach_i3c_dev(master, newdev); 1885 if (ret) 1886 goto err_free_dev; 1887 1888 ret = i3c_master_retrieve_dev_info(newdev); 1889 if (ret) 1890 goto err_detach_dev; 1891 1892 i3c_master_attach_boardinfo(newdev); 1893 1894 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 1895 if (olddev) { 1896 newdev->dev = olddev->dev; 1897 if (newdev->dev) 1898 newdev->dev->desc = newdev; 1899 1900 /* 1901 * We need to restore the IBI state too, so let's save the 1902 * IBI information and try to restore them after olddev has 1903 * been detached+released and its IBI has been stopped and 1904 * the associated resources have been freed. 1905 */ 1906 mutex_lock(&olddev->ibi_lock); 1907 if (olddev->ibi) { 1908 ibireq.handler = olddev->ibi->handler; 1909 ibireq.max_payload_len = olddev->ibi->max_payload_len; 1910 ibireq.num_slots = olddev->ibi->num_slots; 1911 1912 if (olddev->ibi->enabled) { 1913 enable_ibi = true; 1914 i3c_dev_disable_ibi_locked(olddev); 1915 } 1916 1917 i3c_dev_free_ibi_locked(olddev); 1918 } 1919 mutex_unlock(&olddev->ibi_lock); 1920 1921 old_dyn_addr = olddev->info.dyn_addr; 1922 1923 i3c_master_detach_i3c_dev(olddev); 1924 i3c_master_free_i3c_dev(olddev); 1925 } 1926 1927 /* 1928 * Depending on our previous state, the expected dynamic address might 1929 * differ: 1930 * - if the device already had a dynamic address assigned, let's try to 1931 * re-apply this one 1932 * - if the device did not have a dynamic address and the firmware 1933 * requested a specific address, pick this one 1934 * - in any other case, keep the address automatically assigned by the 1935 * master 1936 */ 1937 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 1938 expected_dyn_addr = old_dyn_addr; 1939 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 1940 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 1941 else 1942 expected_dyn_addr = newdev->info.dyn_addr; 1943 1944 if (newdev->info.dyn_addr != expected_dyn_addr) { 1945 /* 1946 * Try to apply the expected dynamic address. If it fails, keep 1947 * the address assigned by the master. 1948 */ 1949 ret = i3c_master_setnewda_locked(master, 1950 newdev->info.dyn_addr, 1951 expected_dyn_addr); 1952 if (!ret) { 1953 old_dyn_addr = newdev->info.dyn_addr; 1954 newdev->info.dyn_addr = expected_dyn_addr; 1955 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1956 } else { 1957 dev_err(&master->dev, 1958 "Failed to assign reserved/old address to device %d%llx", 1959 master->bus.id, newdev->info.pid); 1960 } 1961 } 1962 1963 /* 1964 * Now is time to try to restore the IBI setup. If we're lucky, 1965 * everything works as before, otherwise, all we can do is complain. 1966 * FIXME: maybe we should add callback to inform the driver that it 1967 * should request the IBI again instead of trying to hide that from 1968 * him. 1969 */ 1970 if (ibireq.handler) { 1971 mutex_lock(&newdev->ibi_lock); 1972 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 1973 if (ret) { 1974 dev_err(&master->dev, 1975 "Failed to request IBI on device %d-%llx", 1976 master->bus.id, newdev->info.pid); 1977 } else if (enable_ibi) { 1978 ret = i3c_dev_enable_ibi_locked(newdev); 1979 if (ret) 1980 dev_err(&master->dev, 1981 "Failed to re-enable IBI on device %d-%llx", 1982 master->bus.id, newdev->info.pid); 1983 } 1984 mutex_unlock(&newdev->ibi_lock); 1985 } 1986 1987 return 0; 1988 1989 err_detach_dev: 1990 if (newdev->dev && newdev->dev->desc) 1991 newdev->dev->desc = NULL; 1992 1993 i3c_master_detach_i3c_dev(newdev); 1994 1995 err_free_dev: 1996 i3c_master_free_i3c_dev(newdev); 1997 1998 return ret; 1999 } 2000 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2001 2002 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2003 2004 static int 2005 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2006 struct device_node *node, u32 *reg) 2007 { 2008 struct i2c_dev_boardinfo *boardinfo; 2009 struct device *dev = &master->dev; 2010 int ret; 2011 2012 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2013 if (!boardinfo) 2014 return -ENOMEM; 2015 2016 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2017 if (ret) 2018 return ret; 2019 2020 /* 2021 * The I3C Specification does not clearly say I2C devices with 10-bit 2022 * address are supported. These devices can't be passed properly through 2023 * DEFSLVS command. 2024 */ 2025 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2026 dev_err(dev, "I2C device with 10 bit address not supported."); 2027 return -ENOTSUPP; 2028 } 2029 2030 /* LVR is encoded in reg[2]. */ 2031 boardinfo->lvr = reg[2]; 2032 2033 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2034 of_node_get(node); 2035 2036 return 0; 2037 } 2038 2039 static int 2040 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2041 struct device_node *node, u32 *reg) 2042 { 2043 struct i3c_dev_boardinfo *boardinfo; 2044 struct device *dev = &master->dev; 2045 enum i3c_addr_slot_status addrstatus; 2046 u32 init_dyn_addr = 0; 2047 2048 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2049 if (!boardinfo) 2050 return -ENOMEM; 2051 2052 if (reg[0]) { 2053 if (reg[0] > I3C_MAX_ADDR) 2054 return -EINVAL; 2055 2056 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2057 reg[0]); 2058 if (addrstatus != I3C_ADDR_SLOT_FREE) 2059 return -EINVAL; 2060 } 2061 2062 boardinfo->static_addr = reg[0]; 2063 2064 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2065 if (init_dyn_addr > I3C_MAX_ADDR) 2066 return -EINVAL; 2067 2068 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2069 init_dyn_addr); 2070 if (addrstatus != I3C_ADDR_SLOT_FREE) 2071 return -EINVAL; 2072 } 2073 2074 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2075 2076 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2077 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2078 return -EINVAL; 2079 2080 boardinfo->init_dyn_addr = init_dyn_addr; 2081 boardinfo->of_node = of_node_get(node); 2082 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2083 2084 return 0; 2085 } 2086 2087 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2088 struct device_node *node) 2089 { 2090 u32 reg[3]; 2091 int ret; 2092 2093 if (!master || !node) 2094 return -EINVAL; 2095 2096 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2097 if (ret) 2098 return ret; 2099 2100 /* 2101 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2102 * dealing with an I2C device. 2103 */ 2104 if (!reg[1]) 2105 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2106 else 2107 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2108 2109 return ret; 2110 } 2111 2112 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2113 { 2114 struct device *dev = &master->dev; 2115 struct device_node *i3cbus_np = dev->of_node; 2116 struct device_node *node; 2117 int ret; 2118 u32 val; 2119 2120 if (!i3cbus_np) 2121 return 0; 2122 2123 for_each_available_child_of_node(i3cbus_np, node) { 2124 ret = of_i3c_master_add_dev(master, node); 2125 if (ret) { 2126 of_node_put(node); 2127 return ret; 2128 } 2129 } 2130 2131 /* 2132 * The user might want to limit I2C and I3C speed in case some devices 2133 * on the bus are not supporting typical rates, or if the bus topology 2134 * prevents it from using max possible rate. 2135 */ 2136 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2137 master->bus.scl_rate.i2c = val; 2138 2139 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2140 master->bus.scl_rate.i3c = val; 2141 2142 return 0; 2143 } 2144 2145 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2146 struct i2c_msg *xfers, int nxfers) 2147 { 2148 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2149 struct i2c_dev_desc *dev; 2150 int i, ret; 2151 u16 addr; 2152 2153 if (!xfers || !master || nxfers <= 0) 2154 return -EINVAL; 2155 2156 if (!master->ops->i2c_xfers) 2157 return -ENOTSUPP; 2158 2159 /* Doing transfers to different devices is not supported. */ 2160 addr = xfers[0].addr; 2161 for (i = 1; i < nxfers; i++) { 2162 if (addr != xfers[i].addr) 2163 return -ENOTSUPP; 2164 } 2165 2166 i3c_bus_normaluse_lock(&master->bus); 2167 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2168 if (!dev) 2169 ret = -ENOENT; 2170 else 2171 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2172 i3c_bus_normaluse_unlock(&master->bus); 2173 2174 return ret ? ret : nxfers; 2175 } 2176 2177 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2178 { 2179 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2180 } 2181 2182 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2183 { 2184 /* Fall back to no spike filters and FM bus mode. */ 2185 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2186 2187 if (client->dev.of_node) { 2188 u32 reg[3]; 2189 2190 if (!of_property_read_u32_array(client->dev.of_node, "reg", 2191 reg, ARRAY_SIZE(reg))) 2192 lvr = reg[2]; 2193 } 2194 2195 return lvr; 2196 } 2197 2198 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2199 { 2200 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2201 enum i3c_addr_slot_status status; 2202 struct i2c_dev_desc *i2cdev; 2203 int ret; 2204 2205 /* Already added by board info? */ 2206 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2207 return 0; 2208 2209 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2210 if (status != I3C_ADDR_SLOT_FREE) 2211 return -EBUSY; 2212 2213 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2214 I3C_ADDR_SLOT_I2C_DEV); 2215 2216 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2217 i3c_master_i2c_get_lvr(client)); 2218 if (IS_ERR(i2cdev)) { 2219 ret = PTR_ERR(i2cdev); 2220 goto out_clear_status; 2221 } 2222 2223 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2224 if (ret) 2225 goto out_free_dev; 2226 2227 return 0; 2228 2229 out_free_dev: 2230 i3c_master_free_i2c_dev(i2cdev); 2231 out_clear_status: 2232 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2233 I3C_ADDR_SLOT_FREE); 2234 2235 return ret; 2236 } 2237 2238 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2239 { 2240 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2241 struct i2c_dev_desc *dev; 2242 2243 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2244 if (!dev) 2245 return -ENODEV; 2246 2247 i3c_master_detach_i2c_dev(dev); 2248 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2249 I3C_ADDR_SLOT_FREE); 2250 i3c_master_free_i2c_dev(dev); 2251 2252 return 0; 2253 } 2254 2255 static const struct i2c_algorithm i3c_master_i2c_algo = { 2256 .master_xfer = i3c_master_i2c_adapter_xfer, 2257 .functionality = i3c_master_i2c_funcs, 2258 }; 2259 2260 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2261 void *data) 2262 { 2263 struct i2c_adapter *adap; 2264 struct i2c_client *client; 2265 struct device *dev = data; 2266 struct i3c_master_controller *master; 2267 int ret; 2268 2269 if (dev->type != &i2c_client_type) 2270 return 0; 2271 2272 client = to_i2c_client(dev); 2273 adap = client->adapter; 2274 2275 if (adap->algo != &i3c_master_i2c_algo) 2276 return 0; 2277 2278 master = i2c_adapter_to_i3c_master(adap); 2279 2280 i3c_bus_maintenance_lock(&master->bus); 2281 switch (action) { 2282 case BUS_NOTIFY_ADD_DEVICE: 2283 ret = i3c_master_i2c_attach(adap, client); 2284 break; 2285 case BUS_NOTIFY_DEL_DEVICE: 2286 ret = i3c_master_i2c_detach(adap, client); 2287 break; 2288 } 2289 i3c_bus_maintenance_unlock(&master->bus); 2290 2291 return ret; 2292 } 2293 2294 static struct notifier_block i2cdev_notifier = { 2295 .notifier_call = i3c_i2c_notifier_call, 2296 }; 2297 2298 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2299 { 2300 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2301 struct i2c_dev_desc *i2cdev; 2302 struct i2c_dev_boardinfo *i2cboardinfo; 2303 int ret; 2304 2305 adap->dev.parent = master->dev.parent; 2306 adap->owner = master->dev.parent->driver->owner; 2307 adap->algo = &i3c_master_i2c_algo; 2308 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2309 2310 /* FIXME: Should we allow i3c masters to override these values? */ 2311 adap->timeout = 1000; 2312 adap->retries = 3; 2313 2314 ret = i2c_add_adapter(adap); 2315 if (ret) 2316 return ret; 2317 2318 /* 2319 * We silently ignore failures here. The bus should keep working 2320 * correctly even if one or more i2c devices are not registered. 2321 */ 2322 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2323 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2324 i2cboardinfo->base.addr); 2325 if (WARN_ON(!i2cdev)) 2326 continue; 2327 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2328 } 2329 2330 return 0; 2331 } 2332 2333 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2334 { 2335 struct i2c_dev_desc *i2cdev; 2336 2337 i2c_del_adapter(&master->i2c); 2338 2339 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2340 i2cdev->dev = NULL; 2341 } 2342 2343 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2344 { 2345 struct i3c_dev_desc *i3cdev; 2346 2347 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2348 if (!i3cdev->dev) 2349 continue; 2350 2351 i3cdev->dev->desc = NULL; 2352 if (device_is_registered(&i3cdev->dev->dev)) 2353 device_unregister(&i3cdev->dev->dev); 2354 else 2355 put_device(&i3cdev->dev->dev); 2356 i3cdev->dev = NULL; 2357 } 2358 } 2359 2360 /** 2361 * i3c_master_queue_ibi() - Queue an IBI 2362 * @dev: the device this IBI is coming from 2363 * @slot: the IBI slot used to store the payload 2364 * 2365 * Queue an IBI to the controller workqueue. The IBI handler attached to 2366 * the dev will be called from a workqueue context. 2367 */ 2368 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2369 { 2370 atomic_inc(&dev->ibi->pending_ibis); 2371 queue_work(dev->common.master->wq, &slot->work); 2372 } 2373 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2374 2375 static void i3c_master_handle_ibi(struct work_struct *work) 2376 { 2377 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2378 work); 2379 struct i3c_dev_desc *dev = slot->dev; 2380 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2381 struct i3c_ibi_payload payload; 2382 2383 payload.data = slot->data; 2384 payload.len = slot->len; 2385 2386 if (dev->dev) 2387 dev->ibi->handler(dev->dev, &payload); 2388 2389 master->ops->recycle_ibi_slot(dev, slot); 2390 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2391 complete(&dev->ibi->all_ibis_handled); 2392 } 2393 2394 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2395 struct i3c_ibi_slot *slot) 2396 { 2397 slot->dev = dev; 2398 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2399 } 2400 2401 struct i3c_generic_ibi_slot { 2402 struct list_head node; 2403 struct i3c_ibi_slot base; 2404 }; 2405 2406 struct i3c_generic_ibi_pool { 2407 spinlock_t lock; 2408 unsigned int num_slots; 2409 struct i3c_generic_ibi_slot *slots; 2410 void *payload_buf; 2411 struct list_head free_slots; 2412 struct list_head pending; 2413 }; 2414 2415 /** 2416 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2417 * @pool: the IBI pool to free 2418 * 2419 * Free all IBI slots allated by a generic IBI pool. 2420 */ 2421 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2422 { 2423 struct i3c_generic_ibi_slot *slot; 2424 unsigned int nslots = 0; 2425 2426 while (!list_empty(&pool->free_slots)) { 2427 slot = list_first_entry(&pool->free_slots, 2428 struct i3c_generic_ibi_slot, node); 2429 list_del(&slot->node); 2430 nslots++; 2431 } 2432 2433 /* 2434 * If the number of freed slots is not equal to the number of allocated 2435 * slots we have a leak somewhere. 2436 */ 2437 WARN_ON(nslots != pool->num_slots); 2438 2439 kfree(pool->payload_buf); 2440 kfree(pool->slots); 2441 kfree(pool); 2442 } 2443 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2444 2445 /** 2446 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2447 * @dev: the device this pool will be used for 2448 * @req: IBI setup request describing what the device driver expects 2449 * 2450 * Create a generic IBI pool based on the information provided in @req. 2451 * 2452 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2453 */ 2454 struct i3c_generic_ibi_pool * 2455 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2456 const struct i3c_ibi_setup *req) 2457 { 2458 struct i3c_generic_ibi_pool *pool; 2459 struct i3c_generic_ibi_slot *slot; 2460 unsigned int i; 2461 int ret; 2462 2463 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2464 if (!pool) 2465 return ERR_PTR(-ENOMEM); 2466 2467 spin_lock_init(&pool->lock); 2468 INIT_LIST_HEAD(&pool->free_slots); 2469 INIT_LIST_HEAD(&pool->pending); 2470 2471 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2472 if (!pool->slots) { 2473 ret = -ENOMEM; 2474 goto err_free_pool; 2475 } 2476 2477 if (req->max_payload_len) { 2478 pool->payload_buf = kcalloc(req->num_slots, 2479 req->max_payload_len, GFP_KERNEL); 2480 if (!pool->payload_buf) { 2481 ret = -ENOMEM; 2482 goto err_free_pool; 2483 } 2484 } 2485 2486 for (i = 0; i < req->num_slots; i++) { 2487 slot = &pool->slots[i]; 2488 i3c_master_init_ibi_slot(dev, &slot->base); 2489 2490 if (req->max_payload_len) 2491 slot->base.data = pool->payload_buf + 2492 (i * req->max_payload_len); 2493 2494 list_add_tail(&slot->node, &pool->free_slots); 2495 pool->num_slots++; 2496 } 2497 2498 return pool; 2499 2500 err_free_pool: 2501 i3c_generic_ibi_free_pool(pool); 2502 return ERR_PTR(ret); 2503 } 2504 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2505 2506 /** 2507 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2508 * @pool: the pool to query an IBI slot on 2509 * 2510 * Search for a free slot in a generic IBI pool. 2511 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2512 * when it's no longer needed. 2513 * 2514 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2515 */ 2516 struct i3c_ibi_slot * 2517 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2518 { 2519 struct i3c_generic_ibi_slot *slot; 2520 unsigned long flags; 2521 2522 spin_lock_irqsave(&pool->lock, flags); 2523 slot = list_first_entry_or_null(&pool->free_slots, 2524 struct i3c_generic_ibi_slot, node); 2525 if (slot) 2526 list_del(&slot->node); 2527 spin_unlock_irqrestore(&pool->lock, flags); 2528 2529 return slot ? &slot->base : NULL; 2530 } 2531 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2532 2533 /** 2534 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2535 * @pool: the pool to return the IBI slot to 2536 * @s: IBI slot to recycle 2537 * 2538 * Add an IBI slot back to its generic IBI pool. Should be called from the 2539 * master driver struct_master_controller_ops->recycle_ibi() method. 2540 */ 2541 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2542 struct i3c_ibi_slot *s) 2543 { 2544 struct i3c_generic_ibi_slot *slot; 2545 unsigned long flags; 2546 2547 if (!s) 2548 return; 2549 2550 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2551 spin_lock_irqsave(&pool->lock, flags); 2552 list_add_tail(&slot->node, &pool->free_slots); 2553 spin_unlock_irqrestore(&pool->lock, flags); 2554 } 2555 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2556 2557 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2558 { 2559 if (!ops || !ops->bus_init || !ops->priv_xfers || 2560 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2561 return -EINVAL; 2562 2563 if (ops->request_ibi && 2564 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2565 !ops->recycle_ibi_slot)) 2566 return -EINVAL; 2567 2568 return 0; 2569 } 2570 2571 /** 2572 * i3c_master_register() - register an I3C master 2573 * @master: master used to send frames on the bus 2574 * @parent: the parent device (the one that provides this I3C master 2575 * controller) 2576 * @ops: the master controller operations 2577 * @secondary: true if you are registering a secondary master. Will return 2578 * -ENOTSUPP if set to true since secondary masters are not yet 2579 * supported 2580 * 2581 * This function takes care of everything for you: 2582 * 2583 * - creates and initializes the I3C bus 2584 * - populates the bus with static I2C devs if @parent->of_node is not 2585 * NULL 2586 * - registers all I3C devices added by the controller during bus 2587 * initialization 2588 * - registers the I2C adapter and all I2C devices 2589 * 2590 * Return: 0 in case of success, a negative error code otherwise. 2591 */ 2592 int i3c_master_register(struct i3c_master_controller *master, 2593 struct device *parent, 2594 const struct i3c_master_controller_ops *ops, 2595 bool secondary) 2596 { 2597 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2598 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2599 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2600 struct i2c_dev_boardinfo *i2cbi; 2601 int ret; 2602 2603 /* We do not support secondary masters yet. */ 2604 if (secondary) 2605 return -ENOTSUPP; 2606 2607 ret = i3c_master_check_ops(ops); 2608 if (ret) 2609 return ret; 2610 2611 master->dev.parent = parent; 2612 master->dev.of_node = of_node_get(parent->of_node); 2613 master->dev.bus = &i3c_bus_type; 2614 master->dev.type = &i3c_masterdev_type; 2615 master->dev.release = i3c_masterdev_release; 2616 master->ops = ops; 2617 master->secondary = secondary; 2618 INIT_LIST_HEAD(&master->boardinfo.i2c); 2619 INIT_LIST_HEAD(&master->boardinfo.i3c); 2620 2621 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2622 if (ret) 2623 return ret; 2624 2625 device_initialize(&master->dev); 2626 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2627 2628 ret = of_populate_i3c_bus(master); 2629 if (ret) 2630 goto err_put_dev; 2631 2632 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2633 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2634 case I3C_LVR_I2C_INDEX(0): 2635 if (mode < I3C_BUS_MODE_MIXED_FAST) 2636 mode = I3C_BUS_MODE_MIXED_FAST; 2637 break; 2638 case I3C_LVR_I2C_INDEX(1): 2639 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2640 mode = I3C_BUS_MODE_MIXED_LIMITED; 2641 break; 2642 case I3C_LVR_I2C_INDEX(2): 2643 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2644 mode = I3C_BUS_MODE_MIXED_SLOW; 2645 break; 2646 default: 2647 ret = -EINVAL; 2648 goto err_put_dev; 2649 } 2650 2651 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2652 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2653 } 2654 2655 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2656 if (ret) 2657 goto err_put_dev; 2658 2659 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2660 if (!master->wq) { 2661 ret = -ENOMEM; 2662 goto err_put_dev; 2663 } 2664 2665 ret = i3c_master_bus_init(master); 2666 if (ret) 2667 goto err_put_dev; 2668 2669 ret = device_add(&master->dev); 2670 if (ret) 2671 goto err_cleanup_bus; 2672 2673 /* 2674 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2675 * through the I2C subsystem. 2676 */ 2677 ret = i3c_master_i2c_adapter_init(master); 2678 if (ret) 2679 goto err_del_dev; 2680 2681 /* 2682 * We're done initializing the bus and the controller, we can now 2683 * register I3C devices discovered during the initial DAA. 2684 */ 2685 master->init_done = true; 2686 i3c_bus_normaluse_lock(&master->bus); 2687 i3c_master_register_new_i3c_devs(master); 2688 i3c_bus_normaluse_unlock(&master->bus); 2689 2690 return 0; 2691 2692 err_del_dev: 2693 device_del(&master->dev); 2694 2695 err_cleanup_bus: 2696 i3c_master_bus_cleanup(master); 2697 2698 err_put_dev: 2699 put_device(&master->dev); 2700 2701 return ret; 2702 } 2703 EXPORT_SYMBOL_GPL(i3c_master_register); 2704 2705 /** 2706 * i3c_master_unregister() - unregister an I3C master 2707 * @master: master used to send frames on the bus 2708 * 2709 * Basically undo everything done in i3c_master_register(). 2710 */ 2711 void i3c_master_unregister(struct i3c_master_controller *master) 2712 { 2713 i3c_master_i2c_adapter_cleanup(master); 2714 i3c_master_unregister_i3c_devs(master); 2715 i3c_master_bus_cleanup(master); 2716 device_unregister(&master->dev); 2717 } 2718 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2719 2720 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2721 { 2722 struct i3c_master_controller *master; 2723 2724 if (!dev) 2725 return -ENOENT; 2726 2727 master = i3c_dev_get_master(dev); 2728 if (!master) 2729 return -EINVAL; 2730 2731 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 2732 !dev->boardinfo->static_addr) 2733 return -EINVAL; 2734 2735 return i3c_master_setdasa_locked(master, dev->info.static_addr, 2736 dev->boardinfo->init_dyn_addr); 2737 } 2738 2739 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2740 struct i3c_priv_xfer *xfers, 2741 int nxfers) 2742 { 2743 struct i3c_master_controller *master; 2744 2745 if (!dev) 2746 return -ENOENT; 2747 2748 master = i3c_dev_get_master(dev); 2749 if (!master || !xfers) 2750 return -EINVAL; 2751 2752 if (!master->ops->priv_xfers) 2753 return -ENOTSUPP; 2754 2755 return master->ops->priv_xfers(dev, xfers, nxfers); 2756 } 2757 2758 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2759 { 2760 struct i3c_master_controller *master; 2761 int ret; 2762 2763 if (!dev->ibi) 2764 return -EINVAL; 2765 2766 master = i3c_dev_get_master(dev); 2767 ret = master->ops->disable_ibi(dev); 2768 if (ret) 2769 return ret; 2770 2771 reinit_completion(&dev->ibi->all_ibis_handled); 2772 if (atomic_read(&dev->ibi->pending_ibis)) 2773 wait_for_completion(&dev->ibi->all_ibis_handled); 2774 2775 dev->ibi->enabled = false; 2776 2777 return 0; 2778 } 2779 2780 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2781 { 2782 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2783 int ret; 2784 2785 if (!dev->ibi) 2786 return -EINVAL; 2787 2788 ret = master->ops->enable_ibi(dev); 2789 if (!ret) 2790 dev->ibi->enabled = true; 2791 2792 return ret; 2793 } 2794 2795 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2796 const struct i3c_ibi_setup *req) 2797 { 2798 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2799 struct i3c_device_ibi_info *ibi; 2800 int ret; 2801 2802 if (!master->ops->request_ibi) 2803 return -ENOTSUPP; 2804 2805 if (dev->ibi) 2806 return -EBUSY; 2807 2808 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2809 if (!ibi) 2810 return -ENOMEM; 2811 2812 atomic_set(&ibi->pending_ibis, 0); 2813 init_completion(&ibi->all_ibis_handled); 2814 ibi->handler = req->handler; 2815 ibi->max_payload_len = req->max_payload_len; 2816 ibi->num_slots = req->num_slots; 2817 2818 dev->ibi = ibi; 2819 ret = master->ops->request_ibi(dev, req); 2820 if (ret) { 2821 kfree(ibi); 2822 dev->ibi = NULL; 2823 } 2824 2825 return ret; 2826 } 2827 2828 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2829 { 2830 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2831 2832 if (!dev->ibi) 2833 return; 2834 2835 if (WARN_ON(dev->ibi->enabled)) 2836 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2837 2838 master->ops->free_ibi(dev); 2839 kfree(dev->ibi); 2840 dev->ibi = NULL; 2841 } 2842 2843 static int __init i3c_init(void) 2844 { 2845 int res; 2846 2847 res = of_alias_get_highest_id("i3c"); 2848 if (res >= 0) { 2849 mutex_lock(&i3c_core_lock); 2850 __i3c_first_dynamic_bus_num = res + 1; 2851 mutex_unlock(&i3c_core_lock); 2852 } 2853 2854 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 2855 if (res) 2856 return res; 2857 2858 res = bus_register(&i3c_bus_type); 2859 if (res) 2860 goto out_unreg_notifier; 2861 2862 return 0; 2863 2864 out_unreg_notifier: 2865 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 2866 2867 return res; 2868 } 2869 subsys_initcall(i3c_init); 2870 2871 static void __exit i3c_exit(void) 2872 { 2873 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 2874 idr_destroy(&i3c_bus_idr); 2875 bus_unregister(&i3c_bus_type); 2876 } 2877 module_exit(i3c_exit); 2878 2879 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 2880 MODULE_DESCRIPTION("I3C core"); 2881 MODULE_LICENSE("GPL v2"); 2882