1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 25 /** 26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 27 * @bus: I3C bus to take the lock on 28 * 29 * This function takes the bus lock so that no other operations can occur on 30 * the bus. This is needed for all kind of bus maintenance operation, like 31 * - enabling/disabling slave events 32 * - re-triggering DAA 33 * - changing the dynamic address of a device 34 * - relinquishing mastership 35 * - ... 36 * 37 * The reason for this kind of locking is that we don't want drivers and core 38 * logic to rely on I3C device information that could be changed behind their 39 * back. 40 */ 41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 42 { 43 down_write(&bus->lock); 44 } 45 46 /** 47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 48 * operation 49 * @bus: I3C bus to release the lock on 50 * 51 * Should be called when the bus maintenance operation is done. See 52 * i3c_bus_maintenance_lock() for more details on what these maintenance 53 * operations are. 54 */ 55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 56 { 57 up_write(&bus->lock); 58 } 59 60 /** 61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 62 * @bus: I3C bus to take the lock on 63 * 64 * This function takes the bus lock for any operation that is not a maintenance 65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 66 * maintenance operations). Basically all communications with I3C devices are 67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 68 * state or I3C dynamic address). 69 * 70 * Note that this lock is not guaranteeing serialization of normal operations. 71 * In other words, transfer requests passed to the I3C master can be submitted 72 * in parallel and I3C master drivers have to use their own locking to make 73 * sure two different communications are not inter-mixed, or access to the 74 * output/input queue is not done while the engine is busy. 75 */ 76 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 77 { 78 down_read(&bus->lock); 79 } 80 81 /** 82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 83 * @bus: I3C bus to release the lock on 84 * 85 * Should be called when a normal operation is done. See 86 * i3c_bus_normaluse_lock() for more details on what these normal operations 87 * are. 88 */ 89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 90 { 91 up_read(&bus->lock); 92 } 93 94 static struct i3c_master_controller * 95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 96 { 97 return container_of(i3cbus, struct i3c_master_controller, bus); 98 } 99 100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 101 { 102 return container_of(dev, struct i3c_master_controller, dev); 103 } 104 105 static const struct device_type i3c_device_type; 106 107 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 108 { 109 struct i3c_master_controller *master; 110 111 if (dev->type == &i3c_device_type) 112 return dev_to_i3cdev(dev)->bus; 113 114 master = dev_to_i3cmaster(dev); 115 116 return &master->bus; 117 } 118 119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 120 { 121 struct i3c_master_controller *master; 122 123 if (dev->type == &i3c_device_type) 124 return dev_to_i3cdev(dev)->desc; 125 126 master = dev_to_i3cmaster(dev); 127 128 return master->this; 129 } 130 131 static ssize_t bcr_show(struct device *dev, 132 struct device_attribute *da, 133 char *buf) 134 { 135 struct i3c_bus *bus = dev_to_i3cbus(dev); 136 struct i3c_dev_desc *desc; 137 ssize_t ret; 138 139 i3c_bus_normaluse_lock(bus); 140 desc = dev_to_i3cdesc(dev); 141 ret = sprintf(buf, "%x\n", desc->info.bcr); 142 i3c_bus_normaluse_unlock(bus); 143 144 return ret; 145 } 146 static DEVICE_ATTR_RO(bcr); 147 148 static ssize_t dcr_show(struct device *dev, 149 struct device_attribute *da, 150 char *buf) 151 { 152 struct i3c_bus *bus = dev_to_i3cbus(dev); 153 struct i3c_dev_desc *desc; 154 ssize_t ret; 155 156 i3c_bus_normaluse_lock(bus); 157 desc = dev_to_i3cdesc(dev); 158 ret = sprintf(buf, "%x\n", desc->info.dcr); 159 i3c_bus_normaluse_unlock(bus); 160 161 return ret; 162 } 163 static DEVICE_ATTR_RO(dcr); 164 165 static ssize_t pid_show(struct device *dev, 166 struct device_attribute *da, 167 char *buf) 168 { 169 struct i3c_bus *bus = dev_to_i3cbus(dev); 170 struct i3c_dev_desc *desc; 171 ssize_t ret; 172 173 i3c_bus_normaluse_lock(bus); 174 desc = dev_to_i3cdesc(dev); 175 ret = sprintf(buf, "%llx\n", desc->info.pid); 176 i3c_bus_normaluse_unlock(bus); 177 178 return ret; 179 } 180 static DEVICE_ATTR_RO(pid); 181 182 static ssize_t dynamic_address_show(struct device *dev, 183 struct device_attribute *da, 184 char *buf) 185 { 186 struct i3c_bus *bus = dev_to_i3cbus(dev); 187 struct i3c_dev_desc *desc; 188 ssize_t ret; 189 190 i3c_bus_normaluse_lock(bus); 191 desc = dev_to_i3cdesc(dev); 192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 193 i3c_bus_normaluse_unlock(bus); 194 195 return ret; 196 } 197 static DEVICE_ATTR_RO(dynamic_address); 198 199 static const char * const hdrcap_strings[] = { 200 "hdr-ddr", "hdr-tsp", "hdr-tsl", 201 }; 202 203 static ssize_t hdrcap_show(struct device *dev, 204 struct device_attribute *da, 205 char *buf) 206 { 207 struct i3c_bus *bus = dev_to_i3cbus(dev); 208 struct i3c_dev_desc *desc; 209 ssize_t offset = 0, ret; 210 unsigned long caps; 211 int mode; 212 213 i3c_bus_normaluse_lock(bus); 214 desc = dev_to_i3cdesc(dev); 215 caps = desc->info.hdr_cap; 216 for_each_set_bit(mode, &caps, 8) { 217 if (mode >= ARRAY_SIZE(hdrcap_strings)) 218 break; 219 220 if (!hdrcap_strings[mode]) 221 continue; 222 223 ret = sprintf(buf + offset, offset ? " %s" : "%s", 224 hdrcap_strings[mode]); 225 if (ret < 0) 226 goto out; 227 228 offset += ret; 229 } 230 231 ret = sprintf(buf + offset, "\n"); 232 if (ret < 0) 233 goto out; 234 235 ret = offset + ret; 236 237 out: 238 i3c_bus_normaluse_unlock(bus); 239 240 return ret; 241 } 242 static DEVICE_ATTR_RO(hdrcap); 243 244 static ssize_t modalias_show(struct device *dev, 245 struct device_attribute *da, char *buf) 246 { 247 struct i3c_device *i3c = dev_to_i3cdev(dev); 248 struct i3c_device_info devinfo; 249 u16 manuf, part, ext; 250 251 i3c_device_get_info(i3c, &devinfo); 252 manuf = I3C_PID_MANUF_ID(devinfo.pid); 253 part = I3C_PID_PART_ID(devinfo.pid); 254 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 255 256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 258 manuf); 259 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 261 devinfo.dcr, manuf, part, ext); 262 } 263 static DEVICE_ATTR_RO(modalias); 264 265 static struct attribute *i3c_device_attrs[] = { 266 &dev_attr_bcr.attr, 267 &dev_attr_dcr.attr, 268 &dev_attr_pid.attr, 269 &dev_attr_dynamic_address.attr, 270 &dev_attr_hdrcap.attr, 271 &dev_attr_modalias.attr, 272 NULL, 273 }; 274 ATTRIBUTE_GROUPS(i3c_device); 275 276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env) 277 { 278 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 279 struct i3c_device_info devinfo; 280 u16 manuf, part, ext; 281 282 i3c_device_get_info(i3cdev, &devinfo); 283 manuf = I3C_PID_MANUF_ID(devinfo.pid); 284 part = I3C_PID_PART_ID(devinfo.pid); 285 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 286 287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 289 devinfo.dcr, manuf); 290 291 return add_uevent_var(env, 292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 293 devinfo.dcr, manuf, part, ext); 294 } 295 296 static const struct device_type i3c_device_type = { 297 .groups = i3c_device_groups, 298 .uevent = i3c_device_uevent, 299 }; 300 301 static int i3c_device_match(struct device *dev, struct device_driver *drv) 302 { 303 struct i3c_device *i3cdev; 304 struct i3c_driver *i3cdrv; 305 306 if (dev->type != &i3c_device_type) 307 return 0; 308 309 i3cdev = dev_to_i3cdev(dev); 310 i3cdrv = drv_to_i3cdrv(drv); 311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 312 return 1; 313 314 return 0; 315 } 316 317 static int i3c_device_probe(struct device *dev) 318 { 319 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 321 322 return driver->probe(i3cdev); 323 } 324 325 static int i3c_device_remove(struct device *dev) 326 { 327 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 329 330 if (driver->remove) 331 driver->remove(i3cdev); 332 333 i3c_device_free_ibi(i3cdev); 334 335 return 0; 336 } 337 338 struct bus_type i3c_bus_type = { 339 .name = "i3c", 340 .match = i3c_device_match, 341 .probe = i3c_device_probe, 342 .remove = i3c_device_remove, 343 }; 344 345 static enum i3c_addr_slot_status 346 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 347 { 348 int status, bitpos = addr * 2; 349 350 if (addr > I2C_MAX_ADDR) 351 return I3C_ADDR_SLOT_RSVD; 352 353 status = bus->addrslots[bitpos / BITS_PER_LONG]; 354 status >>= bitpos % BITS_PER_LONG; 355 356 return status & I3C_ADDR_SLOT_STATUS_MASK; 357 } 358 359 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 360 enum i3c_addr_slot_status status) 361 { 362 int bitpos = addr * 2; 363 unsigned long *ptr; 364 365 if (addr > I2C_MAX_ADDR) 366 return; 367 368 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 369 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 370 (bitpos % BITS_PER_LONG)); 371 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 372 } 373 374 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 375 { 376 enum i3c_addr_slot_status status; 377 378 status = i3c_bus_get_addr_slot_status(bus, addr); 379 380 return status == I3C_ADDR_SLOT_FREE; 381 } 382 383 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 384 { 385 enum i3c_addr_slot_status status; 386 u8 addr; 387 388 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 389 status = i3c_bus_get_addr_slot_status(bus, addr); 390 if (status == I3C_ADDR_SLOT_FREE) 391 return addr; 392 } 393 394 return -ENOMEM; 395 } 396 397 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 398 { 399 int i; 400 401 /* Addresses 0 to 7 are reserved. */ 402 for (i = 0; i < 8; i++) 403 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 404 405 /* 406 * Reserve broadcast address and all addresses that might collide 407 * with the broadcast address when facing a single bit error. 408 */ 409 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 410 I3C_ADDR_SLOT_RSVD); 411 for (i = 0; i < 7; i++) 412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 413 I3C_ADDR_SLOT_RSVD); 414 } 415 416 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 417 { 418 mutex_lock(&i3c_core_lock); 419 idr_remove(&i3c_bus_idr, i3cbus->id); 420 mutex_unlock(&i3c_core_lock); 421 } 422 423 static int i3c_bus_init(struct i3c_bus *i3cbus) 424 { 425 int ret; 426 427 init_rwsem(&i3cbus->lock); 428 INIT_LIST_HEAD(&i3cbus->devs.i2c); 429 INIT_LIST_HEAD(&i3cbus->devs.i3c); 430 i3c_bus_init_addrslots(i3cbus); 431 i3cbus->mode = I3C_BUS_MODE_PURE; 432 433 mutex_lock(&i3c_core_lock); 434 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL); 435 mutex_unlock(&i3c_core_lock); 436 437 if (ret < 0) 438 return ret; 439 440 i3cbus->id = ret; 441 442 return 0; 443 } 444 445 static const char * const i3c_bus_mode_strings[] = { 446 [I3C_BUS_MODE_PURE] = "pure", 447 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 448 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 449 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 450 }; 451 452 static ssize_t mode_show(struct device *dev, 453 struct device_attribute *da, 454 char *buf) 455 { 456 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 457 ssize_t ret; 458 459 i3c_bus_normaluse_lock(i3cbus); 460 if (i3cbus->mode < 0 || 461 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 462 !i3c_bus_mode_strings[i3cbus->mode]) 463 ret = sprintf(buf, "unknown\n"); 464 else 465 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 466 i3c_bus_normaluse_unlock(i3cbus); 467 468 return ret; 469 } 470 static DEVICE_ATTR_RO(mode); 471 472 static ssize_t current_master_show(struct device *dev, 473 struct device_attribute *da, 474 char *buf) 475 { 476 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 477 ssize_t ret; 478 479 i3c_bus_normaluse_lock(i3cbus); 480 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 481 i3cbus->cur_master->info.pid); 482 i3c_bus_normaluse_unlock(i3cbus); 483 484 return ret; 485 } 486 static DEVICE_ATTR_RO(current_master); 487 488 static ssize_t i3c_scl_frequency_show(struct device *dev, 489 struct device_attribute *da, 490 char *buf) 491 { 492 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 493 ssize_t ret; 494 495 i3c_bus_normaluse_lock(i3cbus); 496 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 497 i3c_bus_normaluse_unlock(i3cbus); 498 499 return ret; 500 } 501 static DEVICE_ATTR_RO(i3c_scl_frequency); 502 503 static ssize_t i2c_scl_frequency_show(struct device *dev, 504 struct device_attribute *da, 505 char *buf) 506 { 507 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 508 ssize_t ret; 509 510 i3c_bus_normaluse_lock(i3cbus); 511 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 512 i3c_bus_normaluse_unlock(i3cbus); 513 514 return ret; 515 } 516 static DEVICE_ATTR_RO(i2c_scl_frequency); 517 518 static struct attribute *i3c_masterdev_attrs[] = { 519 &dev_attr_mode.attr, 520 &dev_attr_current_master.attr, 521 &dev_attr_i3c_scl_frequency.attr, 522 &dev_attr_i2c_scl_frequency.attr, 523 &dev_attr_bcr.attr, 524 &dev_attr_dcr.attr, 525 &dev_attr_pid.attr, 526 &dev_attr_dynamic_address.attr, 527 &dev_attr_hdrcap.attr, 528 NULL, 529 }; 530 ATTRIBUTE_GROUPS(i3c_masterdev); 531 532 static void i3c_masterdev_release(struct device *dev) 533 { 534 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 535 struct i3c_bus *bus = dev_to_i3cbus(dev); 536 537 if (master->wq) 538 destroy_workqueue(master->wq); 539 540 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 541 i3c_bus_cleanup(bus); 542 543 of_node_put(dev->of_node); 544 } 545 546 static const struct device_type i3c_masterdev_type = { 547 .groups = i3c_masterdev_groups, 548 }; 549 550 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 551 unsigned long max_i2c_scl_rate) 552 { 553 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 554 555 i3cbus->mode = mode; 556 557 switch (i3cbus->mode) { 558 case I3C_BUS_MODE_PURE: 559 if (!i3cbus->scl_rate.i3c) 560 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 561 break; 562 case I3C_BUS_MODE_MIXED_FAST: 563 case I3C_BUS_MODE_MIXED_LIMITED: 564 if (!i3cbus->scl_rate.i3c) 565 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 566 if (!i3cbus->scl_rate.i2c) 567 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 568 break; 569 case I3C_BUS_MODE_MIXED_SLOW: 570 if (!i3cbus->scl_rate.i2c) 571 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 572 if (!i3cbus->scl_rate.i3c || 573 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 574 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 575 break; 576 default: 577 return -EINVAL; 578 } 579 580 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 581 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 582 583 /* 584 * I3C/I2C frequency may have been overridden, check that user-provided 585 * values are not exceeding max possible frequency. 586 */ 587 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 588 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 589 return -EINVAL; 590 591 return 0; 592 } 593 594 static struct i3c_master_controller * 595 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 596 { 597 return container_of(adap, struct i3c_master_controller, i2c); 598 } 599 600 static struct i2c_adapter * 601 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 602 { 603 return &master->i2c; 604 } 605 606 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 607 { 608 kfree(dev); 609 } 610 611 static struct i2c_dev_desc * 612 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 613 const struct i2c_dev_boardinfo *boardinfo) 614 { 615 struct i2c_dev_desc *dev; 616 617 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 618 if (!dev) 619 return ERR_PTR(-ENOMEM); 620 621 dev->common.master = master; 622 dev->boardinfo = boardinfo; 623 dev->addr = boardinfo->base.addr; 624 dev->lvr = boardinfo->lvr; 625 626 return dev; 627 } 628 629 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 630 u16 payloadlen) 631 { 632 dest->addr = addr; 633 dest->payload.len = payloadlen; 634 if (payloadlen) 635 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 636 else 637 dest->payload.data = NULL; 638 639 return dest->payload.data; 640 } 641 642 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 643 { 644 kfree(dest->payload.data); 645 } 646 647 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 648 struct i3c_ccc_cmd_dest *dests, 649 unsigned int ndests) 650 { 651 cmd->rnw = rnw ? 1 : 0; 652 cmd->id = id; 653 cmd->dests = dests; 654 cmd->ndests = ndests; 655 cmd->err = I3C_ERROR_UNKNOWN; 656 } 657 658 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 659 struct i3c_ccc_cmd *cmd) 660 { 661 int ret; 662 663 if (!cmd || !master) 664 return -EINVAL; 665 666 if (WARN_ON(master->init_done && 667 !rwsem_is_locked(&master->bus.lock))) 668 return -EINVAL; 669 670 if (!master->ops->send_ccc_cmd) 671 return -ENOTSUPP; 672 673 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 674 return -EINVAL; 675 676 if (master->ops->supports_ccc_cmd && 677 !master->ops->supports_ccc_cmd(master, cmd)) 678 return -ENOTSUPP; 679 680 ret = master->ops->send_ccc_cmd(master, cmd); 681 if (ret) { 682 if (cmd->err != I3C_ERROR_UNKNOWN) 683 return cmd->err; 684 685 return ret; 686 } 687 688 return 0; 689 } 690 691 static struct i2c_dev_desc * 692 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 693 u16 addr) 694 { 695 struct i2c_dev_desc *dev; 696 697 i3c_bus_for_each_i2cdev(&master->bus, dev) { 698 if (dev->boardinfo->base.addr == addr) 699 return dev; 700 } 701 702 return NULL; 703 } 704 705 /** 706 * i3c_master_get_free_addr() - get a free address on the bus 707 * @master: I3C master object 708 * @start_addr: where to start searching 709 * 710 * This function must be called with the bus lock held in write mode. 711 * 712 * Return: the first free address starting at @start_addr (included) or -ENOMEM 713 * if there's no more address available. 714 */ 715 int i3c_master_get_free_addr(struct i3c_master_controller *master, 716 u8 start_addr) 717 { 718 return i3c_bus_get_free_addr(&master->bus, start_addr); 719 } 720 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 721 722 static void i3c_device_release(struct device *dev) 723 { 724 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 725 726 WARN_ON(i3cdev->desc); 727 728 of_node_put(i3cdev->dev.of_node); 729 kfree(i3cdev); 730 } 731 732 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 733 { 734 kfree(dev); 735 } 736 737 static struct i3c_dev_desc * 738 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 739 const struct i3c_device_info *info) 740 { 741 struct i3c_dev_desc *dev; 742 743 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 744 if (!dev) 745 return ERR_PTR(-ENOMEM); 746 747 dev->common.master = master; 748 dev->info = *info; 749 mutex_init(&dev->ibi_lock); 750 751 return dev; 752 } 753 754 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 755 u8 addr) 756 { 757 enum i3c_addr_slot_status addrstat; 758 struct i3c_ccc_cmd_dest dest; 759 struct i3c_ccc_cmd cmd; 760 int ret; 761 762 if (!master) 763 return -EINVAL; 764 765 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 766 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 767 return -EINVAL; 768 769 i3c_ccc_cmd_dest_init(&dest, addr, 0); 770 i3c_ccc_cmd_init(&cmd, false, 771 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 772 &dest, 1); 773 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 774 i3c_ccc_cmd_dest_cleanup(&dest); 775 776 return ret; 777 } 778 779 /** 780 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 781 * procedure 782 * @master: master used to send frames on the bus 783 * 784 * Send a ENTDAA CCC command to start a DAA procedure. 785 * 786 * Note that this function only sends the ENTDAA CCC command, all the logic 787 * behind dynamic address assignment has to be handled in the I3C master 788 * driver. 789 * 790 * This function must be called with the bus lock held in write mode. 791 * 792 * Return: 0 in case of success, a positive I3C error code if the error is 793 * one of the official Mx error codes, and a negative error code otherwise. 794 */ 795 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 796 { 797 struct i3c_ccc_cmd_dest dest; 798 struct i3c_ccc_cmd cmd; 799 int ret; 800 801 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 802 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 803 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 804 i3c_ccc_cmd_dest_cleanup(&dest); 805 806 return ret; 807 } 808 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 809 810 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 811 u8 addr, bool enable, u8 evts) 812 { 813 struct i3c_ccc_events *events; 814 struct i3c_ccc_cmd_dest dest; 815 struct i3c_ccc_cmd cmd; 816 int ret; 817 818 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 819 if (!events) 820 return -ENOMEM; 821 822 events->events = evts; 823 i3c_ccc_cmd_init(&cmd, false, 824 enable ? 825 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 826 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 827 &dest, 1); 828 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 829 i3c_ccc_cmd_dest_cleanup(&dest); 830 831 return ret; 832 } 833 834 /** 835 * i3c_master_disec_locked() - send a DISEC CCC command 836 * @master: master used to send frames on the bus 837 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 838 * @evts: events to disable 839 * 840 * Send a DISEC CCC command to disable some or all events coming from a 841 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 842 * 843 * This function must be called with the bus lock held in write mode. 844 * 845 * Return: 0 in case of success, a positive I3C error code if the error is 846 * one of the official Mx error codes, and a negative error code otherwise. 847 */ 848 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 849 u8 evts) 850 { 851 return i3c_master_enec_disec_locked(master, addr, false, evts); 852 } 853 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 854 855 /** 856 * i3c_master_enec_locked() - send an ENEC CCC command 857 * @master: master used to send frames on the bus 858 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 859 * @evts: events to disable 860 * 861 * Sends an ENEC CCC command to enable some or all events coming from a 862 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 863 * 864 * This function must be called with the bus lock held in write mode. 865 * 866 * Return: 0 in case of success, a positive I3C error code if the error is 867 * one of the official Mx error codes, and a negative error code otherwise. 868 */ 869 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 870 u8 evts) 871 { 872 return i3c_master_enec_disec_locked(master, addr, true, evts); 873 } 874 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 875 876 /** 877 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 878 * @master: master used to send frames on the bus 879 * 880 * Send a DEFSLVS CCC command containing all the devices known to the @master. 881 * This is useful when you have secondary masters on the bus to propagate 882 * device information. 883 * 884 * This should be called after all I3C devices have been discovered (in other 885 * words, after the DAA procedure has finished) and instantiated in 886 * &i3c_master_controller_ops->bus_init(). 887 * It should also be called if a master ACKed an Hot-Join request and assigned 888 * a dynamic address to the device joining the bus. 889 * 890 * This function must be called with the bus lock held in write mode. 891 * 892 * Return: 0 in case of success, a positive I3C error code if the error is 893 * one of the official Mx error codes, and a negative error code otherwise. 894 */ 895 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 896 { 897 struct i3c_ccc_defslvs *defslvs; 898 struct i3c_ccc_dev_desc *desc; 899 struct i3c_ccc_cmd_dest dest; 900 struct i3c_dev_desc *i3cdev; 901 struct i2c_dev_desc *i2cdev; 902 struct i3c_ccc_cmd cmd; 903 struct i3c_bus *bus; 904 bool send = false; 905 int ndevs = 0, ret; 906 907 if (!master) 908 return -EINVAL; 909 910 bus = i3c_master_get_bus(master); 911 i3c_bus_for_each_i3cdev(bus, i3cdev) { 912 ndevs++; 913 914 if (i3cdev == master->this) 915 continue; 916 917 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 918 I3C_BCR_I3C_MASTER) 919 send = true; 920 } 921 922 /* No other master on the bus, skip DEFSLVS. */ 923 if (!send) 924 return 0; 925 926 i3c_bus_for_each_i2cdev(bus, i2cdev) 927 ndevs++; 928 929 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 930 struct_size(defslvs, slaves, 931 ndevs - 1)); 932 if (!defslvs) 933 return -ENOMEM; 934 935 defslvs->count = ndevs; 936 defslvs->master.bcr = master->this->info.bcr; 937 defslvs->master.dcr = master->this->info.dcr; 938 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 939 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 940 941 desc = defslvs->slaves; 942 i3c_bus_for_each_i2cdev(bus, i2cdev) { 943 desc->lvr = i2cdev->lvr; 944 desc->static_addr = i2cdev->addr << 1; 945 desc++; 946 } 947 948 i3c_bus_for_each_i3cdev(bus, i3cdev) { 949 /* Skip the I3C dev representing this master. */ 950 if (i3cdev == master->this) 951 continue; 952 953 desc->bcr = i3cdev->info.bcr; 954 desc->dcr = i3cdev->info.dcr; 955 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 956 desc->static_addr = i3cdev->info.static_addr << 1; 957 desc++; 958 } 959 960 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 961 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 962 i3c_ccc_cmd_dest_cleanup(&dest); 963 964 return ret; 965 } 966 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 967 968 static int i3c_master_setda_locked(struct i3c_master_controller *master, 969 u8 oldaddr, u8 newaddr, bool setdasa) 970 { 971 struct i3c_ccc_cmd_dest dest; 972 struct i3c_ccc_setda *setda; 973 struct i3c_ccc_cmd cmd; 974 int ret; 975 976 if (!oldaddr || !newaddr) 977 return -EINVAL; 978 979 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 980 if (!setda) 981 return -ENOMEM; 982 983 setda->addr = newaddr << 1; 984 i3c_ccc_cmd_init(&cmd, false, 985 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 986 &dest, 1); 987 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 988 i3c_ccc_cmd_dest_cleanup(&dest); 989 990 return ret; 991 } 992 993 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 994 u8 static_addr, u8 dyn_addr) 995 { 996 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 997 } 998 999 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1000 u8 oldaddr, u8 newaddr) 1001 { 1002 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1003 } 1004 1005 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1006 struct i3c_device_info *info) 1007 { 1008 struct i3c_ccc_cmd_dest dest; 1009 struct i3c_ccc_mrl *mrl; 1010 struct i3c_ccc_cmd cmd; 1011 int ret; 1012 1013 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1014 if (!mrl) 1015 return -ENOMEM; 1016 1017 /* 1018 * When the device does not have IBI payload GETMRL only returns 2 1019 * bytes of data. 1020 */ 1021 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1022 dest.payload.len -= 1; 1023 1024 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1025 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1026 if (ret) 1027 goto out; 1028 1029 switch (dest.payload.len) { 1030 case 3: 1031 info->max_ibi_len = mrl->ibi_len; 1032 fallthrough; 1033 case 2: 1034 info->max_read_len = be16_to_cpu(mrl->read_len); 1035 break; 1036 default: 1037 ret = -EIO; 1038 goto out; 1039 } 1040 1041 out: 1042 i3c_ccc_cmd_dest_cleanup(&dest); 1043 1044 return ret; 1045 } 1046 1047 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1048 struct i3c_device_info *info) 1049 { 1050 struct i3c_ccc_cmd_dest dest; 1051 struct i3c_ccc_mwl *mwl; 1052 struct i3c_ccc_cmd cmd; 1053 int ret; 1054 1055 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1056 if (!mwl) 1057 return -ENOMEM; 1058 1059 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1060 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1061 if (ret) 1062 goto out; 1063 1064 if (dest.payload.len != sizeof(*mwl)) { 1065 ret = -EIO; 1066 goto out; 1067 } 1068 1069 info->max_write_len = be16_to_cpu(mwl->len); 1070 1071 out: 1072 i3c_ccc_cmd_dest_cleanup(&dest); 1073 1074 return ret; 1075 } 1076 1077 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1078 struct i3c_device_info *info) 1079 { 1080 struct i3c_ccc_getmxds *getmaxds; 1081 struct i3c_ccc_cmd_dest dest; 1082 struct i3c_ccc_cmd cmd; 1083 int ret; 1084 1085 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1086 sizeof(*getmaxds)); 1087 if (!getmaxds) 1088 return -ENOMEM; 1089 1090 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1091 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1092 if (ret) 1093 goto out; 1094 1095 if (dest.payload.len != 2 && dest.payload.len != 5) { 1096 ret = -EIO; 1097 goto out; 1098 } 1099 1100 info->max_read_ds = getmaxds->maxrd; 1101 info->max_write_ds = getmaxds->maxwr; 1102 if (dest.payload.len == 5) 1103 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1104 ((u32)getmaxds->maxrdturn[1] << 8) | 1105 ((u32)getmaxds->maxrdturn[2] << 16); 1106 1107 out: 1108 i3c_ccc_cmd_dest_cleanup(&dest); 1109 1110 return ret; 1111 } 1112 1113 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1114 struct i3c_device_info *info) 1115 { 1116 struct i3c_ccc_gethdrcap *gethdrcap; 1117 struct i3c_ccc_cmd_dest dest; 1118 struct i3c_ccc_cmd cmd; 1119 int ret; 1120 1121 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1122 sizeof(*gethdrcap)); 1123 if (!gethdrcap) 1124 return -ENOMEM; 1125 1126 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1127 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1128 if (ret) 1129 goto out; 1130 1131 if (dest.payload.len != 1) { 1132 ret = -EIO; 1133 goto out; 1134 } 1135 1136 info->hdr_cap = gethdrcap->modes; 1137 1138 out: 1139 i3c_ccc_cmd_dest_cleanup(&dest); 1140 1141 return ret; 1142 } 1143 1144 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1145 struct i3c_device_info *info) 1146 { 1147 struct i3c_ccc_getpid *getpid; 1148 struct i3c_ccc_cmd_dest dest; 1149 struct i3c_ccc_cmd cmd; 1150 int ret, i; 1151 1152 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1153 if (!getpid) 1154 return -ENOMEM; 1155 1156 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1157 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1158 if (ret) 1159 goto out; 1160 1161 info->pid = 0; 1162 for (i = 0; i < sizeof(getpid->pid); i++) { 1163 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1164 1165 info->pid |= (u64)getpid->pid[i] << sft; 1166 } 1167 1168 out: 1169 i3c_ccc_cmd_dest_cleanup(&dest); 1170 1171 return ret; 1172 } 1173 1174 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1175 struct i3c_device_info *info) 1176 { 1177 struct i3c_ccc_getbcr *getbcr; 1178 struct i3c_ccc_cmd_dest dest; 1179 struct i3c_ccc_cmd cmd; 1180 int ret; 1181 1182 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1183 if (!getbcr) 1184 return -ENOMEM; 1185 1186 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1187 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1188 if (ret) 1189 goto out; 1190 1191 info->bcr = getbcr->bcr; 1192 1193 out: 1194 i3c_ccc_cmd_dest_cleanup(&dest); 1195 1196 return ret; 1197 } 1198 1199 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1200 struct i3c_device_info *info) 1201 { 1202 struct i3c_ccc_getdcr *getdcr; 1203 struct i3c_ccc_cmd_dest dest; 1204 struct i3c_ccc_cmd cmd; 1205 int ret; 1206 1207 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1208 if (!getdcr) 1209 return -ENOMEM; 1210 1211 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1212 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1213 if (ret) 1214 goto out; 1215 1216 info->dcr = getdcr->dcr; 1217 1218 out: 1219 i3c_ccc_cmd_dest_cleanup(&dest); 1220 1221 return ret; 1222 } 1223 1224 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1225 { 1226 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1227 enum i3c_addr_slot_status slot_status; 1228 int ret; 1229 1230 if (!dev->info.dyn_addr) 1231 return -EINVAL; 1232 1233 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1234 dev->info.dyn_addr); 1235 if (slot_status == I3C_ADDR_SLOT_RSVD || 1236 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1237 return -EINVAL; 1238 1239 ret = i3c_master_getpid_locked(master, &dev->info); 1240 if (ret) 1241 return ret; 1242 1243 ret = i3c_master_getbcr_locked(master, &dev->info); 1244 if (ret) 1245 return ret; 1246 1247 ret = i3c_master_getdcr_locked(master, &dev->info); 1248 if (ret) 1249 return ret; 1250 1251 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1252 ret = i3c_master_getmxds_locked(master, &dev->info); 1253 if (ret) 1254 return ret; 1255 } 1256 1257 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1258 dev->info.max_ibi_len = 1; 1259 1260 i3c_master_getmrl_locked(master, &dev->info); 1261 i3c_master_getmwl_locked(master, &dev->info); 1262 1263 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1264 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1265 if (ret) 1266 return ret; 1267 } 1268 1269 return 0; 1270 } 1271 1272 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1273 { 1274 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1275 1276 if (dev->info.static_addr) 1277 i3c_bus_set_addr_slot_status(&master->bus, 1278 dev->info.static_addr, 1279 I3C_ADDR_SLOT_FREE); 1280 1281 if (dev->info.dyn_addr) 1282 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1283 I3C_ADDR_SLOT_FREE); 1284 1285 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1286 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1287 I3C_ADDR_SLOT_FREE); 1288 } 1289 1290 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1291 { 1292 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1293 enum i3c_addr_slot_status status; 1294 1295 if (!dev->info.static_addr && !dev->info.dyn_addr) 1296 return 0; 1297 1298 if (dev->info.static_addr) { 1299 status = i3c_bus_get_addr_slot_status(&master->bus, 1300 dev->info.static_addr); 1301 if (status != I3C_ADDR_SLOT_FREE) 1302 return -EBUSY; 1303 1304 i3c_bus_set_addr_slot_status(&master->bus, 1305 dev->info.static_addr, 1306 I3C_ADDR_SLOT_I3C_DEV); 1307 } 1308 1309 /* 1310 * ->init_dyn_addr should have been reserved before that, so, if we're 1311 * trying to apply a pre-reserved dynamic address, we should not try 1312 * to reserve the address slot a second time. 1313 */ 1314 if (dev->info.dyn_addr && 1315 (!dev->boardinfo || 1316 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1317 status = i3c_bus_get_addr_slot_status(&master->bus, 1318 dev->info.dyn_addr); 1319 if (status != I3C_ADDR_SLOT_FREE) 1320 goto err_release_static_addr; 1321 1322 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1323 I3C_ADDR_SLOT_I3C_DEV); 1324 } 1325 1326 return 0; 1327 1328 err_release_static_addr: 1329 if (dev->info.static_addr) 1330 i3c_bus_set_addr_slot_status(&master->bus, 1331 dev->info.static_addr, 1332 I3C_ADDR_SLOT_FREE); 1333 1334 return -EBUSY; 1335 } 1336 1337 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1338 struct i3c_dev_desc *dev) 1339 { 1340 int ret; 1341 1342 /* 1343 * We don't attach devices to the controller until they are 1344 * addressable on the bus. 1345 */ 1346 if (!dev->info.static_addr && !dev->info.dyn_addr) 1347 return 0; 1348 1349 ret = i3c_master_get_i3c_addrs(dev); 1350 if (ret) 1351 return ret; 1352 1353 /* Do not attach the master device itself. */ 1354 if (master->this != dev && master->ops->attach_i3c_dev) { 1355 ret = master->ops->attach_i3c_dev(dev); 1356 if (ret) { 1357 i3c_master_put_i3c_addrs(dev); 1358 return ret; 1359 } 1360 } 1361 1362 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1363 1364 return 0; 1365 } 1366 1367 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1368 u8 old_dyn_addr) 1369 { 1370 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1371 enum i3c_addr_slot_status status; 1372 int ret; 1373 1374 if (dev->info.dyn_addr != old_dyn_addr && 1375 (!dev->boardinfo || 1376 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1377 status = i3c_bus_get_addr_slot_status(&master->bus, 1378 dev->info.dyn_addr); 1379 if (status != I3C_ADDR_SLOT_FREE) 1380 return -EBUSY; 1381 i3c_bus_set_addr_slot_status(&master->bus, 1382 dev->info.dyn_addr, 1383 I3C_ADDR_SLOT_I3C_DEV); 1384 } 1385 1386 if (master->ops->reattach_i3c_dev) { 1387 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1388 if (ret) { 1389 i3c_master_put_i3c_addrs(dev); 1390 return ret; 1391 } 1392 } 1393 1394 return 0; 1395 } 1396 1397 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1398 { 1399 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1400 1401 /* Do not detach the master device itself. */ 1402 if (master->this != dev && master->ops->detach_i3c_dev) 1403 master->ops->detach_i3c_dev(dev); 1404 1405 i3c_master_put_i3c_addrs(dev); 1406 list_del(&dev->common.node); 1407 } 1408 1409 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1410 struct i2c_dev_desc *dev) 1411 { 1412 int ret; 1413 1414 if (master->ops->attach_i2c_dev) { 1415 ret = master->ops->attach_i2c_dev(dev); 1416 if (ret) 1417 return ret; 1418 } 1419 1420 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1421 1422 return 0; 1423 } 1424 1425 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1426 { 1427 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1428 1429 list_del(&dev->common.node); 1430 1431 if (master->ops->detach_i2c_dev) 1432 master->ops->detach_i2c_dev(dev); 1433 } 1434 1435 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1436 struct i3c_dev_boardinfo *boardinfo) 1437 { 1438 struct i3c_device_info info = { 1439 .static_addr = boardinfo->static_addr, 1440 }; 1441 struct i3c_dev_desc *i3cdev; 1442 int ret; 1443 1444 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1445 if (IS_ERR(i3cdev)) 1446 return -ENOMEM; 1447 1448 i3cdev->boardinfo = boardinfo; 1449 1450 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1451 if (ret) 1452 goto err_free_dev; 1453 1454 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1455 i3cdev->boardinfo->init_dyn_addr); 1456 if (ret) 1457 goto err_detach_dev; 1458 1459 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1460 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1461 if (ret) 1462 goto err_rstdaa; 1463 1464 ret = i3c_master_retrieve_dev_info(i3cdev); 1465 if (ret) 1466 goto err_rstdaa; 1467 1468 return 0; 1469 1470 err_rstdaa: 1471 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1472 err_detach_dev: 1473 i3c_master_detach_i3c_dev(i3cdev); 1474 err_free_dev: 1475 i3c_master_free_i3c_dev(i3cdev); 1476 1477 return ret; 1478 } 1479 1480 static void 1481 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1482 { 1483 struct i3c_dev_desc *desc; 1484 int ret; 1485 1486 if (!master->init_done) 1487 return; 1488 1489 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1490 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1491 continue; 1492 1493 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1494 if (!desc->dev) 1495 continue; 1496 1497 desc->dev->bus = &master->bus; 1498 desc->dev->desc = desc; 1499 desc->dev->dev.parent = &master->dev; 1500 desc->dev->dev.type = &i3c_device_type; 1501 desc->dev->dev.bus = &i3c_bus_type; 1502 desc->dev->dev.release = i3c_device_release; 1503 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1504 desc->info.pid); 1505 1506 if (desc->boardinfo) 1507 desc->dev->dev.of_node = desc->boardinfo->of_node; 1508 1509 ret = device_register(&desc->dev->dev); 1510 if (ret) 1511 dev_err(&master->dev, 1512 "Failed to add I3C device (err = %d)\n", ret); 1513 } 1514 } 1515 1516 /** 1517 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1518 * @master: master doing the DAA 1519 * 1520 * This function is instantiating an I3C device object and adding it to the 1521 * I3C device list. All device information are automatically retrieved using 1522 * standard CCC commands. 1523 * 1524 * The I3C device object is returned in case the master wants to attach 1525 * private data to it using i3c_dev_set_master_data(). 1526 * 1527 * This function must be called with the bus lock held in write mode. 1528 * 1529 * Return: a 0 in case of success, an negative error code otherwise. 1530 */ 1531 int i3c_master_do_daa(struct i3c_master_controller *master) 1532 { 1533 int ret; 1534 1535 i3c_bus_maintenance_lock(&master->bus); 1536 ret = master->ops->do_daa(master); 1537 i3c_bus_maintenance_unlock(&master->bus); 1538 1539 if (ret) 1540 return ret; 1541 1542 i3c_bus_normaluse_lock(&master->bus); 1543 i3c_master_register_new_i3c_devs(master); 1544 i3c_bus_normaluse_unlock(&master->bus); 1545 1546 return 0; 1547 } 1548 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1549 1550 /** 1551 * i3c_master_set_info() - set master device information 1552 * @master: master used to send frames on the bus 1553 * @info: I3C device information 1554 * 1555 * Set master device info. This should be called from 1556 * &i3c_master_controller_ops->bus_init(). 1557 * 1558 * Not all &i3c_device_info fields are meaningful for a master device. 1559 * Here is a list of fields that should be properly filled: 1560 * 1561 * - &i3c_device_info->dyn_addr 1562 * - &i3c_device_info->bcr 1563 * - &i3c_device_info->dcr 1564 * - &i3c_device_info->pid 1565 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1566 * &i3c_device_info->bcr 1567 * 1568 * This function must be called with the bus lock held in maintenance mode. 1569 * 1570 * Return: 0 if @info contains valid information (not every piece of 1571 * information can be checked, but we can at least make sure @info->dyn_addr 1572 * and @info->bcr are correct), -EINVAL otherwise. 1573 */ 1574 int i3c_master_set_info(struct i3c_master_controller *master, 1575 const struct i3c_device_info *info) 1576 { 1577 struct i3c_dev_desc *i3cdev; 1578 int ret; 1579 1580 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1581 return -EINVAL; 1582 1583 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1584 master->secondary) 1585 return -EINVAL; 1586 1587 if (master->this) 1588 return -EINVAL; 1589 1590 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1591 if (IS_ERR(i3cdev)) 1592 return PTR_ERR(i3cdev); 1593 1594 master->this = i3cdev; 1595 master->bus.cur_master = master->this; 1596 1597 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1598 if (ret) 1599 goto err_free_dev; 1600 1601 return 0; 1602 1603 err_free_dev: 1604 i3c_master_free_i3c_dev(i3cdev); 1605 1606 return ret; 1607 } 1608 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1609 1610 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1611 { 1612 struct i3c_dev_desc *i3cdev, *i3ctmp; 1613 struct i2c_dev_desc *i2cdev, *i2ctmp; 1614 1615 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1616 common.node) { 1617 i3c_master_detach_i3c_dev(i3cdev); 1618 1619 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1620 i3c_bus_set_addr_slot_status(&master->bus, 1621 i3cdev->boardinfo->init_dyn_addr, 1622 I3C_ADDR_SLOT_FREE); 1623 1624 i3c_master_free_i3c_dev(i3cdev); 1625 } 1626 1627 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1628 common.node) { 1629 i3c_master_detach_i2c_dev(i2cdev); 1630 i3c_bus_set_addr_slot_status(&master->bus, 1631 i2cdev->addr, 1632 I3C_ADDR_SLOT_FREE); 1633 i3c_master_free_i2c_dev(i2cdev); 1634 } 1635 } 1636 1637 /** 1638 * i3c_master_bus_init() - initialize an I3C bus 1639 * @master: main master initializing the bus 1640 * 1641 * This function is following all initialisation steps described in the I3C 1642 * specification: 1643 * 1644 * 1. Attach I2C devs to the master so that the master can fill its internal 1645 * device table appropriately 1646 * 1647 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1648 * the master controller. That's usually where the bus mode is selected 1649 * (pure bus or mixed fast/slow bus) 1650 * 1651 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1652 * particularly important when the bus was previously configured by someone 1653 * else (for example the bootloader) 1654 * 1655 * 4. Disable all slave events. 1656 * 1657 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1658 * also have static_addr, try to pre-assign dynamic addresses requested by 1659 * the FW with SETDASA and attach corresponding statically defined I3C 1660 * devices to the master. 1661 * 1662 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1663 * remaining I3C devices 1664 * 1665 * Once this is done, all I3C and I2C devices should be usable. 1666 * 1667 * Return: a 0 in case of success, an negative error code otherwise. 1668 */ 1669 static int i3c_master_bus_init(struct i3c_master_controller *master) 1670 { 1671 enum i3c_addr_slot_status status; 1672 struct i2c_dev_boardinfo *i2cboardinfo; 1673 struct i3c_dev_boardinfo *i3cboardinfo; 1674 struct i2c_dev_desc *i2cdev; 1675 int ret; 1676 1677 /* 1678 * First attach all devices with static definitions provided by the 1679 * FW. 1680 */ 1681 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1682 status = i3c_bus_get_addr_slot_status(&master->bus, 1683 i2cboardinfo->base.addr); 1684 if (status != I3C_ADDR_SLOT_FREE) { 1685 ret = -EBUSY; 1686 goto err_detach_devs; 1687 } 1688 1689 i3c_bus_set_addr_slot_status(&master->bus, 1690 i2cboardinfo->base.addr, 1691 I3C_ADDR_SLOT_I2C_DEV); 1692 1693 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo); 1694 if (IS_ERR(i2cdev)) { 1695 ret = PTR_ERR(i2cdev); 1696 goto err_detach_devs; 1697 } 1698 1699 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1700 if (ret) { 1701 i3c_master_free_i2c_dev(i2cdev); 1702 goto err_detach_devs; 1703 } 1704 } 1705 1706 /* 1707 * Now execute the controller specific ->bus_init() routine, which 1708 * might configure its internal logic to match the bus limitations. 1709 */ 1710 ret = master->ops->bus_init(master); 1711 if (ret) 1712 goto err_detach_devs; 1713 1714 /* 1715 * The master device should have been instantiated in ->bus_init(), 1716 * complain if this was not the case. 1717 */ 1718 if (!master->this) { 1719 dev_err(&master->dev, 1720 "master_set_info() was not called in ->bus_init()\n"); 1721 ret = -EINVAL; 1722 goto err_bus_cleanup; 1723 } 1724 1725 /* 1726 * Reset all dynamic address that may have been assigned before 1727 * (assigned by the bootloader for example). 1728 */ 1729 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1730 if (ret && ret != I3C_ERROR_M2) 1731 goto err_bus_cleanup; 1732 1733 /* Disable all slave events before starting DAA. */ 1734 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1735 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1736 I3C_CCC_EVENT_HJ); 1737 if (ret && ret != I3C_ERROR_M2) 1738 goto err_bus_cleanup; 1739 1740 /* 1741 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1742 * address and retrieve device information if needed. 1743 * In case pre-assign dynamic address fails, setting dynamic address to 1744 * the requested init_dyn_addr is retried after DAA is done in 1745 * i3c_master_add_i3c_dev_locked(). 1746 */ 1747 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1748 1749 /* 1750 * We don't reserve a dynamic address for devices that 1751 * don't explicitly request one. 1752 */ 1753 if (!i3cboardinfo->init_dyn_addr) 1754 continue; 1755 1756 ret = i3c_bus_get_addr_slot_status(&master->bus, 1757 i3cboardinfo->init_dyn_addr); 1758 if (ret != I3C_ADDR_SLOT_FREE) { 1759 ret = -EBUSY; 1760 goto err_rstdaa; 1761 } 1762 1763 i3c_bus_set_addr_slot_status(&master->bus, 1764 i3cboardinfo->init_dyn_addr, 1765 I3C_ADDR_SLOT_I3C_DEV); 1766 1767 /* 1768 * Only try to create/attach devices that have a static 1769 * address. Other devices will be created/attached when 1770 * DAA happens, and the requested dynamic address will 1771 * be set using SETNEWDA once those devices become 1772 * addressable. 1773 */ 1774 1775 if (i3cboardinfo->static_addr) 1776 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1777 } 1778 1779 ret = i3c_master_do_daa(master); 1780 if (ret) 1781 goto err_rstdaa; 1782 1783 return 0; 1784 1785 err_rstdaa: 1786 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1787 1788 err_bus_cleanup: 1789 if (master->ops->bus_cleanup) 1790 master->ops->bus_cleanup(master); 1791 1792 err_detach_devs: 1793 i3c_master_detach_free_devs(master); 1794 1795 return ret; 1796 } 1797 1798 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1799 { 1800 if (master->ops->bus_cleanup) 1801 master->ops->bus_cleanup(master); 1802 1803 i3c_master_detach_free_devs(master); 1804 } 1805 1806 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1807 { 1808 struct i3c_master_controller *master = i3cdev->common.master; 1809 struct i3c_dev_boardinfo *i3cboardinfo; 1810 1811 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1812 if (i3cdev->info.pid != i3cboardinfo->pid) 1813 continue; 1814 1815 i3cdev->boardinfo = i3cboardinfo; 1816 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1817 return; 1818 } 1819 } 1820 1821 static struct i3c_dev_desc * 1822 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1823 { 1824 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1825 struct i3c_dev_desc *i3cdev; 1826 1827 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1828 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1829 return i3cdev; 1830 } 1831 1832 return NULL; 1833 } 1834 1835 /** 1836 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1837 * @master: master used to send frames on the bus 1838 * @addr: I3C slave dynamic address assigned to the device 1839 * 1840 * This function is instantiating an I3C device object and adding it to the 1841 * I3C device list. All device information are automatically retrieved using 1842 * standard CCC commands. 1843 * 1844 * The I3C device object is returned in case the master wants to attach 1845 * private data to it using i3c_dev_set_master_data(). 1846 * 1847 * This function must be called with the bus lock held in write mode. 1848 * 1849 * Return: a 0 in case of success, an negative error code otherwise. 1850 */ 1851 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1852 u8 addr) 1853 { 1854 struct i3c_device_info info = { .dyn_addr = addr }; 1855 struct i3c_dev_desc *newdev, *olddev; 1856 u8 old_dyn_addr = addr, expected_dyn_addr; 1857 struct i3c_ibi_setup ibireq = { }; 1858 bool enable_ibi = false; 1859 int ret; 1860 1861 if (!master) 1862 return -EINVAL; 1863 1864 newdev = i3c_master_alloc_i3c_dev(master, &info); 1865 if (IS_ERR(newdev)) 1866 return PTR_ERR(newdev); 1867 1868 ret = i3c_master_attach_i3c_dev(master, newdev); 1869 if (ret) 1870 goto err_free_dev; 1871 1872 ret = i3c_master_retrieve_dev_info(newdev); 1873 if (ret) 1874 goto err_detach_dev; 1875 1876 i3c_master_attach_boardinfo(newdev); 1877 1878 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 1879 if (olddev) { 1880 newdev->dev = olddev->dev; 1881 if (newdev->dev) 1882 newdev->dev->desc = newdev; 1883 1884 /* 1885 * We need to restore the IBI state too, so let's save the 1886 * IBI information and try to restore them after olddev has 1887 * been detached+released and its IBI has been stopped and 1888 * the associated resources have been freed. 1889 */ 1890 mutex_lock(&olddev->ibi_lock); 1891 if (olddev->ibi) { 1892 ibireq.handler = olddev->ibi->handler; 1893 ibireq.max_payload_len = olddev->ibi->max_payload_len; 1894 ibireq.num_slots = olddev->ibi->num_slots; 1895 1896 if (olddev->ibi->enabled) { 1897 enable_ibi = true; 1898 i3c_dev_disable_ibi_locked(olddev); 1899 } 1900 1901 i3c_dev_free_ibi_locked(olddev); 1902 } 1903 mutex_unlock(&olddev->ibi_lock); 1904 1905 old_dyn_addr = olddev->info.dyn_addr; 1906 1907 i3c_master_detach_i3c_dev(olddev); 1908 i3c_master_free_i3c_dev(olddev); 1909 } 1910 1911 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1912 if (ret) 1913 goto err_detach_dev; 1914 1915 /* 1916 * Depending on our previous state, the expected dynamic address might 1917 * differ: 1918 * - if the device already had a dynamic address assigned, let's try to 1919 * re-apply this one 1920 * - if the device did not have a dynamic address and the firmware 1921 * requested a specific address, pick this one 1922 * - in any other case, keep the address automatically assigned by the 1923 * master 1924 */ 1925 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 1926 expected_dyn_addr = old_dyn_addr; 1927 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 1928 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 1929 else 1930 expected_dyn_addr = newdev->info.dyn_addr; 1931 1932 if (newdev->info.dyn_addr != expected_dyn_addr) { 1933 /* 1934 * Try to apply the expected dynamic address. If it fails, keep 1935 * the address assigned by the master. 1936 */ 1937 ret = i3c_master_setnewda_locked(master, 1938 newdev->info.dyn_addr, 1939 expected_dyn_addr); 1940 if (!ret) { 1941 old_dyn_addr = newdev->info.dyn_addr; 1942 newdev->info.dyn_addr = expected_dyn_addr; 1943 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1944 } else { 1945 dev_err(&master->dev, 1946 "Failed to assign reserved/old address to device %d%llx", 1947 master->bus.id, newdev->info.pid); 1948 } 1949 } 1950 1951 /* 1952 * Now is time to try to restore the IBI setup. If we're lucky, 1953 * everything works as before, otherwise, all we can do is complain. 1954 * FIXME: maybe we should add callback to inform the driver that it 1955 * should request the IBI again instead of trying to hide that from 1956 * him. 1957 */ 1958 if (ibireq.handler) { 1959 mutex_lock(&newdev->ibi_lock); 1960 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 1961 if (ret) { 1962 dev_err(&master->dev, 1963 "Failed to request IBI on device %d-%llx", 1964 master->bus.id, newdev->info.pid); 1965 } else if (enable_ibi) { 1966 ret = i3c_dev_enable_ibi_locked(newdev); 1967 if (ret) 1968 dev_err(&master->dev, 1969 "Failed to re-enable IBI on device %d-%llx", 1970 master->bus.id, newdev->info.pid); 1971 } 1972 mutex_unlock(&newdev->ibi_lock); 1973 } 1974 1975 return 0; 1976 1977 err_detach_dev: 1978 if (newdev->dev && newdev->dev->desc) 1979 newdev->dev->desc = NULL; 1980 1981 i3c_master_detach_i3c_dev(newdev); 1982 1983 err_free_dev: 1984 i3c_master_free_i3c_dev(newdev); 1985 1986 return ret; 1987 } 1988 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 1989 1990 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 1991 1992 static int 1993 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 1994 struct device_node *node, u32 *reg) 1995 { 1996 struct i2c_dev_boardinfo *boardinfo; 1997 struct device *dev = &master->dev; 1998 int ret; 1999 2000 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2001 if (!boardinfo) 2002 return -ENOMEM; 2003 2004 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2005 if (ret) 2006 return ret; 2007 2008 /* 2009 * The I3C Specification does not clearly say I2C devices with 10-bit 2010 * address are supported. These devices can't be passed properly through 2011 * DEFSLVS command. 2012 */ 2013 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2014 dev_err(dev, "I2C device with 10 bit address not supported."); 2015 return -ENOTSUPP; 2016 } 2017 2018 /* LVR is encoded in reg[2]. */ 2019 boardinfo->lvr = reg[2]; 2020 2021 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2022 of_node_get(node); 2023 2024 return 0; 2025 } 2026 2027 static int 2028 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2029 struct device_node *node, u32 *reg) 2030 { 2031 struct i3c_dev_boardinfo *boardinfo; 2032 struct device *dev = &master->dev; 2033 enum i3c_addr_slot_status addrstatus; 2034 u32 init_dyn_addr = 0; 2035 2036 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2037 if (!boardinfo) 2038 return -ENOMEM; 2039 2040 if (reg[0]) { 2041 if (reg[0] > I3C_MAX_ADDR) 2042 return -EINVAL; 2043 2044 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2045 reg[0]); 2046 if (addrstatus != I3C_ADDR_SLOT_FREE) 2047 return -EINVAL; 2048 } 2049 2050 boardinfo->static_addr = reg[0]; 2051 2052 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2053 if (init_dyn_addr > I3C_MAX_ADDR) 2054 return -EINVAL; 2055 2056 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2057 init_dyn_addr); 2058 if (addrstatus != I3C_ADDR_SLOT_FREE) 2059 return -EINVAL; 2060 } 2061 2062 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2063 2064 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2065 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2066 return -EINVAL; 2067 2068 boardinfo->init_dyn_addr = init_dyn_addr; 2069 boardinfo->of_node = of_node_get(node); 2070 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2071 2072 return 0; 2073 } 2074 2075 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2076 struct device_node *node) 2077 { 2078 u32 reg[3]; 2079 int ret; 2080 2081 if (!master || !node) 2082 return -EINVAL; 2083 2084 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2085 if (ret) 2086 return ret; 2087 2088 /* 2089 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2090 * dealing with an I2C device. 2091 */ 2092 if (!reg[1]) 2093 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2094 else 2095 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2096 2097 return ret; 2098 } 2099 2100 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2101 { 2102 struct device *dev = &master->dev; 2103 struct device_node *i3cbus_np = dev->of_node; 2104 struct device_node *node; 2105 int ret; 2106 u32 val; 2107 2108 if (!i3cbus_np) 2109 return 0; 2110 2111 for_each_available_child_of_node(i3cbus_np, node) { 2112 ret = of_i3c_master_add_dev(master, node); 2113 if (ret) { 2114 of_node_put(node); 2115 return ret; 2116 } 2117 } 2118 2119 /* 2120 * The user might want to limit I2C and I3C speed in case some devices 2121 * on the bus are not supporting typical rates, or if the bus topology 2122 * prevents it from using max possible rate. 2123 */ 2124 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2125 master->bus.scl_rate.i2c = val; 2126 2127 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2128 master->bus.scl_rate.i3c = val; 2129 2130 return 0; 2131 } 2132 2133 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2134 struct i2c_msg *xfers, int nxfers) 2135 { 2136 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2137 struct i2c_dev_desc *dev; 2138 int i, ret; 2139 u16 addr; 2140 2141 if (!xfers || !master || nxfers <= 0) 2142 return -EINVAL; 2143 2144 if (!master->ops->i2c_xfers) 2145 return -ENOTSUPP; 2146 2147 /* Doing transfers to different devices is not supported. */ 2148 addr = xfers[0].addr; 2149 for (i = 1; i < nxfers; i++) { 2150 if (addr != xfers[i].addr) 2151 return -ENOTSUPP; 2152 } 2153 2154 i3c_bus_normaluse_lock(&master->bus); 2155 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2156 if (!dev) 2157 ret = -ENOENT; 2158 else 2159 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2160 i3c_bus_normaluse_unlock(&master->bus); 2161 2162 return ret ? ret : nxfers; 2163 } 2164 2165 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2166 { 2167 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2168 } 2169 2170 static const struct i2c_algorithm i3c_master_i2c_algo = { 2171 .master_xfer = i3c_master_i2c_adapter_xfer, 2172 .functionality = i3c_master_i2c_funcs, 2173 }; 2174 2175 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2176 { 2177 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2178 struct i2c_dev_desc *i2cdev; 2179 int ret; 2180 2181 adap->dev.parent = master->dev.parent; 2182 adap->owner = master->dev.parent->driver->owner; 2183 adap->algo = &i3c_master_i2c_algo; 2184 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2185 2186 /* FIXME: Should we allow i3c masters to override these values? */ 2187 adap->timeout = 1000; 2188 adap->retries = 3; 2189 2190 ret = i2c_add_adapter(adap); 2191 if (ret) 2192 return ret; 2193 2194 /* 2195 * We silently ignore failures here. The bus should keep working 2196 * correctly even if one or more i2c devices are not registered. 2197 */ 2198 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2199 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base); 2200 2201 return 0; 2202 } 2203 2204 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2205 { 2206 struct i2c_dev_desc *i2cdev; 2207 2208 i2c_del_adapter(&master->i2c); 2209 2210 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2211 i2cdev->dev = NULL; 2212 } 2213 2214 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2215 { 2216 struct i3c_dev_desc *i3cdev; 2217 2218 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2219 if (!i3cdev->dev) 2220 continue; 2221 2222 i3cdev->dev->desc = NULL; 2223 if (device_is_registered(&i3cdev->dev->dev)) 2224 device_unregister(&i3cdev->dev->dev); 2225 else 2226 put_device(&i3cdev->dev->dev); 2227 i3cdev->dev = NULL; 2228 } 2229 } 2230 2231 /** 2232 * i3c_master_queue_ibi() - Queue an IBI 2233 * @dev: the device this IBI is coming from 2234 * @slot: the IBI slot used to store the payload 2235 * 2236 * Queue an IBI to the controller workqueue. The IBI handler attached to 2237 * the dev will be called from a workqueue context. 2238 */ 2239 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2240 { 2241 atomic_inc(&dev->ibi->pending_ibis); 2242 queue_work(dev->common.master->wq, &slot->work); 2243 } 2244 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2245 2246 static void i3c_master_handle_ibi(struct work_struct *work) 2247 { 2248 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2249 work); 2250 struct i3c_dev_desc *dev = slot->dev; 2251 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2252 struct i3c_ibi_payload payload; 2253 2254 payload.data = slot->data; 2255 payload.len = slot->len; 2256 2257 if (dev->dev) 2258 dev->ibi->handler(dev->dev, &payload); 2259 2260 master->ops->recycle_ibi_slot(dev, slot); 2261 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2262 complete(&dev->ibi->all_ibis_handled); 2263 } 2264 2265 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2266 struct i3c_ibi_slot *slot) 2267 { 2268 slot->dev = dev; 2269 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2270 } 2271 2272 struct i3c_generic_ibi_slot { 2273 struct list_head node; 2274 struct i3c_ibi_slot base; 2275 }; 2276 2277 struct i3c_generic_ibi_pool { 2278 spinlock_t lock; 2279 unsigned int num_slots; 2280 struct i3c_generic_ibi_slot *slots; 2281 void *payload_buf; 2282 struct list_head free_slots; 2283 struct list_head pending; 2284 }; 2285 2286 /** 2287 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2288 * @pool: the IBI pool to free 2289 * 2290 * Free all IBI slots allated by a generic IBI pool. 2291 */ 2292 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2293 { 2294 struct i3c_generic_ibi_slot *slot; 2295 unsigned int nslots = 0; 2296 2297 while (!list_empty(&pool->free_slots)) { 2298 slot = list_first_entry(&pool->free_slots, 2299 struct i3c_generic_ibi_slot, node); 2300 list_del(&slot->node); 2301 nslots++; 2302 } 2303 2304 /* 2305 * If the number of freed slots is not equal to the number of allocated 2306 * slots we have a leak somewhere. 2307 */ 2308 WARN_ON(nslots != pool->num_slots); 2309 2310 kfree(pool->payload_buf); 2311 kfree(pool->slots); 2312 kfree(pool); 2313 } 2314 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2315 2316 /** 2317 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2318 * @dev: the device this pool will be used for 2319 * @req: IBI setup request describing what the device driver expects 2320 * 2321 * Create a generic IBI pool based on the information provided in @req. 2322 * 2323 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2324 */ 2325 struct i3c_generic_ibi_pool * 2326 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2327 const struct i3c_ibi_setup *req) 2328 { 2329 struct i3c_generic_ibi_pool *pool; 2330 struct i3c_generic_ibi_slot *slot; 2331 unsigned int i; 2332 int ret; 2333 2334 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2335 if (!pool) 2336 return ERR_PTR(-ENOMEM); 2337 2338 spin_lock_init(&pool->lock); 2339 INIT_LIST_HEAD(&pool->free_slots); 2340 INIT_LIST_HEAD(&pool->pending); 2341 2342 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2343 if (!pool->slots) { 2344 ret = -ENOMEM; 2345 goto err_free_pool; 2346 } 2347 2348 if (req->max_payload_len) { 2349 pool->payload_buf = kcalloc(req->num_slots, 2350 req->max_payload_len, GFP_KERNEL); 2351 if (!pool->payload_buf) { 2352 ret = -ENOMEM; 2353 goto err_free_pool; 2354 } 2355 } 2356 2357 for (i = 0; i < req->num_slots; i++) { 2358 slot = &pool->slots[i]; 2359 i3c_master_init_ibi_slot(dev, &slot->base); 2360 2361 if (req->max_payload_len) 2362 slot->base.data = pool->payload_buf + 2363 (i * req->max_payload_len); 2364 2365 list_add_tail(&slot->node, &pool->free_slots); 2366 pool->num_slots++; 2367 } 2368 2369 return pool; 2370 2371 err_free_pool: 2372 i3c_generic_ibi_free_pool(pool); 2373 return ERR_PTR(ret); 2374 } 2375 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2376 2377 /** 2378 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2379 * @pool: the pool to query an IBI slot on 2380 * 2381 * Search for a free slot in a generic IBI pool. 2382 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2383 * when it's no longer needed. 2384 * 2385 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2386 */ 2387 struct i3c_ibi_slot * 2388 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2389 { 2390 struct i3c_generic_ibi_slot *slot; 2391 unsigned long flags; 2392 2393 spin_lock_irqsave(&pool->lock, flags); 2394 slot = list_first_entry_or_null(&pool->free_slots, 2395 struct i3c_generic_ibi_slot, node); 2396 if (slot) 2397 list_del(&slot->node); 2398 spin_unlock_irqrestore(&pool->lock, flags); 2399 2400 return slot ? &slot->base : NULL; 2401 } 2402 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2403 2404 /** 2405 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2406 * @pool: the pool to return the IBI slot to 2407 * @s: IBI slot to recycle 2408 * 2409 * Add an IBI slot back to its generic IBI pool. Should be called from the 2410 * master driver struct_master_controller_ops->recycle_ibi() method. 2411 */ 2412 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2413 struct i3c_ibi_slot *s) 2414 { 2415 struct i3c_generic_ibi_slot *slot; 2416 unsigned long flags; 2417 2418 if (!s) 2419 return; 2420 2421 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2422 spin_lock_irqsave(&pool->lock, flags); 2423 list_add_tail(&slot->node, &pool->free_slots); 2424 spin_unlock_irqrestore(&pool->lock, flags); 2425 } 2426 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2427 2428 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2429 { 2430 if (!ops || !ops->bus_init || !ops->priv_xfers || 2431 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2432 return -EINVAL; 2433 2434 if (ops->request_ibi && 2435 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2436 !ops->recycle_ibi_slot)) 2437 return -EINVAL; 2438 2439 return 0; 2440 } 2441 2442 /** 2443 * i3c_master_register() - register an I3C master 2444 * @master: master used to send frames on the bus 2445 * @parent: the parent device (the one that provides this I3C master 2446 * controller) 2447 * @ops: the master controller operations 2448 * @secondary: true if you are registering a secondary master. Will return 2449 * -ENOTSUPP if set to true since secondary masters are not yet 2450 * supported 2451 * 2452 * This function takes care of everything for you: 2453 * 2454 * - creates and initializes the I3C bus 2455 * - populates the bus with static I2C devs if @parent->of_node is not 2456 * NULL 2457 * - registers all I3C devices added by the controller during bus 2458 * initialization 2459 * - registers the I2C adapter and all I2C devices 2460 * 2461 * Return: 0 in case of success, a negative error code otherwise. 2462 */ 2463 int i3c_master_register(struct i3c_master_controller *master, 2464 struct device *parent, 2465 const struct i3c_master_controller_ops *ops, 2466 bool secondary) 2467 { 2468 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2469 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2470 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2471 struct i2c_dev_boardinfo *i2cbi; 2472 int ret; 2473 2474 /* We do not support secondary masters yet. */ 2475 if (secondary) 2476 return -ENOTSUPP; 2477 2478 ret = i3c_master_check_ops(ops); 2479 if (ret) 2480 return ret; 2481 2482 master->dev.parent = parent; 2483 master->dev.of_node = of_node_get(parent->of_node); 2484 master->dev.bus = &i3c_bus_type; 2485 master->dev.type = &i3c_masterdev_type; 2486 master->dev.release = i3c_masterdev_release; 2487 master->ops = ops; 2488 master->secondary = secondary; 2489 INIT_LIST_HEAD(&master->boardinfo.i2c); 2490 INIT_LIST_HEAD(&master->boardinfo.i3c); 2491 2492 ret = i3c_bus_init(i3cbus); 2493 if (ret) 2494 return ret; 2495 2496 device_initialize(&master->dev); 2497 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2498 2499 ret = of_populate_i3c_bus(master); 2500 if (ret) 2501 goto err_put_dev; 2502 2503 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2504 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2505 case I3C_LVR_I2C_INDEX(0): 2506 if (mode < I3C_BUS_MODE_MIXED_FAST) 2507 mode = I3C_BUS_MODE_MIXED_FAST; 2508 break; 2509 case I3C_LVR_I2C_INDEX(1): 2510 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2511 mode = I3C_BUS_MODE_MIXED_LIMITED; 2512 break; 2513 case I3C_LVR_I2C_INDEX(2): 2514 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2515 mode = I3C_BUS_MODE_MIXED_SLOW; 2516 break; 2517 default: 2518 ret = -EINVAL; 2519 goto err_put_dev; 2520 } 2521 2522 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2523 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2524 } 2525 2526 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2527 if (ret) 2528 goto err_put_dev; 2529 2530 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2531 if (!master->wq) { 2532 ret = -ENOMEM; 2533 goto err_put_dev; 2534 } 2535 2536 ret = i3c_master_bus_init(master); 2537 if (ret) 2538 goto err_destroy_wq; 2539 2540 ret = device_add(&master->dev); 2541 if (ret) 2542 goto err_cleanup_bus; 2543 2544 /* 2545 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2546 * through the I2C subsystem. 2547 */ 2548 ret = i3c_master_i2c_adapter_init(master); 2549 if (ret) 2550 goto err_del_dev; 2551 2552 /* 2553 * We're done initializing the bus and the controller, we can now 2554 * register I3C devices discovered during the initial DAA. 2555 */ 2556 master->init_done = true; 2557 i3c_bus_normaluse_lock(&master->bus); 2558 i3c_master_register_new_i3c_devs(master); 2559 i3c_bus_normaluse_unlock(&master->bus); 2560 2561 return 0; 2562 2563 err_del_dev: 2564 device_del(&master->dev); 2565 2566 err_cleanup_bus: 2567 i3c_master_bus_cleanup(master); 2568 2569 err_destroy_wq: 2570 destroy_workqueue(master->wq); 2571 2572 err_put_dev: 2573 put_device(&master->dev); 2574 2575 return ret; 2576 } 2577 EXPORT_SYMBOL_GPL(i3c_master_register); 2578 2579 /** 2580 * i3c_master_unregister() - unregister an I3C master 2581 * @master: master used to send frames on the bus 2582 * 2583 * Basically undo everything done in i3c_master_register(). 2584 * 2585 * Return: 0 in case of success, a negative error code otherwise. 2586 */ 2587 int i3c_master_unregister(struct i3c_master_controller *master) 2588 { 2589 i3c_master_i2c_adapter_cleanup(master); 2590 i3c_master_unregister_i3c_devs(master); 2591 i3c_master_bus_cleanup(master); 2592 device_unregister(&master->dev); 2593 2594 return 0; 2595 } 2596 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2597 2598 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2599 struct i3c_priv_xfer *xfers, 2600 int nxfers) 2601 { 2602 struct i3c_master_controller *master; 2603 2604 if (!dev) 2605 return -ENOENT; 2606 2607 master = i3c_dev_get_master(dev); 2608 if (!master || !xfers) 2609 return -EINVAL; 2610 2611 if (!master->ops->priv_xfers) 2612 return -ENOTSUPP; 2613 2614 return master->ops->priv_xfers(dev, xfers, nxfers); 2615 } 2616 2617 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2618 { 2619 struct i3c_master_controller *master; 2620 int ret; 2621 2622 if (!dev->ibi) 2623 return -EINVAL; 2624 2625 master = i3c_dev_get_master(dev); 2626 ret = master->ops->disable_ibi(dev); 2627 if (ret) 2628 return ret; 2629 2630 reinit_completion(&dev->ibi->all_ibis_handled); 2631 if (atomic_read(&dev->ibi->pending_ibis)) 2632 wait_for_completion(&dev->ibi->all_ibis_handled); 2633 2634 dev->ibi->enabled = false; 2635 2636 return 0; 2637 } 2638 2639 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2640 { 2641 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2642 int ret; 2643 2644 if (!dev->ibi) 2645 return -EINVAL; 2646 2647 ret = master->ops->enable_ibi(dev); 2648 if (!ret) 2649 dev->ibi->enabled = true; 2650 2651 return ret; 2652 } 2653 2654 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2655 const struct i3c_ibi_setup *req) 2656 { 2657 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2658 struct i3c_device_ibi_info *ibi; 2659 int ret; 2660 2661 if (!master->ops->request_ibi) 2662 return -ENOTSUPP; 2663 2664 if (dev->ibi) 2665 return -EBUSY; 2666 2667 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2668 if (!ibi) 2669 return -ENOMEM; 2670 2671 atomic_set(&ibi->pending_ibis, 0); 2672 init_completion(&ibi->all_ibis_handled); 2673 ibi->handler = req->handler; 2674 ibi->max_payload_len = req->max_payload_len; 2675 ibi->num_slots = req->num_slots; 2676 2677 dev->ibi = ibi; 2678 ret = master->ops->request_ibi(dev, req); 2679 if (ret) { 2680 kfree(ibi); 2681 dev->ibi = NULL; 2682 } 2683 2684 return ret; 2685 } 2686 2687 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2688 { 2689 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2690 2691 if (!dev->ibi) 2692 return; 2693 2694 if (WARN_ON(dev->ibi->enabled)) 2695 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2696 2697 master->ops->free_ibi(dev); 2698 kfree(dev->ibi); 2699 dev->ibi = NULL; 2700 } 2701 2702 static int __init i3c_init(void) 2703 { 2704 return bus_register(&i3c_bus_type); 2705 } 2706 subsys_initcall(i3c_init); 2707 2708 static void __exit i3c_exit(void) 2709 { 2710 idr_destroy(&i3c_bus_idr); 2711 bus_unregister(&i3c_bus_type); 2712 } 2713 module_exit(i3c_exit); 2714 2715 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 2716 MODULE_DESCRIPTION("I3C core"); 2717 MODULE_LICENSE("GPL v2"); 2718