1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 25 /** 26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 27 * @bus: I3C bus to take the lock on 28 * 29 * This function takes the bus lock so that no other operations can occur on 30 * the bus. This is needed for all kind of bus maintenance operation, like 31 * - enabling/disabling slave events 32 * - re-triggering DAA 33 * - changing the dynamic address of a device 34 * - relinquishing mastership 35 * - ... 36 * 37 * The reason for this kind of locking is that we don't want drivers and core 38 * logic to rely on I3C device information that could be changed behind their 39 * back. 40 */ 41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 42 { 43 down_write(&bus->lock); 44 } 45 46 /** 47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 48 * operation 49 * @bus: I3C bus to release the lock on 50 * 51 * Should be called when the bus maintenance operation is done. See 52 * i3c_bus_maintenance_lock() for more details on what these maintenance 53 * operations are. 54 */ 55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 56 { 57 up_write(&bus->lock); 58 } 59 60 /** 61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 62 * @bus: I3C bus to take the lock on 63 * 64 * This function takes the bus lock for any operation that is not a maintenance 65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 66 * maintenance operations). Basically all communications with I3C devices are 67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 68 * state or I3C dynamic address). 69 * 70 * Note that this lock is not guaranteeing serialization of normal operations. 71 * In other words, transfer requests passed to the I3C master can be submitted 72 * in parallel and I3C master drivers have to use their own locking to make 73 * sure two different communications are not inter-mixed, or access to the 74 * output/input queue is not done while the engine is busy. 75 */ 76 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 77 { 78 down_read(&bus->lock); 79 } 80 81 /** 82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 83 * @bus: I3C bus to release the lock on 84 * 85 * Should be called when a normal operation is done. See 86 * i3c_bus_normaluse_lock() for more details on what these normal operations 87 * are. 88 */ 89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 90 { 91 up_read(&bus->lock); 92 } 93 94 static struct i3c_master_controller * 95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 96 { 97 return container_of(i3cbus, struct i3c_master_controller, bus); 98 } 99 100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 101 { 102 return container_of(dev, struct i3c_master_controller, dev); 103 } 104 105 static const struct device_type i3c_device_type; 106 107 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 108 { 109 struct i3c_master_controller *master; 110 111 if (dev->type == &i3c_device_type) 112 return dev_to_i3cdev(dev)->bus; 113 114 master = dev_to_i3cmaster(dev); 115 116 return &master->bus; 117 } 118 119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 120 { 121 struct i3c_master_controller *master; 122 123 if (dev->type == &i3c_device_type) 124 return dev_to_i3cdev(dev)->desc; 125 126 master = dev_to_i3cmaster(dev); 127 128 return master->this; 129 } 130 131 static ssize_t bcr_show(struct device *dev, 132 struct device_attribute *da, 133 char *buf) 134 { 135 struct i3c_bus *bus = dev_to_i3cbus(dev); 136 struct i3c_dev_desc *desc; 137 ssize_t ret; 138 139 i3c_bus_normaluse_lock(bus); 140 desc = dev_to_i3cdesc(dev); 141 ret = sprintf(buf, "%x\n", desc->info.bcr); 142 i3c_bus_normaluse_unlock(bus); 143 144 return ret; 145 } 146 static DEVICE_ATTR_RO(bcr); 147 148 static ssize_t dcr_show(struct device *dev, 149 struct device_attribute *da, 150 char *buf) 151 { 152 struct i3c_bus *bus = dev_to_i3cbus(dev); 153 struct i3c_dev_desc *desc; 154 ssize_t ret; 155 156 i3c_bus_normaluse_lock(bus); 157 desc = dev_to_i3cdesc(dev); 158 ret = sprintf(buf, "%x\n", desc->info.dcr); 159 i3c_bus_normaluse_unlock(bus); 160 161 return ret; 162 } 163 static DEVICE_ATTR_RO(dcr); 164 165 static ssize_t pid_show(struct device *dev, 166 struct device_attribute *da, 167 char *buf) 168 { 169 struct i3c_bus *bus = dev_to_i3cbus(dev); 170 struct i3c_dev_desc *desc; 171 ssize_t ret; 172 173 i3c_bus_normaluse_lock(bus); 174 desc = dev_to_i3cdesc(dev); 175 ret = sprintf(buf, "%llx\n", desc->info.pid); 176 i3c_bus_normaluse_unlock(bus); 177 178 return ret; 179 } 180 static DEVICE_ATTR_RO(pid); 181 182 static ssize_t dynamic_address_show(struct device *dev, 183 struct device_attribute *da, 184 char *buf) 185 { 186 struct i3c_bus *bus = dev_to_i3cbus(dev); 187 struct i3c_dev_desc *desc; 188 ssize_t ret; 189 190 i3c_bus_normaluse_lock(bus); 191 desc = dev_to_i3cdesc(dev); 192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 193 i3c_bus_normaluse_unlock(bus); 194 195 return ret; 196 } 197 static DEVICE_ATTR_RO(dynamic_address); 198 199 static const char * const hdrcap_strings[] = { 200 "hdr-ddr", "hdr-tsp", "hdr-tsl", 201 }; 202 203 static ssize_t hdrcap_show(struct device *dev, 204 struct device_attribute *da, 205 char *buf) 206 { 207 struct i3c_bus *bus = dev_to_i3cbus(dev); 208 struct i3c_dev_desc *desc; 209 ssize_t offset = 0, ret; 210 unsigned long caps; 211 int mode; 212 213 i3c_bus_normaluse_lock(bus); 214 desc = dev_to_i3cdesc(dev); 215 caps = desc->info.hdr_cap; 216 for_each_set_bit(mode, &caps, 8) { 217 if (mode >= ARRAY_SIZE(hdrcap_strings)) 218 break; 219 220 if (!hdrcap_strings[mode]) 221 continue; 222 223 ret = sprintf(buf + offset, offset ? " %s" : "%s", 224 hdrcap_strings[mode]); 225 if (ret < 0) 226 goto out; 227 228 offset += ret; 229 } 230 231 ret = sprintf(buf + offset, "\n"); 232 if (ret < 0) 233 goto out; 234 235 ret = offset + ret; 236 237 out: 238 i3c_bus_normaluse_unlock(bus); 239 240 return ret; 241 } 242 static DEVICE_ATTR_RO(hdrcap); 243 244 static ssize_t modalias_show(struct device *dev, 245 struct device_attribute *da, char *buf) 246 { 247 struct i3c_device *i3c = dev_to_i3cdev(dev); 248 struct i3c_device_info devinfo; 249 u16 manuf, part, ext; 250 251 i3c_device_get_info(i3c, &devinfo); 252 manuf = I3C_PID_MANUF_ID(devinfo.pid); 253 part = I3C_PID_PART_ID(devinfo.pid); 254 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 255 256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 258 manuf); 259 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 261 devinfo.dcr, manuf, part, ext); 262 } 263 static DEVICE_ATTR_RO(modalias); 264 265 static struct attribute *i3c_device_attrs[] = { 266 &dev_attr_bcr.attr, 267 &dev_attr_dcr.attr, 268 &dev_attr_pid.attr, 269 &dev_attr_dynamic_address.attr, 270 &dev_attr_hdrcap.attr, 271 &dev_attr_modalias.attr, 272 NULL, 273 }; 274 ATTRIBUTE_GROUPS(i3c_device); 275 276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env) 277 { 278 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 279 struct i3c_device_info devinfo; 280 u16 manuf, part, ext; 281 282 i3c_device_get_info(i3cdev, &devinfo); 283 manuf = I3C_PID_MANUF_ID(devinfo.pid); 284 part = I3C_PID_PART_ID(devinfo.pid); 285 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 286 287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 289 devinfo.dcr, manuf); 290 291 return add_uevent_var(env, 292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 293 devinfo.dcr, manuf, part, ext); 294 } 295 296 static const struct device_type i3c_device_type = { 297 .groups = i3c_device_groups, 298 .uevent = i3c_device_uevent, 299 }; 300 301 static int i3c_device_match(struct device *dev, struct device_driver *drv) 302 { 303 struct i3c_device *i3cdev; 304 struct i3c_driver *i3cdrv; 305 306 if (dev->type != &i3c_device_type) 307 return 0; 308 309 i3cdev = dev_to_i3cdev(dev); 310 i3cdrv = drv_to_i3cdrv(drv); 311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 312 return 1; 313 314 return 0; 315 } 316 317 static int i3c_device_probe(struct device *dev) 318 { 319 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 321 322 return driver->probe(i3cdev); 323 } 324 325 static void i3c_device_remove(struct device *dev) 326 { 327 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 329 330 if (driver->remove) 331 driver->remove(i3cdev); 332 333 i3c_device_free_ibi(i3cdev); 334 } 335 336 struct bus_type i3c_bus_type = { 337 .name = "i3c", 338 .match = i3c_device_match, 339 .probe = i3c_device_probe, 340 .remove = i3c_device_remove, 341 }; 342 343 static enum i3c_addr_slot_status 344 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 345 { 346 int status, bitpos = addr * 2; 347 348 if (addr > I2C_MAX_ADDR) 349 return I3C_ADDR_SLOT_RSVD; 350 351 status = bus->addrslots[bitpos / BITS_PER_LONG]; 352 status >>= bitpos % BITS_PER_LONG; 353 354 return status & I3C_ADDR_SLOT_STATUS_MASK; 355 } 356 357 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 358 enum i3c_addr_slot_status status) 359 { 360 int bitpos = addr * 2; 361 unsigned long *ptr; 362 363 if (addr > I2C_MAX_ADDR) 364 return; 365 366 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 367 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 368 (bitpos % BITS_PER_LONG)); 369 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 370 } 371 372 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 373 { 374 enum i3c_addr_slot_status status; 375 376 status = i3c_bus_get_addr_slot_status(bus, addr); 377 378 return status == I3C_ADDR_SLOT_FREE; 379 } 380 381 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 382 { 383 enum i3c_addr_slot_status status; 384 u8 addr; 385 386 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 387 status = i3c_bus_get_addr_slot_status(bus, addr); 388 if (status == I3C_ADDR_SLOT_FREE) 389 return addr; 390 } 391 392 return -ENOMEM; 393 } 394 395 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 396 { 397 int i; 398 399 /* Addresses 0 to 7 are reserved. */ 400 for (i = 0; i < 8; i++) 401 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 402 403 /* 404 * Reserve broadcast address and all addresses that might collide 405 * with the broadcast address when facing a single bit error. 406 */ 407 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 408 I3C_ADDR_SLOT_RSVD); 409 for (i = 0; i < 7; i++) 410 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 411 I3C_ADDR_SLOT_RSVD); 412 } 413 414 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 415 { 416 mutex_lock(&i3c_core_lock); 417 idr_remove(&i3c_bus_idr, i3cbus->id); 418 mutex_unlock(&i3c_core_lock); 419 } 420 421 static int i3c_bus_init(struct i3c_bus *i3cbus) 422 { 423 int ret; 424 425 init_rwsem(&i3cbus->lock); 426 INIT_LIST_HEAD(&i3cbus->devs.i2c); 427 INIT_LIST_HEAD(&i3cbus->devs.i3c); 428 i3c_bus_init_addrslots(i3cbus); 429 i3cbus->mode = I3C_BUS_MODE_PURE; 430 431 mutex_lock(&i3c_core_lock); 432 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL); 433 mutex_unlock(&i3c_core_lock); 434 435 if (ret < 0) 436 return ret; 437 438 i3cbus->id = ret; 439 440 return 0; 441 } 442 443 static const char * const i3c_bus_mode_strings[] = { 444 [I3C_BUS_MODE_PURE] = "pure", 445 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 446 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 447 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 448 }; 449 450 static ssize_t mode_show(struct device *dev, 451 struct device_attribute *da, 452 char *buf) 453 { 454 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 455 ssize_t ret; 456 457 i3c_bus_normaluse_lock(i3cbus); 458 if (i3cbus->mode < 0 || 459 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 460 !i3c_bus_mode_strings[i3cbus->mode]) 461 ret = sprintf(buf, "unknown\n"); 462 else 463 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 464 i3c_bus_normaluse_unlock(i3cbus); 465 466 return ret; 467 } 468 static DEVICE_ATTR_RO(mode); 469 470 static ssize_t current_master_show(struct device *dev, 471 struct device_attribute *da, 472 char *buf) 473 { 474 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 475 ssize_t ret; 476 477 i3c_bus_normaluse_lock(i3cbus); 478 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 479 i3cbus->cur_master->info.pid); 480 i3c_bus_normaluse_unlock(i3cbus); 481 482 return ret; 483 } 484 static DEVICE_ATTR_RO(current_master); 485 486 static ssize_t i3c_scl_frequency_show(struct device *dev, 487 struct device_attribute *da, 488 char *buf) 489 { 490 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 491 ssize_t ret; 492 493 i3c_bus_normaluse_lock(i3cbus); 494 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 495 i3c_bus_normaluse_unlock(i3cbus); 496 497 return ret; 498 } 499 static DEVICE_ATTR_RO(i3c_scl_frequency); 500 501 static ssize_t i2c_scl_frequency_show(struct device *dev, 502 struct device_attribute *da, 503 char *buf) 504 { 505 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 506 ssize_t ret; 507 508 i3c_bus_normaluse_lock(i3cbus); 509 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 510 i3c_bus_normaluse_unlock(i3cbus); 511 512 return ret; 513 } 514 static DEVICE_ATTR_RO(i2c_scl_frequency); 515 516 static struct attribute *i3c_masterdev_attrs[] = { 517 &dev_attr_mode.attr, 518 &dev_attr_current_master.attr, 519 &dev_attr_i3c_scl_frequency.attr, 520 &dev_attr_i2c_scl_frequency.attr, 521 &dev_attr_bcr.attr, 522 &dev_attr_dcr.attr, 523 &dev_attr_pid.attr, 524 &dev_attr_dynamic_address.attr, 525 &dev_attr_hdrcap.attr, 526 NULL, 527 }; 528 ATTRIBUTE_GROUPS(i3c_masterdev); 529 530 static void i3c_masterdev_release(struct device *dev) 531 { 532 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 533 struct i3c_bus *bus = dev_to_i3cbus(dev); 534 535 if (master->wq) 536 destroy_workqueue(master->wq); 537 538 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 539 i3c_bus_cleanup(bus); 540 541 of_node_put(dev->of_node); 542 } 543 544 static const struct device_type i3c_masterdev_type = { 545 .groups = i3c_masterdev_groups, 546 }; 547 548 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 549 unsigned long max_i2c_scl_rate) 550 { 551 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 552 553 i3cbus->mode = mode; 554 555 switch (i3cbus->mode) { 556 case I3C_BUS_MODE_PURE: 557 if (!i3cbus->scl_rate.i3c) 558 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 559 break; 560 case I3C_BUS_MODE_MIXED_FAST: 561 case I3C_BUS_MODE_MIXED_LIMITED: 562 if (!i3cbus->scl_rate.i3c) 563 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 564 if (!i3cbus->scl_rate.i2c) 565 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 566 break; 567 case I3C_BUS_MODE_MIXED_SLOW: 568 if (!i3cbus->scl_rate.i2c) 569 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 570 if (!i3cbus->scl_rate.i3c || 571 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 572 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 573 break; 574 default: 575 return -EINVAL; 576 } 577 578 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 579 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 580 581 /* 582 * I3C/I2C frequency may have been overridden, check that user-provided 583 * values are not exceeding max possible frequency. 584 */ 585 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 586 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 587 return -EINVAL; 588 589 return 0; 590 } 591 592 static struct i3c_master_controller * 593 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 594 { 595 return container_of(adap, struct i3c_master_controller, i2c); 596 } 597 598 static struct i2c_adapter * 599 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 600 { 601 return &master->i2c; 602 } 603 604 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 605 { 606 kfree(dev); 607 } 608 609 static struct i2c_dev_desc * 610 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 611 const struct i2c_dev_boardinfo *boardinfo) 612 { 613 struct i2c_dev_desc *dev; 614 615 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 616 if (!dev) 617 return ERR_PTR(-ENOMEM); 618 619 dev->common.master = master; 620 dev->boardinfo = boardinfo; 621 dev->addr = boardinfo->base.addr; 622 dev->lvr = boardinfo->lvr; 623 624 return dev; 625 } 626 627 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 628 u16 payloadlen) 629 { 630 dest->addr = addr; 631 dest->payload.len = payloadlen; 632 if (payloadlen) 633 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 634 else 635 dest->payload.data = NULL; 636 637 return dest->payload.data; 638 } 639 640 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 641 { 642 kfree(dest->payload.data); 643 } 644 645 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 646 struct i3c_ccc_cmd_dest *dests, 647 unsigned int ndests) 648 { 649 cmd->rnw = rnw ? 1 : 0; 650 cmd->id = id; 651 cmd->dests = dests; 652 cmd->ndests = ndests; 653 cmd->err = I3C_ERROR_UNKNOWN; 654 } 655 656 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 657 struct i3c_ccc_cmd *cmd) 658 { 659 int ret; 660 661 if (!cmd || !master) 662 return -EINVAL; 663 664 if (WARN_ON(master->init_done && 665 !rwsem_is_locked(&master->bus.lock))) 666 return -EINVAL; 667 668 if (!master->ops->send_ccc_cmd) 669 return -ENOTSUPP; 670 671 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 672 return -EINVAL; 673 674 if (master->ops->supports_ccc_cmd && 675 !master->ops->supports_ccc_cmd(master, cmd)) 676 return -ENOTSUPP; 677 678 ret = master->ops->send_ccc_cmd(master, cmd); 679 if (ret) { 680 if (cmd->err != I3C_ERROR_UNKNOWN) 681 return cmd->err; 682 683 return ret; 684 } 685 686 return 0; 687 } 688 689 static struct i2c_dev_desc * 690 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 691 u16 addr) 692 { 693 struct i2c_dev_desc *dev; 694 695 i3c_bus_for_each_i2cdev(&master->bus, dev) { 696 if (dev->boardinfo->base.addr == addr) 697 return dev; 698 } 699 700 return NULL; 701 } 702 703 /** 704 * i3c_master_get_free_addr() - get a free address on the bus 705 * @master: I3C master object 706 * @start_addr: where to start searching 707 * 708 * This function must be called with the bus lock held in write mode. 709 * 710 * Return: the first free address starting at @start_addr (included) or -ENOMEM 711 * if there's no more address available. 712 */ 713 int i3c_master_get_free_addr(struct i3c_master_controller *master, 714 u8 start_addr) 715 { 716 return i3c_bus_get_free_addr(&master->bus, start_addr); 717 } 718 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 719 720 static void i3c_device_release(struct device *dev) 721 { 722 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 723 724 WARN_ON(i3cdev->desc); 725 726 of_node_put(i3cdev->dev.of_node); 727 kfree(i3cdev); 728 } 729 730 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 731 { 732 kfree(dev); 733 } 734 735 static struct i3c_dev_desc * 736 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 737 const struct i3c_device_info *info) 738 { 739 struct i3c_dev_desc *dev; 740 741 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 742 if (!dev) 743 return ERR_PTR(-ENOMEM); 744 745 dev->common.master = master; 746 dev->info = *info; 747 mutex_init(&dev->ibi_lock); 748 749 return dev; 750 } 751 752 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 753 u8 addr) 754 { 755 enum i3c_addr_slot_status addrstat; 756 struct i3c_ccc_cmd_dest dest; 757 struct i3c_ccc_cmd cmd; 758 int ret; 759 760 if (!master) 761 return -EINVAL; 762 763 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 764 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 765 return -EINVAL; 766 767 i3c_ccc_cmd_dest_init(&dest, addr, 0); 768 i3c_ccc_cmd_init(&cmd, false, 769 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 770 &dest, 1); 771 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 772 i3c_ccc_cmd_dest_cleanup(&dest); 773 774 return ret; 775 } 776 777 /** 778 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 779 * procedure 780 * @master: master used to send frames on the bus 781 * 782 * Send a ENTDAA CCC command to start a DAA procedure. 783 * 784 * Note that this function only sends the ENTDAA CCC command, all the logic 785 * behind dynamic address assignment has to be handled in the I3C master 786 * driver. 787 * 788 * This function must be called with the bus lock held in write mode. 789 * 790 * Return: 0 in case of success, a positive I3C error code if the error is 791 * one of the official Mx error codes, and a negative error code otherwise. 792 */ 793 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 794 { 795 struct i3c_ccc_cmd_dest dest; 796 struct i3c_ccc_cmd cmd; 797 int ret; 798 799 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 800 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 801 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 802 i3c_ccc_cmd_dest_cleanup(&dest); 803 804 return ret; 805 } 806 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 807 808 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 809 u8 addr, bool enable, u8 evts) 810 { 811 struct i3c_ccc_events *events; 812 struct i3c_ccc_cmd_dest dest; 813 struct i3c_ccc_cmd cmd; 814 int ret; 815 816 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 817 if (!events) 818 return -ENOMEM; 819 820 events->events = evts; 821 i3c_ccc_cmd_init(&cmd, false, 822 enable ? 823 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 824 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 825 &dest, 1); 826 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 827 i3c_ccc_cmd_dest_cleanup(&dest); 828 829 return ret; 830 } 831 832 /** 833 * i3c_master_disec_locked() - send a DISEC CCC command 834 * @master: master used to send frames on the bus 835 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 836 * @evts: events to disable 837 * 838 * Send a DISEC CCC command to disable some or all events coming from a 839 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 840 * 841 * This function must be called with the bus lock held in write mode. 842 * 843 * Return: 0 in case of success, a positive I3C error code if the error is 844 * one of the official Mx error codes, and a negative error code otherwise. 845 */ 846 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 847 u8 evts) 848 { 849 return i3c_master_enec_disec_locked(master, addr, false, evts); 850 } 851 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 852 853 /** 854 * i3c_master_enec_locked() - send an ENEC CCC command 855 * @master: master used to send frames on the bus 856 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 857 * @evts: events to disable 858 * 859 * Sends an ENEC CCC command to enable some or all events coming from a 860 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 861 * 862 * This function must be called with the bus lock held in write mode. 863 * 864 * Return: 0 in case of success, a positive I3C error code if the error is 865 * one of the official Mx error codes, and a negative error code otherwise. 866 */ 867 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 868 u8 evts) 869 { 870 return i3c_master_enec_disec_locked(master, addr, true, evts); 871 } 872 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 873 874 /** 875 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 876 * @master: master used to send frames on the bus 877 * 878 * Send a DEFSLVS CCC command containing all the devices known to the @master. 879 * This is useful when you have secondary masters on the bus to propagate 880 * device information. 881 * 882 * This should be called after all I3C devices have been discovered (in other 883 * words, after the DAA procedure has finished) and instantiated in 884 * &i3c_master_controller_ops->bus_init(). 885 * It should also be called if a master ACKed an Hot-Join request and assigned 886 * a dynamic address to the device joining the bus. 887 * 888 * This function must be called with the bus lock held in write mode. 889 * 890 * Return: 0 in case of success, a positive I3C error code if the error is 891 * one of the official Mx error codes, and a negative error code otherwise. 892 */ 893 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 894 { 895 struct i3c_ccc_defslvs *defslvs; 896 struct i3c_ccc_dev_desc *desc; 897 struct i3c_ccc_cmd_dest dest; 898 struct i3c_dev_desc *i3cdev; 899 struct i2c_dev_desc *i2cdev; 900 struct i3c_ccc_cmd cmd; 901 struct i3c_bus *bus; 902 bool send = false; 903 int ndevs = 0, ret; 904 905 if (!master) 906 return -EINVAL; 907 908 bus = i3c_master_get_bus(master); 909 i3c_bus_for_each_i3cdev(bus, i3cdev) { 910 ndevs++; 911 912 if (i3cdev == master->this) 913 continue; 914 915 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 916 I3C_BCR_I3C_MASTER) 917 send = true; 918 } 919 920 /* No other master on the bus, skip DEFSLVS. */ 921 if (!send) 922 return 0; 923 924 i3c_bus_for_each_i2cdev(bus, i2cdev) 925 ndevs++; 926 927 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 928 struct_size(defslvs, slaves, 929 ndevs - 1)); 930 if (!defslvs) 931 return -ENOMEM; 932 933 defslvs->count = ndevs; 934 defslvs->master.bcr = master->this->info.bcr; 935 defslvs->master.dcr = master->this->info.dcr; 936 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 937 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 938 939 desc = defslvs->slaves; 940 i3c_bus_for_each_i2cdev(bus, i2cdev) { 941 desc->lvr = i2cdev->lvr; 942 desc->static_addr = i2cdev->addr << 1; 943 desc++; 944 } 945 946 i3c_bus_for_each_i3cdev(bus, i3cdev) { 947 /* Skip the I3C dev representing this master. */ 948 if (i3cdev == master->this) 949 continue; 950 951 desc->bcr = i3cdev->info.bcr; 952 desc->dcr = i3cdev->info.dcr; 953 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 954 desc->static_addr = i3cdev->info.static_addr << 1; 955 desc++; 956 } 957 958 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 959 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 960 i3c_ccc_cmd_dest_cleanup(&dest); 961 962 return ret; 963 } 964 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 965 966 static int i3c_master_setda_locked(struct i3c_master_controller *master, 967 u8 oldaddr, u8 newaddr, bool setdasa) 968 { 969 struct i3c_ccc_cmd_dest dest; 970 struct i3c_ccc_setda *setda; 971 struct i3c_ccc_cmd cmd; 972 int ret; 973 974 if (!oldaddr || !newaddr) 975 return -EINVAL; 976 977 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 978 if (!setda) 979 return -ENOMEM; 980 981 setda->addr = newaddr << 1; 982 i3c_ccc_cmd_init(&cmd, false, 983 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 984 &dest, 1); 985 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 986 i3c_ccc_cmd_dest_cleanup(&dest); 987 988 return ret; 989 } 990 991 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 992 u8 static_addr, u8 dyn_addr) 993 { 994 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 995 } 996 997 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 998 u8 oldaddr, u8 newaddr) 999 { 1000 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1001 } 1002 1003 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1004 struct i3c_device_info *info) 1005 { 1006 struct i3c_ccc_cmd_dest dest; 1007 struct i3c_ccc_mrl *mrl; 1008 struct i3c_ccc_cmd cmd; 1009 int ret; 1010 1011 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1012 if (!mrl) 1013 return -ENOMEM; 1014 1015 /* 1016 * When the device does not have IBI payload GETMRL only returns 2 1017 * bytes of data. 1018 */ 1019 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1020 dest.payload.len -= 1; 1021 1022 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1023 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1024 if (ret) 1025 goto out; 1026 1027 switch (dest.payload.len) { 1028 case 3: 1029 info->max_ibi_len = mrl->ibi_len; 1030 fallthrough; 1031 case 2: 1032 info->max_read_len = be16_to_cpu(mrl->read_len); 1033 break; 1034 default: 1035 ret = -EIO; 1036 goto out; 1037 } 1038 1039 out: 1040 i3c_ccc_cmd_dest_cleanup(&dest); 1041 1042 return ret; 1043 } 1044 1045 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1046 struct i3c_device_info *info) 1047 { 1048 struct i3c_ccc_cmd_dest dest; 1049 struct i3c_ccc_mwl *mwl; 1050 struct i3c_ccc_cmd cmd; 1051 int ret; 1052 1053 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1054 if (!mwl) 1055 return -ENOMEM; 1056 1057 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1058 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1059 if (ret) 1060 goto out; 1061 1062 if (dest.payload.len != sizeof(*mwl)) { 1063 ret = -EIO; 1064 goto out; 1065 } 1066 1067 info->max_write_len = be16_to_cpu(mwl->len); 1068 1069 out: 1070 i3c_ccc_cmd_dest_cleanup(&dest); 1071 1072 return ret; 1073 } 1074 1075 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1076 struct i3c_device_info *info) 1077 { 1078 struct i3c_ccc_getmxds *getmaxds; 1079 struct i3c_ccc_cmd_dest dest; 1080 struct i3c_ccc_cmd cmd; 1081 int ret; 1082 1083 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1084 sizeof(*getmaxds)); 1085 if (!getmaxds) 1086 return -ENOMEM; 1087 1088 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1089 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1090 if (ret) 1091 goto out; 1092 1093 if (dest.payload.len != 2 && dest.payload.len != 5) { 1094 ret = -EIO; 1095 goto out; 1096 } 1097 1098 info->max_read_ds = getmaxds->maxrd; 1099 info->max_write_ds = getmaxds->maxwr; 1100 if (dest.payload.len == 5) 1101 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1102 ((u32)getmaxds->maxrdturn[1] << 8) | 1103 ((u32)getmaxds->maxrdturn[2] << 16); 1104 1105 out: 1106 i3c_ccc_cmd_dest_cleanup(&dest); 1107 1108 return ret; 1109 } 1110 1111 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1112 struct i3c_device_info *info) 1113 { 1114 struct i3c_ccc_gethdrcap *gethdrcap; 1115 struct i3c_ccc_cmd_dest dest; 1116 struct i3c_ccc_cmd cmd; 1117 int ret; 1118 1119 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1120 sizeof(*gethdrcap)); 1121 if (!gethdrcap) 1122 return -ENOMEM; 1123 1124 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1125 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1126 if (ret) 1127 goto out; 1128 1129 if (dest.payload.len != 1) { 1130 ret = -EIO; 1131 goto out; 1132 } 1133 1134 info->hdr_cap = gethdrcap->modes; 1135 1136 out: 1137 i3c_ccc_cmd_dest_cleanup(&dest); 1138 1139 return ret; 1140 } 1141 1142 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1143 struct i3c_device_info *info) 1144 { 1145 struct i3c_ccc_getpid *getpid; 1146 struct i3c_ccc_cmd_dest dest; 1147 struct i3c_ccc_cmd cmd; 1148 int ret, i; 1149 1150 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1151 if (!getpid) 1152 return -ENOMEM; 1153 1154 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1155 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1156 if (ret) 1157 goto out; 1158 1159 info->pid = 0; 1160 for (i = 0; i < sizeof(getpid->pid); i++) { 1161 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1162 1163 info->pid |= (u64)getpid->pid[i] << sft; 1164 } 1165 1166 out: 1167 i3c_ccc_cmd_dest_cleanup(&dest); 1168 1169 return ret; 1170 } 1171 1172 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1173 struct i3c_device_info *info) 1174 { 1175 struct i3c_ccc_getbcr *getbcr; 1176 struct i3c_ccc_cmd_dest dest; 1177 struct i3c_ccc_cmd cmd; 1178 int ret; 1179 1180 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1181 if (!getbcr) 1182 return -ENOMEM; 1183 1184 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1185 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1186 if (ret) 1187 goto out; 1188 1189 info->bcr = getbcr->bcr; 1190 1191 out: 1192 i3c_ccc_cmd_dest_cleanup(&dest); 1193 1194 return ret; 1195 } 1196 1197 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1198 struct i3c_device_info *info) 1199 { 1200 struct i3c_ccc_getdcr *getdcr; 1201 struct i3c_ccc_cmd_dest dest; 1202 struct i3c_ccc_cmd cmd; 1203 int ret; 1204 1205 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1206 if (!getdcr) 1207 return -ENOMEM; 1208 1209 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1210 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1211 if (ret) 1212 goto out; 1213 1214 info->dcr = getdcr->dcr; 1215 1216 out: 1217 i3c_ccc_cmd_dest_cleanup(&dest); 1218 1219 return ret; 1220 } 1221 1222 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1223 { 1224 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1225 enum i3c_addr_slot_status slot_status; 1226 int ret; 1227 1228 if (!dev->info.dyn_addr) 1229 return -EINVAL; 1230 1231 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1232 dev->info.dyn_addr); 1233 if (slot_status == I3C_ADDR_SLOT_RSVD || 1234 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1235 return -EINVAL; 1236 1237 ret = i3c_master_getpid_locked(master, &dev->info); 1238 if (ret) 1239 return ret; 1240 1241 ret = i3c_master_getbcr_locked(master, &dev->info); 1242 if (ret) 1243 return ret; 1244 1245 ret = i3c_master_getdcr_locked(master, &dev->info); 1246 if (ret) 1247 return ret; 1248 1249 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1250 ret = i3c_master_getmxds_locked(master, &dev->info); 1251 if (ret) 1252 return ret; 1253 } 1254 1255 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1256 dev->info.max_ibi_len = 1; 1257 1258 i3c_master_getmrl_locked(master, &dev->info); 1259 i3c_master_getmwl_locked(master, &dev->info); 1260 1261 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1262 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1263 if (ret) 1264 return ret; 1265 } 1266 1267 return 0; 1268 } 1269 1270 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1271 { 1272 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1273 1274 if (dev->info.static_addr) 1275 i3c_bus_set_addr_slot_status(&master->bus, 1276 dev->info.static_addr, 1277 I3C_ADDR_SLOT_FREE); 1278 1279 if (dev->info.dyn_addr) 1280 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1281 I3C_ADDR_SLOT_FREE); 1282 1283 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1285 I3C_ADDR_SLOT_FREE); 1286 } 1287 1288 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1289 { 1290 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1291 enum i3c_addr_slot_status status; 1292 1293 if (!dev->info.static_addr && !dev->info.dyn_addr) 1294 return 0; 1295 1296 if (dev->info.static_addr) { 1297 status = i3c_bus_get_addr_slot_status(&master->bus, 1298 dev->info.static_addr); 1299 if (status != I3C_ADDR_SLOT_FREE) 1300 return -EBUSY; 1301 1302 i3c_bus_set_addr_slot_status(&master->bus, 1303 dev->info.static_addr, 1304 I3C_ADDR_SLOT_I3C_DEV); 1305 } 1306 1307 /* 1308 * ->init_dyn_addr should have been reserved before that, so, if we're 1309 * trying to apply a pre-reserved dynamic address, we should not try 1310 * to reserve the address slot a second time. 1311 */ 1312 if (dev->info.dyn_addr && 1313 (!dev->boardinfo || 1314 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1315 status = i3c_bus_get_addr_slot_status(&master->bus, 1316 dev->info.dyn_addr); 1317 if (status != I3C_ADDR_SLOT_FREE) 1318 goto err_release_static_addr; 1319 1320 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1321 I3C_ADDR_SLOT_I3C_DEV); 1322 } 1323 1324 return 0; 1325 1326 err_release_static_addr: 1327 if (dev->info.static_addr) 1328 i3c_bus_set_addr_slot_status(&master->bus, 1329 dev->info.static_addr, 1330 I3C_ADDR_SLOT_FREE); 1331 1332 return -EBUSY; 1333 } 1334 1335 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1336 struct i3c_dev_desc *dev) 1337 { 1338 int ret; 1339 1340 /* 1341 * We don't attach devices to the controller until they are 1342 * addressable on the bus. 1343 */ 1344 if (!dev->info.static_addr && !dev->info.dyn_addr) 1345 return 0; 1346 1347 ret = i3c_master_get_i3c_addrs(dev); 1348 if (ret) 1349 return ret; 1350 1351 /* Do not attach the master device itself. */ 1352 if (master->this != dev && master->ops->attach_i3c_dev) { 1353 ret = master->ops->attach_i3c_dev(dev); 1354 if (ret) { 1355 i3c_master_put_i3c_addrs(dev); 1356 return ret; 1357 } 1358 } 1359 1360 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1361 1362 return 0; 1363 } 1364 1365 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1366 u8 old_dyn_addr) 1367 { 1368 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1369 enum i3c_addr_slot_status status; 1370 int ret; 1371 1372 if (dev->info.dyn_addr != old_dyn_addr && 1373 (!dev->boardinfo || 1374 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1375 status = i3c_bus_get_addr_slot_status(&master->bus, 1376 dev->info.dyn_addr); 1377 if (status != I3C_ADDR_SLOT_FREE) 1378 return -EBUSY; 1379 i3c_bus_set_addr_slot_status(&master->bus, 1380 dev->info.dyn_addr, 1381 I3C_ADDR_SLOT_I3C_DEV); 1382 } 1383 1384 if (master->ops->reattach_i3c_dev) { 1385 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1386 if (ret) { 1387 i3c_master_put_i3c_addrs(dev); 1388 return ret; 1389 } 1390 } 1391 1392 return 0; 1393 } 1394 1395 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1396 { 1397 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1398 1399 /* Do not detach the master device itself. */ 1400 if (master->this != dev && master->ops->detach_i3c_dev) 1401 master->ops->detach_i3c_dev(dev); 1402 1403 i3c_master_put_i3c_addrs(dev); 1404 list_del(&dev->common.node); 1405 } 1406 1407 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1408 struct i2c_dev_desc *dev) 1409 { 1410 int ret; 1411 1412 if (master->ops->attach_i2c_dev) { 1413 ret = master->ops->attach_i2c_dev(dev); 1414 if (ret) 1415 return ret; 1416 } 1417 1418 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1419 1420 return 0; 1421 } 1422 1423 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1424 { 1425 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1426 1427 list_del(&dev->common.node); 1428 1429 if (master->ops->detach_i2c_dev) 1430 master->ops->detach_i2c_dev(dev); 1431 } 1432 1433 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1434 struct i3c_dev_boardinfo *boardinfo) 1435 { 1436 struct i3c_device_info info = { 1437 .static_addr = boardinfo->static_addr, 1438 }; 1439 struct i3c_dev_desc *i3cdev; 1440 int ret; 1441 1442 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1443 if (IS_ERR(i3cdev)) 1444 return -ENOMEM; 1445 1446 i3cdev->boardinfo = boardinfo; 1447 1448 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1449 if (ret) 1450 goto err_free_dev; 1451 1452 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1453 i3cdev->boardinfo->init_dyn_addr); 1454 if (ret) 1455 goto err_detach_dev; 1456 1457 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1458 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1459 if (ret) 1460 goto err_rstdaa; 1461 1462 ret = i3c_master_retrieve_dev_info(i3cdev); 1463 if (ret) 1464 goto err_rstdaa; 1465 1466 return 0; 1467 1468 err_rstdaa: 1469 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1470 err_detach_dev: 1471 i3c_master_detach_i3c_dev(i3cdev); 1472 err_free_dev: 1473 i3c_master_free_i3c_dev(i3cdev); 1474 1475 return ret; 1476 } 1477 1478 static void 1479 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1480 { 1481 struct i3c_dev_desc *desc; 1482 int ret; 1483 1484 if (!master->init_done) 1485 return; 1486 1487 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1488 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1489 continue; 1490 1491 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1492 if (!desc->dev) 1493 continue; 1494 1495 desc->dev->bus = &master->bus; 1496 desc->dev->desc = desc; 1497 desc->dev->dev.parent = &master->dev; 1498 desc->dev->dev.type = &i3c_device_type; 1499 desc->dev->dev.bus = &i3c_bus_type; 1500 desc->dev->dev.release = i3c_device_release; 1501 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1502 desc->info.pid); 1503 1504 if (desc->boardinfo) 1505 desc->dev->dev.of_node = desc->boardinfo->of_node; 1506 1507 ret = device_register(&desc->dev->dev); 1508 if (ret) 1509 dev_err(&master->dev, 1510 "Failed to add I3C device (err = %d)\n", ret); 1511 } 1512 } 1513 1514 /** 1515 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1516 * @master: master doing the DAA 1517 * 1518 * This function is instantiating an I3C device object and adding it to the 1519 * I3C device list. All device information are automatically retrieved using 1520 * standard CCC commands. 1521 * 1522 * The I3C device object is returned in case the master wants to attach 1523 * private data to it using i3c_dev_set_master_data(). 1524 * 1525 * This function must be called with the bus lock held in write mode. 1526 * 1527 * Return: a 0 in case of success, an negative error code otherwise. 1528 */ 1529 int i3c_master_do_daa(struct i3c_master_controller *master) 1530 { 1531 int ret; 1532 1533 i3c_bus_maintenance_lock(&master->bus); 1534 ret = master->ops->do_daa(master); 1535 i3c_bus_maintenance_unlock(&master->bus); 1536 1537 if (ret) 1538 return ret; 1539 1540 i3c_bus_normaluse_lock(&master->bus); 1541 i3c_master_register_new_i3c_devs(master); 1542 i3c_bus_normaluse_unlock(&master->bus); 1543 1544 return 0; 1545 } 1546 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1547 1548 /** 1549 * i3c_master_set_info() - set master device information 1550 * @master: master used to send frames on the bus 1551 * @info: I3C device information 1552 * 1553 * Set master device info. This should be called from 1554 * &i3c_master_controller_ops->bus_init(). 1555 * 1556 * Not all &i3c_device_info fields are meaningful for a master device. 1557 * Here is a list of fields that should be properly filled: 1558 * 1559 * - &i3c_device_info->dyn_addr 1560 * - &i3c_device_info->bcr 1561 * - &i3c_device_info->dcr 1562 * - &i3c_device_info->pid 1563 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1564 * &i3c_device_info->bcr 1565 * 1566 * This function must be called with the bus lock held in maintenance mode. 1567 * 1568 * Return: 0 if @info contains valid information (not every piece of 1569 * information can be checked, but we can at least make sure @info->dyn_addr 1570 * and @info->bcr are correct), -EINVAL otherwise. 1571 */ 1572 int i3c_master_set_info(struct i3c_master_controller *master, 1573 const struct i3c_device_info *info) 1574 { 1575 struct i3c_dev_desc *i3cdev; 1576 int ret; 1577 1578 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1579 return -EINVAL; 1580 1581 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1582 master->secondary) 1583 return -EINVAL; 1584 1585 if (master->this) 1586 return -EINVAL; 1587 1588 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1589 if (IS_ERR(i3cdev)) 1590 return PTR_ERR(i3cdev); 1591 1592 master->this = i3cdev; 1593 master->bus.cur_master = master->this; 1594 1595 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1596 if (ret) 1597 goto err_free_dev; 1598 1599 return 0; 1600 1601 err_free_dev: 1602 i3c_master_free_i3c_dev(i3cdev); 1603 1604 return ret; 1605 } 1606 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1607 1608 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1609 { 1610 struct i3c_dev_desc *i3cdev, *i3ctmp; 1611 struct i2c_dev_desc *i2cdev, *i2ctmp; 1612 1613 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1614 common.node) { 1615 i3c_master_detach_i3c_dev(i3cdev); 1616 1617 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1618 i3c_bus_set_addr_slot_status(&master->bus, 1619 i3cdev->boardinfo->init_dyn_addr, 1620 I3C_ADDR_SLOT_FREE); 1621 1622 i3c_master_free_i3c_dev(i3cdev); 1623 } 1624 1625 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1626 common.node) { 1627 i3c_master_detach_i2c_dev(i2cdev); 1628 i3c_bus_set_addr_slot_status(&master->bus, 1629 i2cdev->addr, 1630 I3C_ADDR_SLOT_FREE); 1631 i3c_master_free_i2c_dev(i2cdev); 1632 } 1633 } 1634 1635 /** 1636 * i3c_master_bus_init() - initialize an I3C bus 1637 * @master: main master initializing the bus 1638 * 1639 * This function is following all initialisation steps described in the I3C 1640 * specification: 1641 * 1642 * 1. Attach I2C devs to the master so that the master can fill its internal 1643 * device table appropriately 1644 * 1645 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1646 * the master controller. That's usually where the bus mode is selected 1647 * (pure bus or mixed fast/slow bus) 1648 * 1649 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1650 * particularly important when the bus was previously configured by someone 1651 * else (for example the bootloader) 1652 * 1653 * 4. Disable all slave events. 1654 * 1655 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1656 * also have static_addr, try to pre-assign dynamic addresses requested by 1657 * the FW with SETDASA and attach corresponding statically defined I3C 1658 * devices to the master. 1659 * 1660 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1661 * remaining I3C devices 1662 * 1663 * Once this is done, all I3C and I2C devices should be usable. 1664 * 1665 * Return: a 0 in case of success, an negative error code otherwise. 1666 */ 1667 static int i3c_master_bus_init(struct i3c_master_controller *master) 1668 { 1669 enum i3c_addr_slot_status status; 1670 struct i2c_dev_boardinfo *i2cboardinfo; 1671 struct i3c_dev_boardinfo *i3cboardinfo; 1672 struct i2c_dev_desc *i2cdev; 1673 int ret; 1674 1675 /* 1676 * First attach all devices with static definitions provided by the 1677 * FW. 1678 */ 1679 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1680 status = i3c_bus_get_addr_slot_status(&master->bus, 1681 i2cboardinfo->base.addr); 1682 if (status != I3C_ADDR_SLOT_FREE) { 1683 ret = -EBUSY; 1684 goto err_detach_devs; 1685 } 1686 1687 i3c_bus_set_addr_slot_status(&master->bus, 1688 i2cboardinfo->base.addr, 1689 I3C_ADDR_SLOT_I2C_DEV); 1690 1691 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo); 1692 if (IS_ERR(i2cdev)) { 1693 ret = PTR_ERR(i2cdev); 1694 goto err_detach_devs; 1695 } 1696 1697 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1698 if (ret) { 1699 i3c_master_free_i2c_dev(i2cdev); 1700 goto err_detach_devs; 1701 } 1702 } 1703 1704 /* 1705 * Now execute the controller specific ->bus_init() routine, which 1706 * might configure its internal logic to match the bus limitations. 1707 */ 1708 ret = master->ops->bus_init(master); 1709 if (ret) 1710 goto err_detach_devs; 1711 1712 /* 1713 * The master device should have been instantiated in ->bus_init(), 1714 * complain if this was not the case. 1715 */ 1716 if (!master->this) { 1717 dev_err(&master->dev, 1718 "master_set_info() was not called in ->bus_init()\n"); 1719 ret = -EINVAL; 1720 goto err_bus_cleanup; 1721 } 1722 1723 /* 1724 * Reset all dynamic address that may have been assigned before 1725 * (assigned by the bootloader for example). 1726 */ 1727 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1728 if (ret && ret != I3C_ERROR_M2) 1729 goto err_bus_cleanup; 1730 1731 /* Disable all slave events before starting DAA. */ 1732 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1733 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1734 I3C_CCC_EVENT_HJ); 1735 if (ret && ret != I3C_ERROR_M2) 1736 goto err_bus_cleanup; 1737 1738 /* 1739 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1740 * address and retrieve device information if needed. 1741 * In case pre-assign dynamic address fails, setting dynamic address to 1742 * the requested init_dyn_addr is retried after DAA is done in 1743 * i3c_master_add_i3c_dev_locked(). 1744 */ 1745 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1746 1747 /* 1748 * We don't reserve a dynamic address for devices that 1749 * don't explicitly request one. 1750 */ 1751 if (!i3cboardinfo->init_dyn_addr) 1752 continue; 1753 1754 ret = i3c_bus_get_addr_slot_status(&master->bus, 1755 i3cboardinfo->init_dyn_addr); 1756 if (ret != I3C_ADDR_SLOT_FREE) { 1757 ret = -EBUSY; 1758 goto err_rstdaa; 1759 } 1760 1761 i3c_bus_set_addr_slot_status(&master->bus, 1762 i3cboardinfo->init_dyn_addr, 1763 I3C_ADDR_SLOT_I3C_DEV); 1764 1765 /* 1766 * Only try to create/attach devices that have a static 1767 * address. Other devices will be created/attached when 1768 * DAA happens, and the requested dynamic address will 1769 * be set using SETNEWDA once those devices become 1770 * addressable. 1771 */ 1772 1773 if (i3cboardinfo->static_addr) 1774 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1775 } 1776 1777 ret = i3c_master_do_daa(master); 1778 if (ret) 1779 goto err_rstdaa; 1780 1781 return 0; 1782 1783 err_rstdaa: 1784 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1785 1786 err_bus_cleanup: 1787 if (master->ops->bus_cleanup) 1788 master->ops->bus_cleanup(master); 1789 1790 err_detach_devs: 1791 i3c_master_detach_free_devs(master); 1792 1793 return ret; 1794 } 1795 1796 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1797 { 1798 if (master->ops->bus_cleanup) 1799 master->ops->bus_cleanup(master); 1800 1801 i3c_master_detach_free_devs(master); 1802 } 1803 1804 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1805 { 1806 struct i3c_master_controller *master = i3cdev->common.master; 1807 struct i3c_dev_boardinfo *i3cboardinfo; 1808 1809 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1810 if (i3cdev->info.pid != i3cboardinfo->pid) 1811 continue; 1812 1813 i3cdev->boardinfo = i3cboardinfo; 1814 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1815 return; 1816 } 1817 } 1818 1819 static struct i3c_dev_desc * 1820 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1821 { 1822 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1823 struct i3c_dev_desc *i3cdev; 1824 1825 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1826 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1827 return i3cdev; 1828 } 1829 1830 return NULL; 1831 } 1832 1833 /** 1834 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1835 * @master: master used to send frames on the bus 1836 * @addr: I3C slave dynamic address assigned to the device 1837 * 1838 * This function is instantiating an I3C device object and adding it to the 1839 * I3C device list. All device information are automatically retrieved using 1840 * standard CCC commands. 1841 * 1842 * The I3C device object is returned in case the master wants to attach 1843 * private data to it using i3c_dev_set_master_data(). 1844 * 1845 * This function must be called with the bus lock held in write mode. 1846 * 1847 * Return: a 0 in case of success, an negative error code otherwise. 1848 */ 1849 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1850 u8 addr) 1851 { 1852 struct i3c_device_info info = { .dyn_addr = addr }; 1853 struct i3c_dev_desc *newdev, *olddev; 1854 u8 old_dyn_addr = addr, expected_dyn_addr; 1855 struct i3c_ibi_setup ibireq = { }; 1856 bool enable_ibi = false; 1857 int ret; 1858 1859 if (!master) 1860 return -EINVAL; 1861 1862 newdev = i3c_master_alloc_i3c_dev(master, &info); 1863 if (IS_ERR(newdev)) 1864 return PTR_ERR(newdev); 1865 1866 ret = i3c_master_attach_i3c_dev(master, newdev); 1867 if (ret) 1868 goto err_free_dev; 1869 1870 ret = i3c_master_retrieve_dev_info(newdev); 1871 if (ret) 1872 goto err_detach_dev; 1873 1874 i3c_master_attach_boardinfo(newdev); 1875 1876 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 1877 if (olddev) { 1878 newdev->dev = olddev->dev; 1879 if (newdev->dev) 1880 newdev->dev->desc = newdev; 1881 1882 /* 1883 * We need to restore the IBI state too, so let's save the 1884 * IBI information and try to restore them after olddev has 1885 * been detached+released and its IBI has been stopped and 1886 * the associated resources have been freed. 1887 */ 1888 mutex_lock(&olddev->ibi_lock); 1889 if (olddev->ibi) { 1890 ibireq.handler = olddev->ibi->handler; 1891 ibireq.max_payload_len = olddev->ibi->max_payload_len; 1892 ibireq.num_slots = olddev->ibi->num_slots; 1893 1894 if (olddev->ibi->enabled) { 1895 enable_ibi = true; 1896 i3c_dev_disable_ibi_locked(olddev); 1897 } 1898 1899 i3c_dev_free_ibi_locked(olddev); 1900 } 1901 mutex_unlock(&olddev->ibi_lock); 1902 1903 old_dyn_addr = olddev->info.dyn_addr; 1904 1905 i3c_master_detach_i3c_dev(olddev); 1906 i3c_master_free_i3c_dev(olddev); 1907 } 1908 1909 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1910 if (ret) 1911 goto err_detach_dev; 1912 1913 /* 1914 * Depending on our previous state, the expected dynamic address might 1915 * differ: 1916 * - if the device already had a dynamic address assigned, let's try to 1917 * re-apply this one 1918 * - if the device did not have a dynamic address and the firmware 1919 * requested a specific address, pick this one 1920 * - in any other case, keep the address automatically assigned by the 1921 * master 1922 */ 1923 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 1924 expected_dyn_addr = old_dyn_addr; 1925 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 1926 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 1927 else 1928 expected_dyn_addr = newdev->info.dyn_addr; 1929 1930 if (newdev->info.dyn_addr != expected_dyn_addr) { 1931 /* 1932 * Try to apply the expected dynamic address. If it fails, keep 1933 * the address assigned by the master. 1934 */ 1935 ret = i3c_master_setnewda_locked(master, 1936 newdev->info.dyn_addr, 1937 expected_dyn_addr); 1938 if (!ret) { 1939 old_dyn_addr = newdev->info.dyn_addr; 1940 newdev->info.dyn_addr = expected_dyn_addr; 1941 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1942 } else { 1943 dev_err(&master->dev, 1944 "Failed to assign reserved/old address to device %d%llx", 1945 master->bus.id, newdev->info.pid); 1946 } 1947 } 1948 1949 /* 1950 * Now is time to try to restore the IBI setup. If we're lucky, 1951 * everything works as before, otherwise, all we can do is complain. 1952 * FIXME: maybe we should add callback to inform the driver that it 1953 * should request the IBI again instead of trying to hide that from 1954 * him. 1955 */ 1956 if (ibireq.handler) { 1957 mutex_lock(&newdev->ibi_lock); 1958 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 1959 if (ret) { 1960 dev_err(&master->dev, 1961 "Failed to request IBI on device %d-%llx", 1962 master->bus.id, newdev->info.pid); 1963 } else if (enable_ibi) { 1964 ret = i3c_dev_enable_ibi_locked(newdev); 1965 if (ret) 1966 dev_err(&master->dev, 1967 "Failed to re-enable IBI on device %d-%llx", 1968 master->bus.id, newdev->info.pid); 1969 } 1970 mutex_unlock(&newdev->ibi_lock); 1971 } 1972 1973 return 0; 1974 1975 err_detach_dev: 1976 if (newdev->dev && newdev->dev->desc) 1977 newdev->dev->desc = NULL; 1978 1979 i3c_master_detach_i3c_dev(newdev); 1980 1981 err_free_dev: 1982 i3c_master_free_i3c_dev(newdev); 1983 1984 return ret; 1985 } 1986 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 1987 1988 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 1989 1990 static int 1991 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 1992 struct device_node *node, u32 *reg) 1993 { 1994 struct i2c_dev_boardinfo *boardinfo; 1995 struct device *dev = &master->dev; 1996 int ret; 1997 1998 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 1999 if (!boardinfo) 2000 return -ENOMEM; 2001 2002 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2003 if (ret) 2004 return ret; 2005 2006 /* 2007 * The I3C Specification does not clearly say I2C devices with 10-bit 2008 * address are supported. These devices can't be passed properly through 2009 * DEFSLVS command. 2010 */ 2011 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2012 dev_err(dev, "I2C device with 10 bit address not supported."); 2013 return -ENOTSUPP; 2014 } 2015 2016 /* LVR is encoded in reg[2]. */ 2017 boardinfo->lvr = reg[2]; 2018 2019 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2020 of_node_get(node); 2021 2022 return 0; 2023 } 2024 2025 static int 2026 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2027 struct device_node *node, u32 *reg) 2028 { 2029 struct i3c_dev_boardinfo *boardinfo; 2030 struct device *dev = &master->dev; 2031 enum i3c_addr_slot_status addrstatus; 2032 u32 init_dyn_addr = 0; 2033 2034 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2035 if (!boardinfo) 2036 return -ENOMEM; 2037 2038 if (reg[0]) { 2039 if (reg[0] > I3C_MAX_ADDR) 2040 return -EINVAL; 2041 2042 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2043 reg[0]); 2044 if (addrstatus != I3C_ADDR_SLOT_FREE) 2045 return -EINVAL; 2046 } 2047 2048 boardinfo->static_addr = reg[0]; 2049 2050 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2051 if (init_dyn_addr > I3C_MAX_ADDR) 2052 return -EINVAL; 2053 2054 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2055 init_dyn_addr); 2056 if (addrstatus != I3C_ADDR_SLOT_FREE) 2057 return -EINVAL; 2058 } 2059 2060 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2061 2062 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2063 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2064 return -EINVAL; 2065 2066 boardinfo->init_dyn_addr = init_dyn_addr; 2067 boardinfo->of_node = of_node_get(node); 2068 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2069 2070 return 0; 2071 } 2072 2073 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2074 struct device_node *node) 2075 { 2076 u32 reg[3]; 2077 int ret; 2078 2079 if (!master || !node) 2080 return -EINVAL; 2081 2082 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2083 if (ret) 2084 return ret; 2085 2086 /* 2087 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2088 * dealing with an I2C device. 2089 */ 2090 if (!reg[1]) 2091 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2092 else 2093 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2094 2095 return ret; 2096 } 2097 2098 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2099 { 2100 struct device *dev = &master->dev; 2101 struct device_node *i3cbus_np = dev->of_node; 2102 struct device_node *node; 2103 int ret; 2104 u32 val; 2105 2106 if (!i3cbus_np) 2107 return 0; 2108 2109 for_each_available_child_of_node(i3cbus_np, node) { 2110 ret = of_i3c_master_add_dev(master, node); 2111 if (ret) { 2112 of_node_put(node); 2113 return ret; 2114 } 2115 } 2116 2117 /* 2118 * The user might want to limit I2C and I3C speed in case some devices 2119 * on the bus are not supporting typical rates, or if the bus topology 2120 * prevents it from using max possible rate. 2121 */ 2122 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2123 master->bus.scl_rate.i2c = val; 2124 2125 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2126 master->bus.scl_rate.i3c = val; 2127 2128 return 0; 2129 } 2130 2131 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2132 struct i2c_msg *xfers, int nxfers) 2133 { 2134 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2135 struct i2c_dev_desc *dev; 2136 int i, ret; 2137 u16 addr; 2138 2139 if (!xfers || !master || nxfers <= 0) 2140 return -EINVAL; 2141 2142 if (!master->ops->i2c_xfers) 2143 return -ENOTSUPP; 2144 2145 /* Doing transfers to different devices is not supported. */ 2146 addr = xfers[0].addr; 2147 for (i = 1; i < nxfers; i++) { 2148 if (addr != xfers[i].addr) 2149 return -ENOTSUPP; 2150 } 2151 2152 i3c_bus_normaluse_lock(&master->bus); 2153 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2154 if (!dev) 2155 ret = -ENOENT; 2156 else 2157 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2158 i3c_bus_normaluse_unlock(&master->bus); 2159 2160 return ret ? ret : nxfers; 2161 } 2162 2163 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2164 { 2165 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2166 } 2167 2168 static const struct i2c_algorithm i3c_master_i2c_algo = { 2169 .master_xfer = i3c_master_i2c_adapter_xfer, 2170 .functionality = i3c_master_i2c_funcs, 2171 }; 2172 2173 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2174 { 2175 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2176 struct i2c_dev_desc *i2cdev; 2177 int ret; 2178 2179 adap->dev.parent = master->dev.parent; 2180 adap->owner = master->dev.parent->driver->owner; 2181 adap->algo = &i3c_master_i2c_algo; 2182 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2183 2184 /* FIXME: Should we allow i3c masters to override these values? */ 2185 adap->timeout = 1000; 2186 adap->retries = 3; 2187 2188 ret = i2c_add_adapter(adap); 2189 if (ret) 2190 return ret; 2191 2192 /* 2193 * We silently ignore failures here. The bus should keep working 2194 * correctly even if one or more i2c devices are not registered. 2195 */ 2196 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2197 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base); 2198 2199 return 0; 2200 } 2201 2202 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2203 { 2204 struct i2c_dev_desc *i2cdev; 2205 2206 i2c_del_adapter(&master->i2c); 2207 2208 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2209 i2cdev->dev = NULL; 2210 } 2211 2212 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2213 { 2214 struct i3c_dev_desc *i3cdev; 2215 2216 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2217 if (!i3cdev->dev) 2218 continue; 2219 2220 i3cdev->dev->desc = NULL; 2221 if (device_is_registered(&i3cdev->dev->dev)) 2222 device_unregister(&i3cdev->dev->dev); 2223 else 2224 put_device(&i3cdev->dev->dev); 2225 i3cdev->dev = NULL; 2226 } 2227 } 2228 2229 /** 2230 * i3c_master_queue_ibi() - Queue an IBI 2231 * @dev: the device this IBI is coming from 2232 * @slot: the IBI slot used to store the payload 2233 * 2234 * Queue an IBI to the controller workqueue. The IBI handler attached to 2235 * the dev will be called from a workqueue context. 2236 */ 2237 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2238 { 2239 atomic_inc(&dev->ibi->pending_ibis); 2240 queue_work(dev->common.master->wq, &slot->work); 2241 } 2242 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2243 2244 static void i3c_master_handle_ibi(struct work_struct *work) 2245 { 2246 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2247 work); 2248 struct i3c_dev_desc *dev = slot->dev; 2249 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2250 struct i3c_ibi_payload payload; 2251 2252 payload.data = slot->data; 2253 payload.len = slot->len; 2254 2255 if (dev->dev) 2256 dev->ibi->handler(dev->dev, &payload); 2257 2258 master->ops->recycle_ibi_slot(dev, slot); 2259 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2260 complete(&dev->ibi->all_ibis_handled); 2261 } 2262 2263 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2264 struct i3c_ibi_slot *slot) 2265 { 2266 slot->dev = dev; 2267 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2268 } 2269 2270 struct i3c_generic_ibi_slot { 2271 struct list_head node; 2272 struct i3c_ibi_slot base; 2273 }; 2274 2275 struct i3c_generic_ibi_pool { 2276 spinlock_t lock; 2277 unsigned int num_slots; 2278 struct i3c_generic_ibi_slot *slots; 2279 void *payload_buf; 2280 struct list_head free_slots; 2281 struct list_head pending; 2282 }; 2283 2284 /** 2285 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2286 * @pool: the IBI pool to free 2287 * 2288 * Free all IBI slots allated by a generic IBI pool. 2289 */ 2290 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2291 { 2292 struct i3c_generic_ibi_slot *slot; 2293 unsigned int nslots = 0; 2294 2295 while (!list_empty(&pool->free_slots)) { 2296 slot = list_first_entry(&pool->free_slots, 2297 struct i3c_generic_ibi_slot, node); 2298 list_del(&slot->node); 2299 nslots++; 2300 } 2301 2302 /* 2303 * If the number of freed slots is not equal to the number of allocated 2304 * slots we have a leak somewhere. 2305 */ 2306 WARN_ON(nslots != pool->num_slots); 2307 2308 kfree(pool->payload_buf); 2309 kfree(pool->slots); 2310 kfree(pool); 2311 } 2312 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2313 2314 /** 2315 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2316 * @dev: the device this pool will be used for 2317 * @req: IBI setup request describing what the device driver expects 2318 * 2319 * Create a generic IBI pool based on the information provided in @req. 2320 * 2321 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2322 */ 2323 struct i3c_generic_ibi_pool * 2324 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2325 const struct i3c_ibi_setup *req) 2326 { 2327 struct i3c_generic_ibi_pool *pool; 2328 struct i3c_generic_ibi_slot *slot; 2329 unsigned int i; 2330 int ret; 2331 2332 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2333 if (!pool) 2334 return ERR_PTR(-ENOMEM); 2335 2336 spin_lock_init(&pool->lock); 2337 INIT_LIST_HEAD(&pool->free_slots); 2338 INIT_LIST_HEAD(&pool->pending); 2339 2340 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2341 if (!pool->slots) { 2342 ret = -ENOMEM; 2343 goto err_free_pool; 2344 } 2345 2346 if (req->max_payload_len) { 2347 pool->payload_buf = kcalloc(req->num_slots, 2348 req->max_payload_len, GFP_KERNEL); 2349 if (!pool->payload_buf) { 2350 ret = -ENOMEM; 2351 goto err_free_pool; 2352 } 2353 } 2354 2355 for (i = 0; i < req->num_slots; i++) { 2356 slot = &pool->slots[i]; 2357 i3c_master_init_ibi_slot(dev, &slot->base); 2358 2359 if (req->max_payload_len) 2360 slot->base.data = pool->payload_buf + 2361 (i * req->max_payload_len); 2362 2363 list_add_tail(&slot->node, &pool->free_slots); 2364 pool->num_slots++; 2365 } 2366 2367 return pool; 2368 2369 err_free_pool: 2370 i3c_generic_ibi_free_pool(pool); 2371 return ERR_PTR(ret); 2372 } 2373 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2374 2375 /** 2376 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2377 * @pool: the pool to query an IBI slot on 2378 * 2379 * Search for a free slot in a generic IBI pool. 2380 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2381 * when it's no longer needed. 2382 * 2383 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2384 */ 2385 struct i3c_ibi_slot * 2386 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2387 { 2388 struct i3c_generic_ibi_slot *slot; 2389 unsigned long flags; 2390 2391 spin_lock_irqsave(&pool->lock, flags); 2392 slot = list_first_entry_or_null(&pool->free_slots, 2393 struct i3c_generic_ibi_slot, node); 2394 if (slot) 2395 list_del(&slot->node); 2396 spin_unlock_irqrestore(&pool->lock, flags); 2397 2398 return slot ? &slot->base : NULL; 2399 } 2400 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2401 2402 /** 2403 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2404 * @pool: the pool to return the IBI slot to 2405 * @s: IBI slot to recycle 2406 * 2407 * Add an IBI slot back to its generic IBI pool. Should be called from the 2408 * master driver struct_master_controller_ops->recycle_ibi() method. 2409 */ 2410 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2411 struct i3c_ibi_slot *s) 2412 { 2413 struct i3c_generic_ibi_slot *slot; 2414 unsigned long flags; 2415 2416 if (!s) 2417 return; 2418 2419 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2420 spin_lock_irqsave(&pool->lock, flags); 2421 list_add_tail(&slot->node, &pool->free_slots); 2422 spin_unlock_irqrestore(&pool->lock, flags); 2423 } 2424 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2425 2426 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2427 { 2428 if (!ops || !ops->bus_init || !ops->priv_xfers || 2429 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2430 return -EINVAL; 2431 2432 if (ops->request_ibi && 2433 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2434 !ops->recycle_ibi_slot)) 2435 return -EINVAL; 2436 2437 return 0; 2438 } 2439 2440 /** 2441 * i3c_master_register() - register an I3C master 2442 * @master: master used to send frames on the bus 2443 * @parent: the parent device (the one that provides this I3C master 2444 * controller) 2445 * @ops: the master controller operations 2446 * @secondary: true if you are registering a secondary master. Will return 2447 * -ENOTSUPP if set to true since secondary masters are not yet 2448 * supported 2449 * 2450 * This function takes care of everything for you: 2451 * 2452 * - creates and initializes the I3C bus 2453 * - populates the bus with static I2C devs if @parent->of_node is not 2454 * NULL 2455 * - registers all I3C devices added by the controller during bus 2456 * initialization 2457 * - registers the I2C adapter and all I2C devices 2458 * 2459 * Return: 0 in case of success, a negative error code otherwise. 2460 */ 2461 int i3c_master_register(struct i3c_master_controller *master, 2462 struct device *parent, 2463 const struct i3c_master_controller_ops *ops, 2464 bool secondary) 2465 { 2466 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2467 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2468 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2469 struct i2c_dev_boardinfo *i2cbi; 2470 int ret; 2471 2472 /* We do not support secondary masters yet. */ 2473 if (secondary) 2474 return -ENOTSUPP; 2475 2476 ret = i3c_master_check_ops(ops); 2477 if (ret) 2478 return ret; 2479 2480 master->dev.parent = parent; 2481 master->dev.of_node = of_node_get(parent->of_node); 2482 master->dev.bus = &i3c_bus_type; 2483 master->dev.type = &i3c_masterdev_type; 2484 master->dev.release = i3c_masterdev_release; 2485 master->ops = ops; 2486 master->secondary = secondary; 2487 INIT_LIST_HEAD(&master->boardinfo.i2c); 2488 INIT_LIST_HEAD(&master->boardinfo.i3c); 2489 2490 ret = i3c_bus_init(i3cbus); 2491 if (ret) 2492 return ret; 2493 2494 device_initialize(&master->dev); 2495 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2496 2497 ret = of_populate_i3c_bus(master); 2498 if (ret) 2499 goto err_put_dev; 2500 2501 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2502 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2503 case I3C_LVR_I2C_INDEX(0): 2504 if (mode < I3C_BUS_MODE_MIXED_FAST) 2505 mode = I3C_BUS_MODE_MIXED_FAST; 2506 break; 2507 case I3C_LVR_I2C_INDEX(1): 2508 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2509 mode = I3C_BUS_MODE_MIXED_LIMITED; 2510 break; 2511 case I3C_LVR_I2C_INDEX(2): 2512 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2513 mode = I3C_BUS_MODE_MIXED_SLOW; 2514 break; 2515 default: 2516 ret = -EINVAL; 2517 goto err_put_dev; 2518 } 2519 2520 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2521 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2522 } 2523 2524 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2525 if (ret) 2526 goto err_put_dev; 2527 2528 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2529 if (!master->wq) { 2530 ret = -ENOMEM; 2531 goto err_put_dev; 2532 } 2533 2534 ret = i3c_master_bus_init(master); 2535 if (ret) 2536 goto err_put_dev; 2537 2538 ret = device_add(&master->dev); 2539 if (ret) 2540 goto err_cleanup_bus; 2541 2542 /* 2543 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2544 * through the I2C subsystem. 2545 */ 2546 ret = i3c_master_i2c_adapter_init(master); 2547 if (ret) 2548 goto err_del_dev; 2549 2550 /* 2551 * We're done initializing the bus and the controller, we can now 2552 * register I3C devices discovered during the initial DAA. 2553 */ 2554 master->init_done = true; 2555 i3c_bus_normaluse_lock(&master->bus); 2556 i3c_master_register_new_i3c_devs(master); 2557 i3c_bus_normaluse_unlock(&master->bus); 2558 2559 return 0; 2560 2561 err_del_dev: 2562 device_del(&master->dev); 2563 2564 err_cleanup_bus: 2565 i3c_master_bus_cleanup(master); 2566 2567 err_put_dev: 2568 put_device(&master->dev); 2569 2570 return ret; 2571 } 2572 EXPORT_SYMBOL_GPL(i3c_master_register); 2573 2574 /** 2575 * i3c_master_unregister() - unregister an I3C master 2576 * @master: master used to send frames on the bus 2577 * 2578 * Basically undo everything done in i3c_master_register(). 2579 * 2580 * Return: 0 in case of success, a negative error code otherwise. 2581 */ 2582 int i3c_master_unregister(struct i3c_master_controller *master) 2583 { 2584 i3c_master_i2c_adapter_cleanup(master); 2585 i3c_master_unregister_i3c_devs(master); 2586 i3c_master_bus_cleanup(master); 2587 device_unregister(&master->dev); 2588 2589 return 0; 2590 } 2591 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2592 2593 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2594 struct i3c_priv_xfer *xfers, 2595 int nxfers) 2596 { 2597 struct i3c_master_controller *master; 2598 2599 if (!dev) 2600 return -ENOENT; 2601 2602 master = i3c_dev_get_master(dev); 2603 if (!master || !xfers) 2604 return -EINVAL; 2605 2606 if (!master->ops->priv_xfers) 2607 return -ENOTSUPP; 2608 2609 return master->ops->priv_xfers(dev, xfers, nxfers); 2610 } 2611 2612 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2613 { 2614 struct i3c_master_controller *master; 2615 int ret; 2616 2617 if (!dev->ibi) 2618 return -EINVAL; 2619 2620 master = i3c_dev_get_master(dev); 2621 ret = master->ops->disable_ibi(dev); 2622 if (ret) 2623 return ret; 2624 2625 reinit_completion(&dev->ibi->all_ibis_handled); 2626 if (atomic_read(&dev->ibi->pending_ibis)) 2627 wait_for_completion(&dev->ibi->all_ibis_handled); 2628 2629 dev->ibi->enabled = false; 2630 2631 return 0; 2632 } 2633 2634 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2635 { 2636 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2637 int ret; 2638 2639 if (!dev->ibi) 2640 return -EINVAL; 2641 2642 ret = master->ops->enable_ibi(dev); 2643 if (!ret) 2644 dev->ibi->enabled = true; 2645 2646 return ret; 2647 } 2648 2649 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2650 const struct i3c_ibi_setup *req) 2651 { 2652 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2653 struct i3c_device_ibi_info *ibi; 2654 int ret; 2655 2656 if (!master->ops->request_ibi) 2657 return -ENOTSUPP; 2658 2659 if (dev->ibi) 2660 return -EBUSY; 2661 2662 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2663 if (!ibi) 2664 return -ENOMEM; 2665 2666 atomic_set(&ibi->pending_ibis, 0); 2667 init_completion(&ibi->all_ibis_handled); 2668 ibi->handler = req->handler; 2669 ibi->max_payload_len = req->max_payload_len; 2670 ibi->num_slots = req->num_slots; 2671 2672 dev->ibi = ibi; 2673 ret = master->ops->request_ibi(dev, req); 2674 if (ret) { 2675 kfree(ibi); 2676 dev->ibi = NULL; 2677 } 2678 2679 return ret; 2680 } 2681 2682 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2683 { 2684 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2685 2686 if (!dev->ibi) 2687 return; 2688 2689 if (WARN_ON(dev->ibi->enabled)) 2690 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2691 2692 master->ops->free_ibi(dev); 2693 kfree(dev->ibi); 2694 dev->ibi = NULL; 2695 } 2696 2697 static int __init i3c_init(void) 2698 { 2699 return bus_register(&i3c_bus_type); 2700 } 2701 subsys_initcall(i3c_init); 2702 2703 static void __exit i3c_exit(void) 2704 { 2705 idr_destroy(&i3c_bus_idr); 2706 bus_unregister(&i3c_bus_type); 2707 } 2708 module_exit(i3c_exit); 2709 2710 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 2711 MODULE_DESCRIPTION("I3C core"); 2712 MODULE_LICENSE("GPL v2"); 2713