1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 25 /** 26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 27 * @bus: I3C bus to take the lock on 28 * 29 * This function takes the bus lock so that no other operations can occur on 30 * the bus. This is needed for all kind of bus maintenance operation, like 31 * - enabling/disabling slave events 32 * - re-triggering DAA 33 * - changing the dynamic address of a device 34 * - relinquishing mastership 35 * - ... 36 * 37 * The reason for this kind of locking is that we don't want drivers and core 38 * logic to rely on I3C device information that could be changed behind their 39 * back. 40 */ 41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 42 { 43 down_write(&bus->lock); 44 } 45 46 /** 47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 48 * operation 49 * @bus: I3C bus to release the lock on 50 * 51 * Should be called when the bus maintenance operation is done. See 52 * i3c_bus_maintenance_lock() for more details on what these maintenance 53 * operations are. 54 */ 55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 56 { 57 up_write(&bus->lock); 58 } 59 60 /** 61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 62 * @bus: I3C bus to take the lock on 63 * 64 * This function takes the bus lock for any operation that is not a maintenance 65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 66 * maintenance operations). Basically all communications with I3C devices are 67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 68 * state or I3C dynamic address). 69 * 70 * Note that this lock is not guaranteeing serialization of normal operations. 71 * In other words, transfer requests passed to the I3C master can be submitted 72 * in parallel and I3C master drivers have to use their own locking to make 73 * sure two different communications are not inter-mixed, or access to the 74 * output/input queue is not done while the engine is busy. 75 */ 76 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 77 { 78 down_read(&bus->lock); 79 } 80 81 /** 82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 83 * @bus: I3C bus to release the lock on 84 * 85 * Should be called when a normal operation is done. See 86 * i3c_bus_normaluse_lock() for more details on what these normal operations 87 * are. 88 */ 89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 90 { 91 up_read(&bus->lock); 92 } 93 94 static struct i3c_master_controller * 95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 96 { 97 return container_of(i3cbus, struct i3c_master_controller, bus); 98 } 99 100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 101 { 102 return container_of(dev, struct i3c_master_controller, dev); 103 } 104 105 static const struct device_type i3c_device_type; 106 107 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 108 { 109 struct i3c_master_controller *master; 110 111 if (dev->type == &i3c_device_type) 112 return dev_to_i3cdev(dev)->bus; 113 114 master = dev_to_i3cmaster(dev); 115 116 return &master->bus; 117 } 118 119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 120 { 121 struct i3c_master_controller *master; 122 123 if (dev->type == &i3c_device_type) 124 return dev_to_i3cdev(dev)->desc; 125 126 master = dev_to_i3cmaster(dev); 127 128 return master->this; 129 } 130 131 static ssize_t bcr_show(struct device *dev, 132 struct device_attribute *da, 133 char *buf) 134 { 135 struct i3c_bus *bus = dev_to_i3cbus(dev); 136 struct i3c_dev_desc *desc; 137 ssize_t ret; 138 139 i3c_bus_normaluse_lock(bus); 140 desc = dev_to_i3cdesc(dev); 141 ret = sprintf(buf, "%x\n", desc->info.bcr); 142 i3c_bus_normaluse_unlock(bus); 143 144 return ret; 145 } 146 static DEVICE_ATTR_RO(bcr); 147 148 static ssize_t dcr_show(struct device *dev, 149 struct device_attribute *da, 150 char *buf) 151 { 152 struct i3c_bus *bus = dev_to_i3cbus(dev); 153 struct i3c_dev_desc *desc; 154 ssize_t ret; 155 156 i3c_bus_normaluse_lock(bus); 157 desc = dev_to_i3cdesc(dev); 158 ret = sprintf(buf, "%x\n", desc->info.dcr); 159 i3c_bus_normaluse_unlock(bus); 160 161 return ret; 162 } 163 static DEVICE_ATTR_RO(dcr); 164 165 static ssize_t pid_show(struct device *dev, 166 struct device_attribute *da, 167 char *buf) 168 { 169 struct i3c_bus *bus = dev_to_i3cbus(dev); 170 struct i3c_dev_desc *desc; 171 ssize_t ret; 172 173 i3c_bus_normaluse_lock(bus); 174 desc = dev_to_i3cdesc(dev); 175 ret = sprintf(buf, "%llx\n", desc->info.pid); 176 i3c_bus_normaluse_unlock(bus); 177 178 return ret; 179 } 180 static DEVICE_ATTR_RO(pid); 181 182 static ssize_t dynamic_address_show(struct device *dev, 183 struct device_attribute *da, 184 char *buf) 185 { 186 struct i3c_bus *bus = dev_to_i3cbus(dev); 187 struct i3c_dev_desc *desc; 188 ssize_t ret; 189 190 i3c_bus_normaluse_lock(bus); 191 desc = dev_to_i3cdesc(dev); 192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 193 i3c_bus_normaluse_unlock(bus); 194 195 return ret; 196 } 197 static DEVICE_ATTR_RO(dynamic_address); 198 199 static const char * const hdrcap_strings[] = { 200 "hdr-ddr", "hdr-tsp", "hdr-tsl", 201 }; 202 203 static ssize_t hdrcap_show(struct device *dev, 204 struct device_attribute *da, 205 char *buf) 206 { 207 struct i3c_bus *bus = dev_to_i3cbus(dev); 208 struct i3c_dev_desc *desc; 209 ssize_t offset = 0, ret; 210 unsigned long caps; 211 int mode; 212 213 i3c_bus_normaluse_lock(bus); 214 desc = dev_to_i3cdesc(dev); 215 caps = desc->info.hdr_cap; 216 for_each_set_bit(mode, &caps, 8) { 217 if (mode >= ARRAY_SIZE(hdrcap_strings)) 218 break; 219 220 if (!hdrcap_strings[mode]) 221 continue; 222 223 ret = sprintf(buf + offset, offset ? " %s" : "%s", 224 hdrcap_strings[mode]); 225 if (ret < 0) 226 goto out; 227 228 offset += ret; 229 } 230 231 ret = sprintf(buf + offset, "\n"); 232 if (ret < 0) 233 goto out; 234 235 ret = offset + ret; 236 237 out: 238 i3c_bus_normaluse_unlock(bus); 239 240 return ret; 241 } 242 static DEVICE_ATTR_RO(hdrcap); 243 244 static ssize_t modalias_show(struct device *dev, 245 struct device_attribute *da, char *buf) 246 { 247 struct i3c_device *i3c = dev_to_i3cdev(dev); 248 struct i3c_device_info devinfo; 249 u16 manuf, part, ext; 250 251 i3c_device_get_info(i3c, &devinfo); 252 manuf = I3C_PID_MANUF_ID(devinfo.pid); 253 part = I3C_PID_PART_ID(devinfo.pid); 254 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 255 256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 258 manuf); 259 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 261 devinfo.dcr, manuf, part, ext); 262 } 263 static DEVICE_ATTR_RO(modalias); 264 265 static struct attribute *i3c_device_attrs[] = { 266 &dev_attr_bcr.attr, 267 &dev_attr_dcr.attr, 268 &dev_attr_pid.attr, 269 &dev_attr_dynamic_address.attr, 270 &dev_attr_hdrcap.attr, 271 &dev_attr_modalias.attr, 272 NULL, 273 }; 274 ATTRIBUTE_GROUPS(i3c_device); 275 276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env) 277 { 278 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 279 struct i3c_device_info devinfo; 280 u16 manuf, part, ext; 281 282 i3c_device_get_info(i3cdev, &devinfo); 283 manuf = I3C_PID_MANUF_ID(devinfo.pid); 284 part = I3C_PID_PART_ID(devinfo.pid); 285 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 286 287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 289 devinfo.dcr, manuf); 290 291 return add_uevent_var(env, 292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 293 devinfo.dcr, manuf, part, ext); 294 } 295 296 static const struct device_type i3c_device_type = { 297 .groups = i3c_device_groups, 298 .uevent = i3c_device_uevent, 299 }; 300 301 static int i3c_device_match(struct device *dev, struct device_driver *drv) 302 { 303 struct i3c_device *i3cdev; 304 struct i3c_driver *i3cdrv; 305 306 if (dev->type != &i3c_device_type) 307 return 0; 308 309 i3cdev = dev_to_i3cdev(dev); 310 i3cdrv = drv_to_i3cdrv(drv); 311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 312 return 1; 313 314 return 0; 315 } 316 317 static int i3c_device_probe(struct device *dev) 318 { 319 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 321 322 return driver->probe(i3cdev); 323 } 324 325 static void i3c_device_remove(struct device *dev) 326 { 327 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 329 330 if (driver->remove) 331 driver->remove(i3cdev); 332 333 i3c_device_free_ibi(i3cdev); 334 } 335 336 struct bus_type i3c_bus_type = { 337 .name = "i3c", 338 .match = i3c_device_match, 339 .probe = i3c_device_probe, 340 .remove = i3c_device_remove, 341 }; 342 343 static enum i3c_addr_slot_status 344 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 345 { 346 unsigned long status; 347 int bitpos = addr * 2; 348 349 if (addr > I2C_MAX_ADDR) 350 return I3C_ADDR_SLOT_RSVD; 351 352 status = bus->addrslots[bitpos / BITS_PER_LONG]; 353 status >>= bitpos % BITS_PER_LONG; 354 355 return status & I3C_ADDR_SLOT_STATUS_MASK; 356 } 357 358 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 359 enum i3c_addr_slot_status status) 360 { 361 int bitpos = addr * 2; 362 unsigned long *ptr; 363 364 if (addr > I2C_MAX_ADDR) 365 return; 366 367 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 368 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 369 (bitpos % BITS_PER_LONG)); 370 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 371 } 372 373 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 374 { 375 enum i3c_addr_slot_status status; 376 377 status = i3c_bus_get_addr_slot_status(bus, addr); 378 379 return status == I3C_ADDR_SLOT_FREE; 380 } 381 382 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 383 { 384 enum i3c_addr_slot_status status; 385 u8 addr; 386 387 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 388 status = i3c_bus_get_addr_slot_status(bus, addr); 389 if (status == I3C_ADDR_SLOT_FREE) 390 return addr; 391 } 392 393 return -ENOMEM; 394 } 395 396 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 397 { 398 int i; 399 400 /* Addresses 0 to 7 are reserved. */ 401 for (i = 0; i < 8; i++) 402 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 403 404 /* 405 * Reserve broadcast address and all addresses that might collide 406 * with the broadcast address when facing a single bit error. 407 */ 408 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 409 I3C_ADDR_SLOT_RSVD); 410 for (i = 0; i < 7; i++) 411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 412 I3C_ADDR_SLOT_RSVD); 413 } 414 415 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 416 { 417 mutex_lock(&i3c_core_lock); 418 idr_remove(&i3c_bus_idr, i3cbus->id); 419 mutex_unlock(&i3c_core_lock); 420 } 421 422 static int i3c_bus_init(struct i3c_bus *i3cbus) 423 { 424 int ret; 425 426 init_rwsem(&i3cbus->lock); 427 INIT_LIST_HEAD(&i3cbus->devs.i2c); 428 INIT_LIST_HEAD(&i3cbus->devs.i3c); 429 i3c_bus_init_addrslots(i3cbus); 430 i3cbus->mode = I3C_BUS_MODE_PURE; 431 432 mutex_lock(&i3c_core_lock); 433 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL); 434 mutex_unlock(&i3c_core_lock); 435 436 if (ret < 0) 437 return ret; 438 439 i3cbus->id = ret; 440 441 return 0; 442 } 443 444 static const char * const i3c_bus_mode_strings[] = { 445 [I3C_BUS_MODE_PURE] = "pure", 446 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 447 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 448 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 449 }; 450 451 static ssize_t mode_show(struct device *dev, 452 struct device_attribute *da, 453 char *buf) 454 { 455 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 456 ssize_t ret; 457 458 i3c_bus_normaluse_lock(i3cbus); 459 if (i3cbus->mode < 0 || 460 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 461 !i3c_bus_mode_strings[i3cbus->mode]) 462 ret = sprintf(buf, "unknown\n"); 463 else 464 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 465 i3c_bus_normaluse_unlock(i3cbus); 466 467 return ret; 468 } 469 static DEVICE_ATTR_RO(mode); 470 471 static ssize_t current_master_show(struct device *dev, 472 struct device_attribute *da, 473 char *buf) 474 { 475 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 476 ssize_t ret; 477 478 i3c_bus_normaluse_lock(i3cbus); 479 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 480 i3cbus->cur_master->info.pid); 481 i3c_bus_normaluse_unlock(i3cbus); 482 483 return ret; 484 } 485 static DEVICE_ATTR_RO(current_master); 486 487 static ssize_t i3c_scl_frequency_show(struct device *dev, 488 struct device_attribute *da, 489 char *buf) 490 { 491 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 492 ssize_t ret; 493 494 i3c_bus_normaluse_lock(i3cbus); 495 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 496 i3c_bus_normaluse_unlock(i3cbus); 497 498 return ret; 499 } 500 static DEVICE_ATTR_RO(i3c_scl_frequency); 501 502 static ssize_t i2c_scl_frequency_show(struct device *dev, 503 struct device_attribute *da, 504 char *buf) 505 { 506 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 507 ssize_t ret; 508 509 i3c_bus_normaluse_lock(i3cbus); 510 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 511 i3c_bus_normaluse_unlock(i3cbus); 512 513 return ret; 514 } 515 static DEVICE_ATTR_RO(i2c_scl_frequency); 516 517 static struct attribute *i3c_masterdev_attrs[] = { 518 &dev_attr_mode.attr, 519 &dev_attr_current_master.attr, 520 &dev_attr_i3c_scl_frequency.attr, 521 &dev_attr_i2c_scl_frequency.attr, 522 &dev_attr_bcr.attr, 523 &dev_attr_dcr.attr, 524 &dev_attr_pid.attr, 525 &dev_attr_dynamic_address.attr, 526 &dev_attr_hdrcap.attr, 527 NULL, 528 }; 529 ATTRIBUTE_GROUPS(i3c_masterdev); 530 531 static void i3c_masterdev_release(struct device *dev) 532 { 533 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 534 struct i3c_bus *bus = dev_to_i3cbus(dev); 535 536 if (master->wq) 537 destroy_workqueue(master->wq); 538 539 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 540 i3c_bus_cleanup(bus); 541 542 of_node_put(dev->of_node); 543 } 544 545 static const struct device_type i3c_masterdev_type = { 546 .groups = i3c_masterdev_groups, 547 }; 548 549 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 550 unsigned long max_i2c_scl_rate) 551 { 552 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 553 554 i3cbus->mode = mode; 555 556 switch (i3cbus->mode) { 557 case I3C_BUS_MODE_PURE: 558 if (!i3cbus->scl_rate.i3c) 559 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 560 break; 561 case I3C_BUS_MODE_MIXED_FAST: 562 case I3C_BUS_MODE_MIXED_LIMITED: 563 if (!i3cbus->scl_rate.i3c) 564 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 565 if (!i3cbus->scl_rate.i2c) 566 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 567 break; 568 case I3C_BUS_MODE_MIXED_SLOW: 569 if (!i3cbus->scl_rate.i2c) 570 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 571 if (!i3cbus->scl_rate.i3c || 572 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 573 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 574 break; 575 default: 576 return -EINVAL; 577 } 578 579 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 580 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 581 582 /* 583 * I3C/I2C frequency may have been overridden, check that user-provided 584 * values are not exceeding max possible frequency. 585 */ 586 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 587 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 588 return -EINVAL; 589 590 return 0; 591 } 592 593 static struct i3c_master_controller * 594 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 595 { 596 return container_of(adap, struct i3c_master_controller, i2c); 597 } 598 599 static struct i2c_adapter * 600 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 601 { 602 return &master->i2c; 603 } 604 605 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 606 { 607 kfree(dev); 608 } 609 610 static struct i2c_dev_desc * 611 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 612 const struct i2c_dev_boardinfo *boardinfo) 613 { 614 struct i2c_dev_desc *dev; 615 616 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 617 if (!dev) 618 return ERR_PTR(-ENOMEM); 619 620 dev->common.master = master; 621 dev->boardinfo = boardinfo; 622 dev->addr = boardinfo->base.addr; 623 dev->lvr = boardinfo->lvr; 624 625 return dev; 626 } 627 628 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 629 u16 payloadlen) 630 { 631 dest->addr = addr; 632 dest->payload.len = payloadlen; 633 if (payloadlen) 634 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 635 else 636 dest->payload.data = NULL; 637 638 return dest->payload.data; 639 } 640 641 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 642 { 643 kfree(dest->payload.data); 644 } 645 646 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 647 struct i3c_ccc_cmd_dest *dests, 648 unsigned int ndests) 649 { 650 cmd->rnw = rnw ? 1 : 0; 651 cmd->id = id; 652 cmd->dests = dests; 653 cmd->ndests = ndests; 654 cmd->err = I3C_ERROR_UNKNOWN; 655 } 656 657 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 658 struct i3c_ccc_cmd *cmd) 659 { 660 int ret; 661 662 if (!cmd || !master) 663 return -EINVAL; 664 665 if (WARN_ON(master->init_done && 666 !rwsem_is_locked(&master->bus.lock))) 667 return -EINVAL; 668 669 if (!master->ops->send_ccc_cmd) 670 return -ENOTSUPP; 671 672 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 673 return -EINVAL; 674 675 if (master->ops->supports_ccc_cmd && 676 !master->ops->supports_ccc_cmd(master, cmd)) 677 return -ENOTSUPP; 678 679 ret = master->ops->send_ccc_cmd(master, cmd); 680 if (ret) { 681 if (cmd->err != I3C_ERROR_UNKNOWN) 682 return cmd->err; 683 684 return ret; 685 } 686 687 return 0; 688 } 689 690 static struct i2c_dev_desc * 691 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 692 u16 addr) 693 { 694 struct i2c_dev_desc *dev; 695 696 i3c_bus_for_each_i2cdev(&master->bus, dev) { 697 if (dev->boardinfo->base.addr == addr) 698 return dev; 699 } 700 701 return NULL; 702 } 703 704 /** 705 * i3c_master_get_free_addr() - get a free address on the bus 706 * @master: I3C master object 707 * @start_addr: where to start searching 708 * 709 * This function must be called with the bus lock held in write mode. 710 * 711 * Return: the first free address starting at @start_addr (included) or -ENOMEM 712 * if there's no more address available. 713 */ 714 int i3c_master_get_free_addr(struct i3c_master_controller *master, 715 u8 start_addr) 716 { 717 return i3c_bus_get_free_addr(&master->bus, start_addr); 718 } 719 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 720 721 static void i3c_device_release(struct device *dev) 722 { 723 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 724 725 WARN_ON(i3cdev->desc); 726 727 of_node_put(i3cdev->dev.of_node); 728 kfree(i3cdev); 729 } 730 731 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 732 { 733 kfree(dev); 734 } 735 736 static struct i3c_dev_desc * 737 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 738 const struct i3c_device_info *info) 739 { 740 struct i3c_dev_desc *dev; 741 742 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 743 if (!dev) 744 return ERR_PTR(-ENOMEM); 745 746 dev->common.master = master; 747 dev->info = *info; 748 mutex_init(&dev->ibi_lock); 749 750 return dev; 751 } 752 753 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 754 u8 addr) 755 { 756 enum i3c_addr_slot_status addrstat; 757 struct i3c_ccc_cmd_dest dest; 758 struct i3c_ccc_cmd cmd; 759 int ret; 760 761 if (!master) 762 return -EINVAL; 763 764 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 765 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 766 return -EINVAL; 767 768 i3c_ccc_cmd_dest_init(&dest, addr, 0); 769 i3c_ccc_cmd_init(&cmd, false, 770 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 771 &dest, 1); 772 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 773 i3c_ccc_cmd_dest_cleanup(&dest); 774 775 return ret; 776 } 777 778 /** 779 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 780 * procedure 781 * @master: master used to send frames on the bus 782 * 783 * Send a ENTDAA CCC command to start a DAA procedure. 784 * 785 * Note that this function only sends the ENTDAA CCC command, all the logic 786 * behind dynamic address assignment has to be handled in the I3C master 787 * driver. 788 * 789 * This function must be called with the bus lock held in write mode. 790 * 791 * Return: 0 in case of success, a positive I3C error code if the error is 792 * one of the official Mx error codes, and a negative error code otherwise. 793 */ 794 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 795 { 796 struct i3c_ccc_cmd_dest dest; 797 struct i3c_ccc_cmd cmd; 798 int ret; 799 800 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 801 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 802 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 803 i3c_ccc_cmd_dest_cleanup(&dest); 804 805 return ret; 806 } 807 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 808 809 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 810 u8 addr, bool enable, u8 evts) 811 { 812 struct i3c_ccc_events *events; 813 struct i3c_ccc_cmd_dest dest; 814 struct i3c_ccc_cmd cmd; 815 int ret; 816 817 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 818 if (!events) 819 return -ENOMEM; 820 821 events->events = evts; 822 i3c_ccc_cmd_init(&cmd, false, 823 enable ? 824 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 825 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 826 &dest, 1); 827 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 828 i3c_ccc_cmd_dest_cleanup(&dest); 829 830 return ret; 831 } 832 833 /** 834 * i3c_master_disec_locked() - send a DISEC CCC command 835 * @master: master used to send frames on the bus 836 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 837 * @evts: events to disable 838 * 839 * Send a DISEC CCC command to disable some or all events coming from a 840 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 841 * 842 * This function must be called with the bus lock held in write mode. 843 * 844 * Return: 0 in case of success, a positive I3C error code if the error is 845 * one of the official Mx error codes, and a negative error code otherwise. 846 */ 847 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 848 u8 evts) 849 { 850 return i3c_master_enec_disec_locked(master, addr, false, evts); 851 } 852 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 853 854 /** 855 * i3c_master_enec_locked() - send an ENEC CCC command 856 * @master: master used to send frames on the bus 857 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 858 * @evts: events to disable 859 * 860 * Sends an ENEC CCC command to enable some or all events coming from a 861 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 862 * 863 * This function must be called with the bus lock held in write mode. 864 * 865 * Return: 0 in case of success, a positive I3C error code if the error is 866 * one of the official Mx error codes, and a negative error code otherwise. 867 */ 868 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 869 u8 evts) 870 { 871 return i3c_master_enec_disec_locked(master, addr, true, evts); 872 } 873 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 874 875 /** 876 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 877 * @master: master used to send frames on the bus 878 * 879 * Send a DEFSLVS CCC command containing all the devices known to the @master. 880 * This is useful when you have secondary masters on the bus to propagate 881 * device information. 882 * 883 * This should be called after all I3C devices have been discovered (in other 884 * words, after the DAA procedure has finished) and instantiated in 885 * &i3c_master_controller_ops->bus_init(). 886 * It should also be called if a master ACKed an Hot-Join request and assigned 887 * a dynamic address to the device joining the bus. 888 * 889 * This function must be called with the bus lock held in write mode. 890 * 891 * Return: 0 in case of success, a positive I3C error code if the error is 892 * one of the official Mx error codes, and a negative error code otherwise. 893 */ 894 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 895 { 896 struct i3c_ccc_defslvs *defslvs; 897 struct i3c_ccc_dev_desc *desc; 898 struct i3c_ccc_cmd_dest dest; 899 struct i3c_dev_desc *i3cdev; 900 struct i2c_dev_desc *i2cdev; 901 struct i3c_ccc_cmd cmd; 902 struct i3c_bus *bus; 903 bool send = false; 904 int ndevs = 0, ret; 905 906 if (!master) 907 return -EINVAL; 908 909 bus = i3c_master_get_bus(master); 910 i3c_bus_for_each_i3cdev(bus, i3cdev) { 911 ndevs++; 912 913 if (i3cdev == master->this) 914 continue; 915 916 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 917 I3C_BCR_I3C_MASTER) 918 send = true; 919 } 920 921 /* No other master on the bus, skip DEFSLVS. */ 922 if (!send) 923 return 0; 924 925 i3c_bus_for_each_i2cdev(bus, i2cdev) 926 ndevs++; 927 928 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 929 struct_size(defslvs, slaves, 930 ndevs - 1)); 931 if (!defslvs) 932 return -ENOMEM; 933 934 defslvs->count = ndevs; 935 defslvs->master.bcr = master->this->info.bcr; 936 defslvs->master.dcr = master->this->info.dcr; 937 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 938 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 939 940 desc = defslvs->slaves; 941 i3c_bus_for_each_i2cdev(bus, i2cdev) { 942 desc->lvr = i2cdev->lvr; 943 desc->static_addr = i2cdev->addr << 1; 944 desc++; 945 } 946 947 i3c_bus_for_each_i3cdev(bus, i3cdev) { 948 /* Skip the I3C dev representing this master. */ 949 if (i3cdev == master->this) 950 continue; 951 952 desc->bcr = i3cdev->info.bcr; 953 desc->dcr = i3cdev->info.dcr; 954 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 955 desc->static_addr = i3cdev->info.static_addr << 1; 956 desc++; 957 } 958 959 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 960 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 961 i3c_ccc_cmd_dest_cleanup(&dest); 962 963 return ret; 964 } 965 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 966 967 static int i3c_master_setda_locked(struct i3c_master_controller *master, 968 u8 oldaddr, u8 newaddr, bool setdasa) 969 { 970 struct i3c_ccc_cmd_dest dest; 971 struct i3c_ccc_setda *setda; 972 struct i3c_ccc_cmd cmd; 973 int ret; 974 975 if (!oldaddr || !newaddr) 976 return -EINVAL; 977 978 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 979 if (!setda) 980 return -ENOMEM; 981 982 setda->addr = newaddr << 1; 983 i3c_ccc_cmd_init(&cmd, false, 984 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 985 &dest, 1); 986 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 987 i3c_ccc_cmd_dest_cleanup(&dest); 988 989 return ret; 990 } 991 992 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 993 u8 static_addr, u8 dyn_addr) 994 { 995 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 996 } 997 998 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 999 u8 oldaddr, u8 newaddr) 1000 { 1001 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1002 } 1003 1004 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1005 struct i3c_device_info *info) 1006 { 1007 struct i3c_ccc_cmd_dest dest; 1008 struct i3c_ccc_mrl *mrl; 1009 struct i3c_ccc_cmd cmd; 1010 int ret; 1011 1012 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1013 if (!mrl) 1014 return -ENOMEM; 1015 1016 /* 1017 * When the device does not have IBI payload GETMRL only returns 2 1018 * bytes of data. 1019 */ 1020 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1021 dest.payload.len -= 1; 1022 1023 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1024 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1025 if (ret) 1026 goto out; 1027 1028 switch (dest.payload.len) { 1029 case 3: 1030 info->max_ibi_len = mrl->ibi_len; 1031 fallthrough; 1032 case 2: 1033 info->max_read_len = be16_to_cpu(mrl->read_len); 1034 break; 1035 default: 1036 ret = -EIO; 1037 goto out; 1038 } 1039 1040 out: 1041 i3c_ccc_cmd_dest_cleanup(&dest); 1042 1043 return ret; 1044 } 1045 1046 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1047 struct i3c_device_info *info) 1048 { 1049 struct i3c_ccc_cmd_dest dest; 1050 struct i3c_ccc_mwl *mwl; 1051 struct i3c_ccc_cmd cmd; 1052 int ret; 1053 1054 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1055 if (!mwl) 1056 return -ENOMEM; 1057 1058 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1059 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1060 if (ret) 1061 goto out; 1062 1063 if (dest.payload.len != sizeof(*mwl)) { 1064 ret = -EIO; 1065 goto out; 1066 } 1067 1068 info->max_write_len = be16_to_cpu(mwl->len); 1069 1070 out: 1071 i3c_ccc_cmd_dest_cleanup(&dest); 1072 1073 return ret; 1074 } 1075 1076 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1077 struct i3c_device_info *info) 1078 { 1079 struct i3c_ccc_getmxds *getmaxds; 1080 struct i3c_ccc_cmd_dest dest; 1081 struct i3c_ccc_cmd cmd; 1082 int ret; 1083 1084 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1085 sizeof(*getmaxds)); 1086 if (!getmaxds) 1087 return -ENOMEM; 1088 1089 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1090 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1091 if (ret) 1092 goto out; 1093 1094 if (dest.payload.len != 2 && dest.payload.len != 5) { 1095 ret = -EIO; 1096 goto out; 1097 } 1098 1099 info->max_read_ds = getmaxds->maxrd; 1100 info->max_write_ds = getmaxds->maxwr; 1101 if (dest.payload.len == 5) 1102 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1103 ((u32)getmaxds->maxrdturn[1] << 8) | 1104 ((u32)getmaxds->maxrdturn[2] << 16); 1105 1106 out: 1107 i3c_ccc_cmd_dest_cleanup(&dest); 1108 1109 return ret; 1110 } 1111 1112 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1113 struct i3c_device_info *info) 1114 { 1115 struct i3c_ccc_gethdrcap *gethdrcap; 1116 struct i3c_ccc_cmd_dest dest; 1117 struct i3c_ccc_cmd cmd; 1118 int ret; 1119 1120 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1121 sizeof(*gethdrcap)); 1122 if (!gethdrcap) 1123 return -ENOMEM; 1124 1125 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1126 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1127 if (ret) 1128 goto out; 1129 1130 if (dest.payload.len != 1) { 1131 ret = -EIO; 1132 goto out; 1133 } 1134 1135 info->hdr_cap = gethdrcap->modes; 1136 1137 out: 1138 i3c_ccc_cmd_dest_cleanup(&dest); 1139 1140 return ret; 1141 } 1142 1143 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1144 struct i3c_device_info *info) 1145 { 1146 struct i3c_ccc_getpid *getpid; 1147 struct i3c_ccc_cmd_dest dest; 1148 struct i3c_ccc_cmd cmd; 1149 int ret, i; 1150 1151 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1152 if (!getpid) 1153 return -ENOMEM; 1154 1155 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1156 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1157 if (ret) 1158 goto out; 1159 1160 info->pid = 0; 1161 for (i = 0; i < sizeof(getpid->pid); i++) { 1162 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1163 1164 info->pid |= (u64)getpid->pid[i] << sft; 1165 } 1166 1167 out: 1168 i3c_ccc_cmd_dest_cleanup(&dest); 1169 1170 return ret; 1171 } 1172 1173 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1174 struct i3c_device_info *info) 1175 { 1176 struct i3c_ccc_getbcr *getbcr; 1177 struct i3c_ccc_cmd_dest dest; 1178 struct i3c_ccc_cmd cmd; 1179 int ret; 1180 1181 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1182 if (!getbcr) 1183 return -ENOMEM; 1184 1185 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1186 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1187 if (ret) 1188 goto out; 1189 1190 info->bcr = getbcr->bcr; 1191 1192 out: 1193 i3c_ccc_cmd_dest_cleanup(&dest); 1194 1195 return ret; 1196 } 1197 1198 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1199 struct i3c_device_info *info) 1200 { 1201 struct i3c_ccc_getdcr *getdcr; 1202 struct i3c_ccc_cmd_dest dest; 1203 struct i3c_ccc_cmd cmd; 1204 int ret; 1205 1206 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1207 if (!getdcr) 1208 return -ENOMEM; 1209 1210 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1211 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1212 if (ret) 1213 goto out; 1214 1215 info->dcr = getdcr->dcr; 1216 1217 out: 1218 i3c_ccc_cmd_dest_cleanup(&dest); 1219 1220 return ret; 1221 } 1222 1223 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1224 { 1225 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1226 enum i3c_addr_slot_status slot_status; 1227 int ret; 1228 1229 if (!dev->info.dyn_addr) 1230 return -EINVAL; 1231 1232 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1233 dev->info.dyn_addr); 1234 if (slot_status == I3C_ADDR_SLOT_RSVD || 1235 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1236 return -EINVAL; 1237 1238 ret = i3c_master_getpid_locked(master, &dev->info); 1239 if (ret) 1240 return ret; 1241 1242 ret = i3c_master_getbcr_locked(master, &dev->info); 1243 if (ret) 1244 return ret; 1245 1246 ret = i3c_master_getdcr_locked(master, &dev->info); 1247 if (ret) 1248 return ret; 1249 1250 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1251 ret = i3c_master_getmxds_locked(master, &dev->info); 1252 if (ret) 1253 return ret; 1254 } 1255 1256 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1257 dev->info.max_ibi_len = 1; 1258 1259 i3c_master_getmrl_locked(master, &dev->info); 1260 i3c_master_getmwl_locked(master, &dev->info); 1261 1262 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1263 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1264 if (ret) 1265 return ret; 1266 } 1267 1268 return 0; 1269 } 1270 1271 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1272 { 1273 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1274 1275 if (dev->info.static_addr) 1276 i3c_bus_set_addr_slot_status(&master->bus, 1277 dev->info.static_addr, 1278 I3C_ADDR_SLOT_FREE); 1279 1280 if (dev->info.dyn_addr) 1281 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1282 I3C_ADDR_SLOT_FREE); 1283 1284 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1285 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1286 I3C_ADDR_SLOT_FREE); 1287 } 1288 1289 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1290 { 1291 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1292 enum i3c_addr_slot_status status; 1293 1294 if (!dev->info.static_addr && !dev->info.dyn_addr) 1295 return 0; 1296 1297 if (dev->info.static_addr) { 1298 status = i3c_bus_get_addr_slot_status(&master->bus, 1299 dev->info.static_addr); 1300 if (status != I3C_ADDR_SLOT_FREE) 1301 return -EBUSY; 1302 1303 i3c_bus_set_addr_slot_status(&master->bus, 1304 dev->info.static_addr, 1305 I3C_ADDR_SLOT_I3C_DEV); 1306 } 1307 1308 /* 1309 * ->init_dyn_addr should have been reserved before that, so, if we're 1310 * trying to apply a pre-reserved dynamic address, we should not try 1311 * to reserve the address slot a second time. 1312 */ 1313 if (dev->info.dyn_addr && 1314 (!dev->boardinfo || 1315 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1316 status = i3c_bus_get_addr_slot_status(&master->bus, 1317 dev->info.dyn_addr); 1318 if (status != I3C_ADDR_SLOT_FREE) 1319 goto err_release_static_addr; 1320 1321 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1322 I3C_ADDR_SLOT_I3C_DEV); 1323 } 1324 1325 return 0; 1326 1327 err_release_static_addr: 1328 if (dev->info.static_addr) 1329 i3c_bus_set_addr_slot_status(&master->bus, 1330 dev->info.static_addr, 1331 I3C_ADDR_SLOT_FREE); 1332 1333 return -EBUSY; 1334 } 1335 1336 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1337 struct i3c_dev_desc *dev) 1338 { 1339 int ret; 1340 1341 /* 1342 * We don't attach devices to the controller until they are 1343 * addressable on the bus. 1344 */ 1345 if (!dev->info.static_addr && !dev->info.dyn_addr) 1346 return 0; 1347 1348 ret = i3c_master_get_i3c_addrs(dev); 1349 if (ret) 1350 return ret; 1351 1352 /* Do not attach the master device itself. */ 1353 if (master->this != dev && master->ops->attach_i3c_dev) { 1354 ret = master->ops->attach_i3c_dev(dev); 1355 if (ret) { 1356 i3c_master_put_i3c_addrs(dev); 1357 return ret; 1358 } 1359 } 1360 1361 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1362 1363 return 0; 1364 } 1365 1366 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1367 u8 old_dyn_addr) 1368 { 1369 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1370 enum i3c_addr_slot_status status; 1371 int ret; 1372 1373 if (dev->info.dyn_addr != old_dyn_addr && 1374 (!dev->boardinfo || 1375 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1376 status = i3c_bus_get_addr_slot_status(&master->bus, 1377 dev->info.dyn_addr); 1378 if (status != I3C_ADDR_SLOT_FREE) 1379 return -EBUSY; 1380 i3c_bus_set_addr_slot_status(&master->bus, 1381 dev->info.dyn_addr, 1382 I3C_ADDR_SLOT_I3C_DEV); 1383 } 1384 1385 if (master->ops->reattach_i3c_dev) { 1386 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1387 if (ret) { 1388 i3c_master_put_i3c_addrs(dev); 1389 return ret; 1390 } 1391 } 1392 1393 return 0; 1394 } 1395 1396 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1397 { 1398 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1399 1400 /* Do not detach the master device itself. */ 1401 if (master->this != dev && master->ops->detach_i3c_dev) 1402 master->ops->detach_i3c_dev(dev); 1403 1404 i3c_master_put_i3c_addrs(dev); 1405 list_del(&dev->common.node); 1406 } 1407 1408 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1409 struct i2c_dev_desc *dev) 1410 { 1411 int ret; 1412 1413 if (master->ops->attach_i2c_dev) { 1414 ret = master->ops->attach_i2c_dev(dev); 1415 if (ret) 1416 return ret; 1417 } 1418 1419 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1420 1421 return 0; 1422 } 1423 1424 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1425 { 1426 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1427 1428 list_del(&dev->common.node); 1429 1430 if (master->ops->detach_i2c_dev) 1431 master->ops->detach_i2c_dev(dev); 1432 } 1433 1434 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1435 struct i3c_dev_boardinfo *boardinfo) 1436 { 1437 struct i3c_device_info info = { 1438 .static_addr = boardinfo->static_addr, 1439 }; 1440 struct i3c_dev_desc *i3cdev; 1441 int ret; 1442 1443 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1444 if (IS_ERR(i3cdev)) 1445 return -ENOMEM; 1446 1447 i3cdev->boardinfo = boardinfo; 1448 1449 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1450 if (ret) 1451 goto err_free_dev; 1452 1453 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1454 i3cdev->boardinfo->init_dyn_addr); 1455 if (ret) 1456 goto err_detach_dev; 1457 1458 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1459 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1460 if (ret) 1461 goto err_rstdaa; 1462 1463 ret = i3c_master_retrieve_dev_info(i3cdev); 1464 if (ret) 1465 goto err_rstdaa; 1466 1467 return 0; 1468 1469 err_rstdaa: 1470 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1471 err_detach_dev: 1472 i3c_master_detach_i3c_dev(i3cdev); 1473 err_free_dev: 1474 i3c_master_free_i3c_dev(i3cdev); 1475 1476 return ret; 1477 } 1478 1479 static void 1480 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1481 { 1482 struct i3c_dev_desc *desc; 1483 int ret; 1484 1485 if (!master->init_done) 1486 return; 1487 1488 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1489 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1490 continue; 1491 1492 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1493 if (!desc->dev) 1494 continue; 1495 1496 desc->dev->bus = &master->bus; 1497 desc->dev->desc = desc; 1498 desc->dev->dev.parent = &master->dev; 1499 desc->dev->dev.type = &i3c_device_type; 1500 desc->dev->dev.bus = &i3c_bus_type; 1501 desc->dev->dev.release = i3c_device_release; 1502 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1503 desc->info.pid); 1504 1505 if (desc->boardinfo) 1506 desc->dev->dev.of_node = desc->boardinfo->of_node; 1507 1508 ret = device_register(&desc->dev->dev); 1509 if (ret) 1510 dev_err(&master->dev, 1511 "Failed to add I3C device (err = %d)\n", ret); 1512 } 1513 } 1514 1515 /** 1516 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1517 * @master: master doing the DAA 1518 * 1519 * This function is instantiating an I3C device object and adding it to the 1520 * I3C device list. All device information are automatically retrieved using 1521 * standard CCC commands. 1522 * 1523 * The I3C device object is returned in case the master wants to attach 1524 * private data to it using i3c_dev_set_master_data(). 1525 * 1526 * This function must be called with the bus lock held in write mode. 1527 * 1528 * Return: a 0 in case of success, an negative error code otherwise. 1529 */ 1530 int i3c_master_do_daa(struct i3c_master_controller *master) 1531 { 1532 int ret; 1533 1534 i3c_bus_maintenance_lock(&master->bus); 1535 ret = master->ops->do_daa(master); 1536 i3c_bus_maintenance_unlock(&master->bus); 1537 1538 if (ret) 1539 return ret; 1540 1541 i3c_bus_normaluse_lock(&master->bus); 1542 i3c_master_register_new_i3c_devs(master); 1543 i3c_bus_normaluse_unlock(&master->bus); 1544 1545 return 0; 1546 } 1547 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1548 1549 /** 1550 * i3c_master_set_info() - set master device information 1551 * @master: master used to send frames on the bus 1552 * @info: I3C device information 1553 * 1554 * Set master device info. This should be called from 1555 * &i3c_master_controller_ops->bus_init(). 1556 * 1557 * Not all &i3c_device_info fields are meaningful for a master device. 1558 * Here is a list of fields that should be properly filled: 1559 * 1560 * - &i3c_device_info->dyn_addr 1561 * - &i3c_device_info->bcr 1562 * - &i3c_device_info->dcr 1563 * - &i3c_device_info->pid 1564 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1565 * &i3c_device_info->bcr 1566 * 1567 * This function must be called with the bus lock held in maintenance mode. 1568 * 1569 * Return: 0 if @info contains valid information (not every piece of 1570 * information can be checked, but we can at least make sure @info->dyn_addr 1571 * and @info->bcr are correct), -EINVAL otherwise. 1572 */ 1573 int i3c_master_set_info(struct i3c_master_controller *master, 1574 const struct i3c_device_info *info) 1575 { 1576 struct i3c_dev_desc *i3cdev; 1577 int ret; 1578 1579 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1580 return -EINVAL; 1581 1582 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1583 master->secondary) 1584 return -EINVAL; 1585 1586 if (master->this) 1587 return -EINVAL; 1588 1589 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1590 if (IS_ERR(i3cdev)) 1591 return PTR_ERR(i3cdev); 1592 1593 master->this = i3cdev; 1594 master->bus.cur_master = master->this; 1595 1596 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1597 if (ret) 1598 goto err_free_dev; 1599 1600 return 0; 1601 1602 err_free_dev: 1603 i3c_master_free_i3c_dev(i3cdev); 1604 1605 return ret; 1606 } 1607 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1608 1609 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1610 { 1611 struct i3c_dev_desc *i3cdev, *i3ctmp; 1612 struct i2c_dev_desc *i2cdev, *i2ctmp; 1613 1614 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1615 common.node) { 1616 i3c_master_detach_i3c_dev(i3cdev); 1617 1618 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1619 i3c_bus_set_addr_slot_status(&master->bus, 1620 i3cdev->boardinfo->init_dyn_addr, 1621 I3C_ADDR_SLOT_FREE); 1622 1623 i3c_master_free_i3c_dev(i3cdev); 1624 } 1625 1626 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1627 common.node) { 1628 i3c_master_detach_i2c_dev(i2cdev); 1629 i3c_bus_set_addr_slot_status(&master->bus, 1630 i2cdev->addr, 1631 I3C_ADDR_SLOT_FREE); 1632 i3c_master_free_i2c_dev(i2cdev); 1633 } 1634 } 1635 1636 /** 1637 * i3c_master_bus_init() - initialize an I3C bus 1638 * @master: main master initializing the bus 1639 * 1640 * This function is following all initialisation steps described in the I3C 1641 * specification: 1642 * 1643 * 1. Attach I2C devs to the master so that the master can fill its internal 1644 * device table appropriately 1645 * 1646 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1647 * the master controller. That's usually where the bus mode is selected 1648 * (pure bus or mixed fast/slow bus) 1649 * 1650 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1651 * particularly important when the bus was previously configured by someone 1652 * else (for example the bootloader) 1653 * 1654 * 4. Disable all slave events. 1655 * 1656 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1657 * also have static_addr, try to pre-assign dynamic addresses requested by 1658 * the FW with SETDASA and attach corresponding statically defined I3C 1659 * devices to the master. 1660 * 1661 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1662 * remaining I3C devices 1663 * 1664 * Once this is done, all I3C and I2C devices should be usable. 1665 * 1666 * Return: a 0 in case of success, an negative error code otherwise. 1667 */ 1668 static int i3c_master_bus_init(struct i3c_master_controller *master) 1669 { 1670 enum i3c_addr_slot_status status; 1671 struct i2c_dev_boardinfo *i2cboardinfo; 1672 struct i3c_dev_boardinfo *i3cboardinfo; 1673 struct i2c_dev_desc *i2cdev; 1674 int ret; 1675 1676 /* 1677 * First attach all devices with static definitions provided by the 1678 * FW. 1679 */ 1680 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1681 status = i3c_bus_get_addr_slot_status(&master->bus, 1682 i2cboardinfo->base.addr); 1683 if (status != I3C_ADDR_SLOT_FREE) { 1684 ret = -EBUSY; 1685 goto err_detach_devs; 1686 } 1687 1688 i3c_bus_set_addr_slot_status(&master->bus, 1689 i2cboardinfo->base.addr, 1690 I3C_ADDR_SLOT_I2C_DEV); 1691 1692 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo); 1693 if (IS_ERR(i2cdev)) { 1694 ret = PTR_ERR(i2cdev); 1695 goto err_detach_devs; 1696 } 1697 1698 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1699 if (ret) { 1700 i3c_master_free_i2c_dev(i2cdev); 1701 goto err_detach_devs; 1702 } 1703 } 1704 1705 /* 1706 * Now execute the controller specific ->bus_init() routine, which 1707 * might configure its internal logic to match the bus limitations. 1708 */ 1709 ret = master->ops->bus_init(master); 1710 if (ret) 1711 goto err_detach_devs; 1712 1713 /* 1714 * The master device should have been instantiated in ->bus_init(), 1715 * complain if this was not the case. 1716 */ 1717 if (!master->this) { 1718 dev_err(&master->dev, 1719 "master_set_info() was not called in ->bus_init()\n"); 1720 ret = -EINVAL; 1721 goto err_bus_cleanup; 1722 } 1723 1724 /* 1725 * Reset all dynamic address that may have been assigned before 1726 * (assigned by the bootloader for example). 1727 */ 1728 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1729 if (ret && ret != I3C_ERROR_M2) 1730 goto err_bus_cleanup; 1731 1732 /* Disable all slave events before starting DAA. */ 1733 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1734 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1735 I3C_CCC_EVENT_HJ); 1736 if (ret && ret != I3C_ERROR_M2) 1737 goto err_bus_cleanup; 1738 1739 /* 1740 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1741 * address and retrieve device information if needed. 1742 * In case pre-assign dynamic address fails, setting dynamic address to 1743 * the requested init_dyn_addr is retried after DAA is done in 1744 * i3c_master_add_i3c_dev_locked(). 1745 */ 1746 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1747 1748 /* 1749 * We don't reserve a dynamic address for devices that 1750 * don't explicitly request one. 1751 */ 1752 if (!i3cboardinfo->init_dyn_addr) 1753 continue; 1754 1755 ret = i3c_bus_get_addr_slot_status(&master->bus, 1756 i3cboardinfo->init_dyn_addr); 1757 if (ret != I3C_ADDR_SLOT_FREE) { 1758 ret = -EBUSY; 1759 goto err_rstdaa; 1760 } 1761 1762 i3c_bus_set_addr_slot_status(&master->bus, 1763 i3cboardinfo->init_dyn_addr, 1764 I3C_ADDR_SLOT_I3C_DEV); 1765 1766 /* 1767 * Only try to create/attach devices that have a static 1768 * address. Other devices will be created/attached when 1769 * DAA happens, and the requested dynamic address will 1770 * be set using SETNEWDA once those devices become 1771 * addressable. 1772 */ 1773 1774 if (i3cboardinfo->static_addr) 1775 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1776 } 1777 1778 ret = i3c_master_do_daa(master); 1779 if (ret) 1780 goto err_rstdaa; 1781 1782 return 0; 1783 1784 err_rstdaa: 1785 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1786 1787 err_bus_cleanup: 1788 if (master->ops->bus_cleanup) 1789 master->ops->bus_cleanup(master); 1790 1791 err_detach_devs: 1792 i3c_master_detach_free_devs(master); 1793 1794 return ret; 1795 } 1796 1797 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1798 { 1799 if (master->ops->bus_cleanup) 1800 master->ops->bus_cleanup(master); 1801 1802 i3c_master_detach_free_devs(master); 1803 } 1804 1805 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1806 { 1807 struct i3c_master_controller *master = i3cdev->common.master; 1808 struct i3c_dev_boardinfo *i3cboardinfo; 1809 1810 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1811 if (i3cdev->info.pid != i3cboardinfo->pid) 1812 continue; 1813 1814 i3cdev->boardinfo = i3cboardinfo; 1815 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1816 return; 1817 } 1818 } 1819 1820 static struct i3c_dev_desc * 1821 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1822 { 1823 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1824 struct i3c_dev_desc *i3cdev; 1825 1826 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1827 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1828 return i3cdev; 1829 } 1830 1831 return NULL; 1832 } 1833 1834 /** 1835 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1836 * @master: master used to send frames on the bus 1837 * @addr: I3C slave dynamic address assigned to the device 1838 * 1839 * This function is instantiating an I3C device object and adding it to the 1840 * I3C device list. All device information are automatically retrieved using 1841 * standard CCC commands. 1842 * 1843 * The I3C device object is returned in case the master wants to attach 1844 * private data to it using i3c_dev_set_master_data(). 1845 * 1846 * This function must be called with the bus lock held in write mode. 1847 * 1848 * Return: a 0 in case of success, an negative error code otherwise. 1849 */ 1850 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1851 u8 addr) 1852 { 1853 struct i3c_device_info info = { .dyn_addr = addr }; 1854 struct i3c_dev_desc *newdev, *olddev; 1855 u8 old_dyn_addr = addr, expected_dyn_addr; 1856 struct i3c_ibi_setup ibireq = { }; 1857 bool enable_ibi = false; 1858 int ret; 1859 1860 if (!master) 1861 return -EINVAL; 1862 1863 newdev = i3c_master_alloc_i3c_dev(master, &info); 1864 if (IS_ERR(newdev)) 1865 return PTR_ERR(newdev); 1866 1867 ret = i3c_master_attach_i3c_dev(master, newdev); 1868 if (ret) 1869 goto err_free_dev; 1870 1871 ret = i3c_master_retrieve_dev_info(newdev); 1872 if (ret) 1873 goto err_detach_dev; 1874 1875 i3c_master_attach_boardinfo(newdev); 1876 1877 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 1878 if (olddev) { 1879 newdev->dev = olddev->dev; 1880 if (newdev->dev) 1881 newdev->dev->desc = newdev; 1882 1883 /* 1884 * We need to restore the IBI state too, so let's save the 1885 * IBI information and try to restore them after olddev has 1886 * been detached+released and its IBI has been stopped and 1887 * the associated resources have been freed. 1888 */ 1889 mutex_lock(&olddev->ibi_lock); 1890 if (olddev->ibi) { 1891 ibireq.handler = olddev->ibi->handler; 1892 ibireq.max_payload_len = olddev->ibi->max_payload_len; 1893 ibireq.num_slots = olddev->ibi->num_slots; 1894 1895 if (olddev->ibi->enabled) { 1896 enable_ibi = true; 1897 i3c_dev_disable_ibi_locked(olddev); 1898 } 1899 1900 i3c_dev_free_ibi_locked(olddev); 1901 } 1902 mutex_unlock(&olddev->ibi_lock); 1903 1904 old_dyn_addr = olddev->info.dyn_addr; 1905 1906 i3c_master_detach_i3c_dev(olddev); 1907 i3c_master_free_i3c_dev(olddev); 1908 } 1909 1910 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1911 if (ret) 1912 goto err_detach_dev; 1913 1914 /* 1915 * Depending on our previous state, the expected dynamic address might 1916 * differ: 1917 * - if the device already had a dynamic address assigned, let's try to 1918 * re-apply this one 1919 * - if the device did not have a dynamic address and the firmware 1920 * requested a specific address, pick this one 1921 * - in any other case, keep the address automatically assigned by the 1922 * master 1923 */ 1924 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 1925 expected_dyn_addr = old_dyn_addr; 1926 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 1927 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 1928 else 1929 expected_dyn_addr = newdev->info.dyn_addr; 1930 1931 if (newdev->info.dyn_addr != expected_dyn_addr) { 1932 /* 1933 * Try to apply the expected dynamic address. If it fails, keep 1934 * the address assigned by the master. 1935 */ 1936 ret = i3c_master_setnewda_locked(master, 1937 newdev->info.dyn_addr, 1938 expected_dyn_addr); 1939 if (!ret) { 1940 old_dyn_addr = newdev->info.dyn_addr; 1941 newdev->info.dyn_addr = expected_dyn_addr; 1942 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1943 } else { 1944 dev_err(&master->dev, 1945 "Failed to assign reserved/old address to device %d%llx", 1946 master->bus.id, newdev->info.pid); 1947 } 1948 } 1949 1950 /* 1951 * Now is time to try to restore the IBI setup. If we're lucky, 1952 * everything works as before, otherwise, all we can do is complain. 1953 * FIXME: maybe we should add callback to inform the driver that it 1954 * should request the IBI again instead of trying to hide that from 1955 * him. 1956 */ 1957 if (ibireq.handler) { 1958 mutex_lock(&newdev->ibi_lock); 1959 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 1960 if (ret) { 1961 dev_err(&master->dev, 1962 "Failed to request IBI on device %d-%llx", 1963 master->bus.id, newdev->info.pid); 1964 } else if (enable_ibi) { 1965 ret = i3c_dev_enable_ibi_locked(newdev); 1966 if (ret) 1967 dev_err(&master->dev, 1968 "Failed to re-enable IBI on device %d-%llx", 1969 master->bus.id, newdev->info.pid); 1970 } 1971 mutex_unlock(&newdev->ibi_lock); 1972 } 1973 1974 return 0; 1975 1976 err_detach_dev: 1977 if (newdev->dev && newdev->dev->desc) 1978 newdev->dev->desc = NULL; 1979 1980 i3c_master_detach_i3c_dev(newdev); 1981 1982 err_free_dev: 1983 i3c_master_free_i3c_dev(newdev); 1984 1985 return ret; 1986 } 1987 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 1988 1989 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 1990 1991 static int 1992 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 1993 struct device_node *node, u32 *reg) 1994 { 1995 struct i2c_dev_boardinfo *boardinfo; 1996 struct device *dev = &master->dev; 1997 int ret; 1998 1999 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2000 if (!boardinfo) 2001 return -ENOMEM; 2002 2003 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2004 if (ret) 2005 return ret; 2006 2007 /* 2008 * The I3C Specification does not clearly say I2C devices with 10-bit 2009 * address are supported. These devices can't be passed properly through 2010 * DEFSLVS command. 2011 */ 2012 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2013 dev_err(dev, "I2C device with 10 bit address not supported."); 2014 return -ENOTSUPP; 2015 } 2016 2017 /* LVR is encoded in reg[2]. */ 2018 boardinfo->lvr = reg[2]; 2019 2020 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2021 of_node_get(node); 2022 2023 return 0; 2024 } 2025 2026 static int 2027 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2028 struct device_node *node, u32 *reg) 2029 { 2030 struct i3c_dev_boardinfo *boardinfo; 2031 struct device *dev = &master->dev; 2032 enum i3c_addr_slot_status addrstatus; 2033 u32 init_dyn_addr = 0; 2034 2035 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2036 if (!boardinfo) 2037 return -ENOMEM; 2038 2039 if (reg[0]) { 2040 if (reg[0] > I3C_MAX_ADDR) 2041 return -EINVAL; 2042 2043 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2044 reg[0]); 2045 if (addrstatus != I3C_ADDR_SLOT_FREE) 2046 return -EINVAL; 2047 } 2048 2049 boardinfo->static_addr = reg[0]; 2050 2051 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2052 if (init_dyn_addr > I3C_MAX_ADDR) 2053 return -EINVAL; 2054 2055 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2056 init_dyn_addr); 2057 if (addrstatus != I3C_ADDR_SLOT_FREE) 2058 return -EINVAL; 2059 } 2060 2061 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2062 2063 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2064 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2065 return -EINVAL; 2066 2067 boardinfo->init_dyn_addr = init_dyn_addr; 2068 boardinfo->of_node = of_node_get(node); 2069 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2070 2071 return 0; 2072 } 2073 2074 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2075 struct device_node *node) 2076 { 2077 u32 reg[3]; 2078 int ret; 2079 2080 if (!master || !node) 2081 return -EINVAL; 2082 2083 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2084 if (ret) 2085 return ret; 2086 2087 /* 2088 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2089 * dealing with an I2C device. 2090 */ 2091 if (!reg[1]) 2092 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2093 else 2094 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2095 2096 return ret; 2097 } 2098 2099 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2100 { 2101 struct device *dev = &master->dev; 2102 struct device_node *i3cbus_np = dev->of_node; 2103 struct device_node *node; 2104 int ret; 2105 u32 val; 2106 2107 if (!i3cbus_np) 2108 return 0; 2109 2110 for_each_available_child_of_node(i3cbus_np, node) { 2111 ret = of_i3c_master_add_dev(master, node); 2112 if (ret) { 2113 of_node_put(node); 2114 return ret; 2115 } 2116 } 2117 2118 /* 2119 * The user might want to limit I2C and I3C speed in case some devices 2120 * on the bus are not supporting typical rates, or if the bus topology 2121 * prevents it from using max possible rate. 2122 */ 2123 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2124 master->bus.scl_rate.i2c = val; 2125 2126 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2127 master->bus.scl_rate.i3c = val; 2128 2129 return 0; 2130 } 2131 2132 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2133 struct i2c_msg *xfers, int nxfers) 2134 { 2135 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2136 struct i2c_dev_desc *dev; 2137 int i, ret; 2138 u16 addr; 2139 2140 if (!xfers || !master || nxfers <= 0) 2141 return -EINVAL; 2142 2143 if (!master->ops->i2c_xfers) 2144 return -ENOTSUPP; 2145 2146 /* Doing transfers to different devices is not supported. */ 2147 addr = xfers[0].addr; 2148 for (i = 1; i < nxfers; i++) { 2149 if (addr != xfers[i].addr) 2150 return -ENOTSUPP; 2151 } 2152 2153 i3c_bus_normaluse_lock(&master->bus); 2154 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2155 if (!dev) 2156 ret = -ENOENT; 2157 else 2158 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2159 i3c_bus_normaluse_unlock(&master->bus); 2160 2161 return ret ? ret : nxfers; 2162 } 2163 2164 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2165 { 2166 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2167 } 2168 2169 static const struct i2c_algorithm i3c_master_i2c_algo = { 2170 .master_xfer = i3c_master_i2c_adapter_xfer, 2171 .functionality = i3c_master_i2c_funcs, 2172 }; 2173 2174 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2175 { 2176 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2177 struct i2c_dev_desc *i2cdev; 2178 int ret; 2179 2180 adap->dev.parent = master->dev.parent; 2181 adap->owner = master->dev.parent->driver->owner; 2182 adap->algo = &i3c_master_i2c_algo; 2183 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2184 2185 /* FIXME: Should we allow i3c masters to override these values? */ 2186 adap->timeout = 1000; 2187 adap->retries = 3; 2188 2189 ret = i2c_add_adapter(adap); 2190 if (ret) 2191 return ret; 2192 2193 /* 2194 * We silently ignore failures here. The bus should keep working 2195 * correctly even if one or more i2c devices are not registered. 2196 */ 2197 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2198 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base); 2199 2200 return 0; 2201 } 2202 2203 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2204 { 2205 struct i2c_dev_desc *i2cdev; 2206 2207 i2c_del_adapter(&master->i2c); 2208 2209 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2210 i2cdev->dev = NULL; 2211 } 2212 2213 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2214 { 2215 struct i3c_dev_desc *i3cdev; 2216 2217 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2218 if (!i3cdev->dev) 2219 continue; 2220 2221 i3cdev->dev->desc = NULL; 2222 if (device_is_registered(&i3cdev->dev->dev)) 2223 device_unregister(&i3cdev->dev->dev); 2224 else 2225 put_device(&i3cdev->dev->dev); 2226 i3cdev->dev = NULL; 2227 } 2228 } 2229 2230 /** 2231 * i3c_master_queue_ibi() - Queue an IBI 2232 * @dev: the device this IBI is coming from 2233 * @slot: the IBI slot used to store the payload 2234 * 2235 * Queue an IBI to the controller workqueue. The IBI handler attached to 2236 * the dev will be called from a workqueue context. 2237 */ 2238 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2239 { 2240 atomic_inc(&dev->ibi->pending_ibis); 2241 queue_work(dev->common.master->wq, &slot->work); 2242 } 2243 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2244 2245 static void i3c_master_handle_ibi(struct work_struct *work) 2246 { 2247 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2248 work); 2249 struct i3c_dev_desc *dev = slot->dev; 2250 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2251 struct i3c_ibi_payload payload; 2252 2253 payload.data = slot->data; 2254 payload.len = slot->len; 2255 2256 if (dev->dev) 2257 dev->ibi->handler(dev->dev, &payload); 2258 2259 master->ops->recycle_ibi_slot(dev, slot); 2260 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2261 complete(&dev->ibi->all_ibis_handled); 2262 } 2263 2264 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2265 struct i3c_ibi_slot *slot) 2266 { 2267 slot->dev = dev; 2268 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2269 } 2270 2271 struct i3c_generic_ibi_slot { 2272 struct list_head node; 2273 struct i3c_ibi_slot base; 2274 }; 2275 2276 struct i3c_generic_ibi_pool { 2277 spinlock_t lock; 2278 unsigned int num_slots; 2279 struct i3c_generic_ibi_slot *slots; 2280 void *payload_buf; 2281 struct list_head free_slots; 2282 struct list_head pending; 2283 }; 2284 2285 /** 2286 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2287 * @pool: the IBI pool to free 2288 * 2289 * Free all IBI slots allated by a generic IBI pool. 2290 */ 2291 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2292 { 2293 struct i3c_generic_ibi_slot *slot; 2294 unsigned int nslots = 0; 2295 2296 while (!list_empty(&pool->free_slots)) { 2297 slot = list_first_entry(&pool->free_slots, 2298 struct i3c_generic_ibi_slot, node); 2299 list_del(&slot->node); 2300 nslots++; 2301 } 2302 2303 /* 2304 * If the number of freed slots is not equal to the number of allocated 2305 * slots we have a leak somewhere. 2306 */ 2307 WARN_ON(nslots != pool->num_slots); 2308 2309 kfree(pool->payload_buf); 2310 kfree(pool->slots); 2311 kfree(pool); 2312 } 2313 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2314 2315 /** 2316 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2317 * @dev: the device this pool will be used for 2318 * @req: IBI setup request describing what the device driver expects 2319 * 2320 * Create a generic IBI pool based on the information provided in @req. 2321 * 2322 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2323 */ 2324 struct i3c_generic_ibi_pool * 2325 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2326 const struct i3c_ibi_setup *req) 2327 { 2328 struct i3c_generic_ibi_pool *pool; 2329 struct i3c_generic_ibi_slot *slot; 2330 unsigned int i; 2331 int ret; 2332 2333 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2334 if (!pool) 2335 return ERR_PTR(-ENOMEM); 2336 2337 spin_lock_init(&pool->lock); 2338 INIT_LIST_HEAD(&pool->free_slots); 2339 INIT_LIST_HEAD(&pool->pending); 2340 2341 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2342 if (!pool->slots) { 2343 ret = -ENOMEM; 2344 goto err_free_pool; 2345 } 2346 2347 if (req->max_payload_len) { 2348 pool->payload_buf = kcalloc(req->num_slots, 2349 req->max_payload_len, GFP_KERNEL); 2350 if (!pool->payload_buf) { 2351 ret = -ENOMEM; 2352 goto err_free_pool; 2353 } 2354 } 2355 2356 for (i = 0; i < req->num_slots; i++) { 2357 slot = &pool->slots[i]; 2358 i3c_master_init_ibi_slot(dev, &slot->base); 2359 2360 if (req->max_payload_len) 2361 slot->base.data = pool->payload_buf + 2362 (i * req->max_payload_len); 2363 2364 list_add_tail(&slot->node, &pool->free_slots); 2365 pool->num_slots++; 2366 } 2367 2368 return pool; 2369 2370 err_free_pool: 2371 i3c_generic_ibi_free_pool(pool); 2372 return ERR_PTR(ret); 2373 } 2374 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2375 2376 /** 2377 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2378 * @pool: the pool to query an IBI slot on 2379 * 2380 * Search for a free slot in a generic IBI pool. 2381 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2382 * when it's no longer needed. 2383 * 2384 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2385 */ 2386 struct i3c_ibi_slot * 2387 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2388 { 2389 struct i3c_generic_ibi_slot *slot; 2390 unsigned long flags; 2391 2392 spin_lock_irqsave(&pool->lock, flags); 2393 slot = list_first_entry_or_null(&pool->free_slots, 2394 struct i3c_generic_ibi_slot, node); 2395 if (slot) 2396 list_del(&slot->node); 2397 spin_unlock_irqrestore(&pool->lock, flags); 2398 2399 return slot ? &slot->base : NULL; 2400 } 2401 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2402 2403 /** 2404 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2405 * @pool: the pool to return the IBI slot to 2406 * @s: IBI slot to recycle 2407 * 2408 * Add an IBI slot back to its generic IBI pool. Should be called from the 2409 * master driver struct_master_controller_ops->recycle_ibi() method. 2410 */ 2411 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2412 struct i3c_ibi_slot *s) 2413 { 2414 struct i3c_generic_ibi_slot *slot; 2415 unsigned long flags; 2416 2417 if (!s) 2418 return; 2419 2420 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2421 spin_lock_irqsave(&pool->lock, flags); 2422 list_add_tail(&slot->node, &pool->free_slots); 2423 spin_unlock_irqrestore(&pool->lock, flags); 2424 } 2425 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2426 2427 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2428 { 2429 if (!ops || !ops->bus_init || !ops->priv_xfers || 2430 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2431 return -EINVAL; 2432 2433 if (ops->request_ibi && 2434 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2435 !ops->recycle_ibi_slot)) 2436 return -EINVAL; 2437 2438 return 0; 2439 } 2440 2441 /** 2442 * i3c_master_register() - register an I3C master 2443 * @master: master used to send frames on the bus 2444 * @parent: the parent device (the one that provides this I3C master 2445 * controller) 2446 * @ops: the master controller operations 2447 * @secondary: true if you are registering a secondary master. Will return 2448 * -ENOTSUPP if set to true since secondary masters are not yet 2449 * supported 2450 * 2451 * This function takes care of everything for you: 2452 * 2453 * - creates and initializes the I3C bus 2454 * - populates the bus with static I2C devs if @parent->of_node is not 2455 * NULL 2456 * - registers all I3C devices added by the controller during bus 2457 * initialization 2458 * - registers the I2C adapter and all I2C devices 2459 * 2460 * Return: 0 in case of success, a negative error code otherwise. 2461 */ 2462 int i3c_master_register(struct i3c_master_controller *master, 2463 struct device *parent, 2464 const struct i3c_master_controller_ops *ops, 2465 bool secondary) 2466 { 2467 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2468 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2469 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2470 struct i2c_dev_boardinfo *i2cbi; 2471 int ret; 2472 2473 /* We do not support secondary masters yet. */ 2474 if (secondary) 2475 return -ENOTSUPP; 2476 2477 ret = i3c_master_check_ops(ops); 2478 if (ret) 2479 return ret; 2480 2481 master->dev.parent = parent; 2482 master->dev.of_node = of_node_get(parent->of_node); 2483 master->dev.bus = &i3c_bus_type; 2484 master->dev.type = &i3c_masterdev_type; 2485 master->dev.release = i3c_masterdev_release; 2486 master->ops = ops; 2487 master->secondary = secondary; 2488 INIT_LIST_HEAD(&master->boardinfo.i2c); 2489 INIT_LIST_HEAD(&master->boardinfo.i3c); 2490 2491 ret = i3c_bus_init(i3cbus); 2492 if (ret) 2493 return ret; 2494 2495 device_initialize(&master->dev); 2496 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2497 2498 ret = of_populate_i3c_bus(master); 2499 if (ret) 2500 goto err_put_dev; 2501 2502 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2503 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2504 case I3C_LVR_I2C_INDEX(0): 2505 if (mode < I3C_BUS_MODE_MIXED_FAST) 2506 mode = I3C_BUS_MODE_MIXED_FAST; 2507 break; 2508 case I3C_LVR_I2C_INDEX(1): 2509 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2510 mode = I3C_BUS_MODE_MIXED_LIMITED; 2511 break; 2512 case I3C_LVR_I2C_INDEX(2): 2513 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2514 mode = I3C_BUS_MODE_MIXED_SLOW; 2515 break; 2516 default: 2517 ret = -EINVAL; 2518 goto err_put_dev; 2519 } 2520 2521 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2522 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2523 } 2524 2525 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2526 if (ret) 2527 goto err_put_dev; 2528 2529 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2530 if (!master->wq) { 2531 ret = -ENOMEM; 2532 goto err_put_dev; 2533 } 2534 2535 ret = i3c_master_bus_init(master); 2536 if (ret) 2537 goto err_put_dev; 2538 2539 ret = device_add(&master->dev); 2540 if (ret) 2541 goto err_cleanup_bus; 2542 2543 /* 2544 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2545 * through the I2C subsystem. 2546 */ 2547 ret = i3c_master_i2c_adapter_init(master); 2548 if (ret) 2549 goto err_del_dev; 2550 2551 /* 2552 * We're done initializing the bus and the controller, we can now 2553 * register I3C devices discovered during the initial DAA. 2554 */ 2555 master->init_done = true; 2556 i3c_bus_normaluse_lock(&master->bus); 2557 i3c_master_register_new_i3c_devs(master); 2558 i3c_bus_normaluse_unlock(&master->bus); 2559 2560 return 0; 2561 2562 err_del_dev: 2563 device_del(&master->dev); 2564 2565 err_cleanup_bus: 2566 i3c_master_bus_cleanup(master); 2567 2568 err_put_dev: 2569 put_device(&master->dev); 2570 2571 return ret; 2572 } 2573 EXPORT_SYMBOL_GPL(i3c_master_register); 2574 2575 /** 2576 * i3c_master_unregister() - unregister an I3C master 2577 * @master: master used to send frames on the bus 2578 * 2579 * Basically undo everything done in i3c_master_register(). 2580 * 2581 * Return: 0 in case of success, a negative error code otherwise. 2582 */ 2583 int i3c_master_unregister(struct i3c_master_controller *master) 2584 { 2585 i3c_master_i2c_adapter_cleanup(master); 2586 i3c_master_unregister_i3c_devs(master); 2587 i3c_master_bus_cleanup(master); 2588 device_unregister(&master->dev); 2589 2590 return 0; 2591 } 2592 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2593 2594 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2595 struct i3c_priv_xfer *xfers, 2596 int nxfers) 2597 { 2598 struct i3c_master_controller *master; 2599 2600 if (!dev) 2601 return -ENOENT; 2602 2603 master = i3c_dev_get_master(dev); 2604 if (!master || !xfers) 2605 return -EINVAL; 2606 2607 if (!master->ops->priv_xfers) 2608 return -ENOTSUPP; 2609 2610 return master->ops->priv_xfers(dev, xfers, nxfers); 2611 } 2612 2613 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2614 { 2615 struct i3c_master_controller *master; 2616 int ret; 2617 2618 if (!dev->ibi) 2619 return -EINVAL; 2620 2621 master = i3c_dev_get_master(dev); 2622 ret = master->ops->disable_ibi(dev); 2623 if (ret) 2624 return ret; 2625 2626 reinit_completion(&dev->ibi->all_ibis_handled); 2627 if (atomic_read(&dev->ibi->pending_ibis)) 2628 wait_for_completion(&dev->ibi->all_ibis_handled); 2629 2630 dev->ibi->enabled = false; 2631 2632 return 0; 2633 } 2634 2635 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2636 { 2637 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2638 int ret; 2639 2640 if (!dev->ibi) 2641 return -EINVAL; 2642 2643 ret = master->ops->enable_ibi(dev); 2644 if (!ret) 2645 dev->ibi->enabled = true; 2646 2647 return ret; 2648 } 2649 2650 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2651 const struct i3c_ibi_setup *req) 2652 { 2653 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2654 struct i3c_device_ibi_info *ibi; 2655 int ret; 2656 2657 if (!master->ops->request_ibi) 2658 return -ENOTSUPP; 2659 2660 if (dev->ibi) 2661 return -EBUSY; 2662 2663 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2664 if (!ibi) 2665 return -ENOMEM; 2666 2667 atomic_set(&ibi->pending_ibis, 0); 2668 init_completion(&ibi->all_ibis_handled); 2669 ibi->handler = req->handler; 2670 ibi->max_payload_len = req->max_payload_len; 2671 ibi->num_slots = req->num_slots; 2672 2673 dev->ibi = ibi; 2674 ret = master->ops->request_ibi(dev, req); 2675 if (ret) { 2676 kfree(ibi); 2677 dev->ibi = NULL; 2678 } 2679 2680 return ret; 2681 } 2682 2683 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2684 { 2685 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2686 2687 if (!dev->ibi) 2688 return; 2689 2690 if (WARN_ON(dev->ibi->enabled)) 2691 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2692 2693 master->ops->free_ibi(dev); 2694 kfree(dev->ibi); 2695 dev->ibi = NULL; 2696 } 2697 2698 static int __init i3c_init(void) 2699 { 2700 return bus_register(&i3c_bus_type); 2701 } 2702 subsys_initcall(i3c_init); 2703 2704 static void __exit i3c_exit(void) 2705 { 2706 idr_destroy(&i3c_bus_idr); 2707 bus_unregister(&i3c_bus_type); 2708 } 2709 module_exit(i3c_exit); 2710 2711 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 2712 MODULE_DESCRIPTION("I3C core"); 2713 MODULE_LICENSE("GPL v2"); 2714