1 /* 2 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> 3 4 National Semiconductor SCx200 ACCESS.bus support 5 Also supports the AMD CS5535 and AMD CS5536 6 7 Based on i2c-keywest.c which is: 8 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org> 9 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> 10 11 This program is free software; you can redistribute it and/or 12 modify it under the terms of the GNU General Public License as 13 published by the Free Software Foundation; either version 2 of the 14 License, or (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/errno.h> 28 #include <linux/kernel.h> 29 #include <linux/init.h> 30 #include <linux/i2c.h> 31 #include <linux/pci.h> 32 #include <linux/delay.h> 33 #include <linux/mutex.h> 34 #include <asm/io.h> 35 36 #include <linux/scx200.h> 37 38 #define NAME "scx200_acb" 39 40 MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); 41 MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); 42 MODULE_LICENSE("GPL"); 43 44 #define MAX_DEVICES 4 45 static int base[MAX_DEVICES] = { 0x820, 0x840 }; 46 module_param_array(base, int, NULL, 0); 47 MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers"); 48 49 #define POLL_TIMEOUT (HZ/5) 50 51 enum scx200_acb_state { 52 state_idle, 53 state_address, 54 state_command, 55 state_repeat_start, 56 state_quick, 57 state_read, 58 state_write, 59 }; 60 61 static const char *scx200_acb_state_name[] = { 62 "idle", 63 "address", 64 "command", 65 "repeat_start", 66 "quick", 67 "read", 68 "write", 69 }; 70 71 /* Physical interface */ 72 struct scx200_acb_iface { 73 struct scx200_acb_iface *next; 74 struct i2c_adapter adapter; 75 unsigned base; 76 struct mutex mutex; 77 78 /* State machine data */ 79 enum scx200_acb_state state; 80 int result; 81 u8 address_byte; 82 u8 command; 83 u8 *ptr; 84 char needs_reset; 85 unsigned len; 86 87 /* PCI device info */ 88 struct pci_dev *pdev; 89 int bar; 90 }; 91 92 /* Register Definitions */ 93 #define ACBSDA (iface->base + 0) 94 #define ACBST (iface->base + 1) 95 #define ACBST_SDAST 0x40 /* SDA Status */ 96 #define ACBST_BER 0x20 97 #define ACBST_NEGACK 0x10 /* Negative Acknowledge */ 98 #define ACBST_STASTR 0x08 /* Stall After Start */ 99 #define ACBST_MASTER 0x02 100 #define ACBCST (iface->base + 2) 101 #define ACBCST_BB 0x02 102 #define ACBCTL1 (iface->base + 3) 103 #define ACBCTL1_STASTRE 0x80 104 #define ACBCTL1_NMINTE 0x40 105 #define ACBCTL1_ACK 0x10 106 #define ACBCTL1_STOP 0x02 107 #define ACBCTL1_START 0x01 108 #define ACBADDR (iface->base + 4) 109 #define ACBCTL2 (iface->base + 5) 110 #define ACBCTL2_ENABLE 0x01 111 112 /************************************************************************/ 113 114 static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status) 115 { 116 const char *errmsg; 117 118 dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n", 119 scx200_acb_state_name[iface->state], status); 120 121 if (status & ACBST_BER) { 122 errmsg = "bus error"; 123 goto error; 124 } 125 if (!(status & ACBST_MASTER)) { 126 errmsg = "not master"; 127 goto error; 128 } 129 if (status & ACBST_NEGACK) { 130 dev_dbg(&iface->adapter.dev, "negative ack in state %s\n", 131 scx200_acb_state_name[iface->state]); 132 133 iface->state = state_idle; 134 iface->result = -ENXIO; 135 136 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 137 outb(ACBST_STASTR | ACBST_NEGACK, ACBST); 138 139 /* Reset the status register */ 140 outb(0, ACBST); 141 return; 142 } 143 144 switch (iface->state) { 145 case state_idle: 146 dev_warn(&iface->adapter.dev, "interrupt in idle state\n"); 147 break; 148 149 case state_address: 150 /* Do a pointer write first */ 151 outb(iface->address_byte & ~1, ACBSDA); 152 153 iface->state = state_command; 154 break; 155 156 case state_command: 157 outb(iface->command, ACBSDA); 158 159 if (iface->address_byte & 1) 160 iface->state = state_repeat_start; 161 else 162 iface->state = state_write; 163 break; 164 165 case state_repeat_start: 166 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); 167 /* fallthrough */ 168 169 case state_quick: 170 if (iface->address_byte & 1) { 171 if (iface->len == 1) 172 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); 173 else 174 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); 175 outb(iface->address_byte, ACBSDA); 176 177 iface->state = state_read; 178 } else { 179 outb(iface->address_byte, ACBSDA); 180 181 iface->state = state_write; 182 } 183 break; 184 185 case state_read: 186 /* Set ACK if _next_ byte will be the last one */ 187 if (iface->len == 2) 188 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); 189 else 190 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); 191 192 if (iface->len == 1) { 193 iface->result = 0; 194 iface->state = state_idle; 195 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 196 } 197 198 *iface->ptr++ = inb(ACBSDA); 199 --iface->len; 200 201 break; 202 203 case state_write: 204 if (iface->len == 0) { 205 iface->result = 0; 206 iface->state = state_idle; 207 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 208 break; 209 } 210 211 outb(*iface->ptr++, ACBSDA); 212 --iface->len; 213 214 break; 215 } 216 217 return; 218 219 error: 220 dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg, 221 scx200_acb_state_name[iface->state]); 222 223 iface->state = state_idle; 224 iface->result = -EIO; 225 iface->needs_reset = 1; 226 } 227 228 static void scx200_acb_poll(struct scx200_acb_iface *iface) 229 { 230 u8 status; 231 unsigned long timeout; 232 233 timeout = jiffies + POLL_TIMEOUT; 234 while (1) { 235 status = inb(ACBST); 236 237 /* Reset the status register to avoid the hang */ 238 outb(0, ACBST); 239 240 if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) { 241 scx200_acb_machine(iface, status); 242 return; 243 } 244 if (time_after(jiffies, timeout)) 245 break; 246 cpu_relax(); 247 cond_resched(); 248 } 249 250 dev_err(&iface->adapter.dev, "timeout in state %s\n", 251 scx200_acb_state_name[iface->state]); 252 253 iface->state = state_idle; 254 iface->result = -EIO; 255 iface->needs_reset = 1; 256 } 257 258 static void scx200_acb_reset(struct scx200_acb_iface *iface) 259 { 260 /* Disable the ACCESS.bus device and Configure the SCL 261 frequency: 16 clock cycles */ 262 outb(0x70, ACBCTL2); 263 /* Polling mode */ 264 outb(0, ACBCTL1); 265 /* Disable slave address */ 266 outb(0, ACBADDR); 267 /* Enable the ACCESS.bus device */ 268 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); 269 /* Free STALL after START */ 270 outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1); 271 /* Send a STOP */ 272 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 273 /* Clear BER, NEGACK and STASTR bits */ 274 outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST); 275 /* Clear BB bit */ 276 outb(inb(ACBCST) | ACBCST_BB, ACBCST); 277 } 278 279 static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter, 280 u16 address, unsigned short flags, 281 char rw, u8 command, int size, 282 union i2c_smbus_data *data) 283 { 284 struct scx200_acb_iface *iface = i2c_get_adapdata(adapter); 285 int len; 286 u8 *buffer; 287 u16 cur_word; 288 int rc; 289 290 switch (size) { 291 case I2C_SMBUS_QUICK: 292 len = 0; 293 buffer = NULL; 294 break; 295 296 case I2C_SMBUS_BYTE: 297 len = 1; 298 buffer = rw ? &data->byte : &command; 299 break; 300 301 case I2C_SMBUS_BYTE_DATA: 302 len = 1; 303 buffer = &data->byte; 304 break; 305 306 case I2C_SMBUS_WORD_DATA: 307 len = 2; 308 cur_word = cpu_to_le16(data->word); 309 buffer = (u8 *)&cur_word; 310 break; 311 312 case I2C_SMBUS_I2C_BLOCK_DATA: 313 len = data->block[0]; 314 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) 315 return -EINVAL; 316 buffer = &data->block[1]; 317 break; 318 319 default: 320 return -EINVAL; 321 } 322 323 dev_dbg(&adapter->dev, 324 "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n", 325 size, address, command, len, rw); 326 327 if (!len && rw == I2C_SMBUS_READ) { 328 dev_dbg(&adapter->dev, "zero length read\n"); 329 return -EINVAL; 330 } 331 332 mutex_lock(&iface->mutex); 333 334 iface->address_byte = (address << 1) | rw; 335 iface->command = command; 336 iface->ptr = buffer; 337 iface->len = len; 338 iface->result = -EINVAL; 339 iface->needs_reset = 0; 340 341 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); 342 343 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) 344 iface->state = state_quick; 345 else 346 iface->state = state_address; 347 348 while (iface->state != state_idle) 349 scx200_acb_poll(iface); 350 351 if (iface->needs_reset) 352 scx200_acb_reset(iface); 353 354 rc = iface->result; 355 356 mutex_unlock(&iface->mutex); 357 358 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ) 359 data->word = le16_to_cpu(cur_word); 360 361 #ifdef DEBUG 362 dev_dbg(&adapter->dev, "transfer done, result: %d", rc); 363 if (buffer) { 364 int i; 365 printk(" data:"); 366 for (i = 0; i < len; ++i) 367 printk(" %02x", buffer[i]); 368 } 369 printk("\n"); 370 #endif 371 372 return rc; 373 } 374 375 static u32 scx200_acb_func(struct i2c_adapter *adapter) 376 { 377 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 378 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 379 I2C_FUNC_SMBUS_I2C_BLOCK; 380 } 381 382 /* For now, we only handle combined mode (smbus) */ 383 static const struct i2c_algorithm scx200_acb_algorithm = { 384 .smbus_xfer = scx200_acb_smbus_xfer, 385 .functionality = scx200_acb_func, 386 }; 387 388 static struct scx200_acb_iface *scx200_acb_list; 389 static DEFINE_MUTEX(scx200_acb_list_mutex); 390 391 static __init int scx200_acb_probe(struct scx200_acb_iface *iface) 392 { 393 u8 val; 394 395 /* Disable the ACCESS.bus device and Configure the SCL 396 frequency: 16 clock cycles */ 397 outb(0x70, ACBCTL2); 398 399 if (inb(ACBCTL2) != 0x70) { 400 pr_debug(NAME ": ACBCTL2 readback failed\n"); 401 return -ENXIO; 402 } 403 404 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); 405 406 val = inb(ACBCTL1); 407 if (val) { 408 pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n", 409 val); 410 return -ENXIO; 411 } 412 413 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); 414 415 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); 416 417 val = inb(ACBCTL1); 418 if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) { 419 pr_debug(NAME ": enabled, but NMINTE won't be set, " 420 "ACBCTL1=0x%02x\n", val); 421 return -ENXIO; 422 } 423 424 return 0; 425 } 426 427 static __init struct scx200_acb_iface *scx200_create_iface(const char *text, 428 struct device *dev, int index) 429 { 430 struct scx200_acb_iface *iface; 431 struct i2c_adapter *adapter; 432 433 iface = kzalloc(sizeof(*iface), GFP_KERNEL); 434 if (!iface) { 435 printk(KERN_ERR NAME ": can't allocate memory\n"); 436 return NULL; 437 } 438 439 adapter = &iface->adapter; 440 i2c_set_adapdata(adapter, iface); 441 snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index); 442 adapter->owner = THIS_MODULE; 443 adapter->algo = &scx200_acb_algorithm; 444 adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 445 adapter->dev.parent = dev; 446 447 mutex_init(&iface->mutex); 448 449 return iface; 450 } 451 452 static int __init scx200_acb_create(struct scx200_acb_iface *iface) 453 { 454 struct i2c_adapter *adapter; 455 int rc; 456 457 adapter = &iface->adapter; 458 459 rc = scx200_acb_probe(iface); 460 if (rc) { 461 printk(KERN_WARNING NAME ": probe failed\n"); 462 return rc; 463 } 464 465 scx200_acb_reset(iface); 466 467 if (i2c_add_adapter(adapter) < 0) { 468 printk(KERN_ERR NAME ": failed to register\n"); 469 return -ENODEV; 470 } 471 472 mutex_lock(&scx200_acb_list_mutex); 473 iface->next = scx200_acb_list; 474 scx200_acb_list = iface; 475 mutex_unlock(&scx200_acb_list_mutex); 476 477 return 0; 478 } 479 480 static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, 481 int bar) 482 { 483 struct scx200_acb_iface *iface; 484 int rc; 485 486 iface = scx200_create_iface(text, &pdev->dev, 0); 487 488 if (iface == NULL) 489 return -ENOMEM; 490 491 iface->pdev = pdev; 492 iface->bar = bar; 493 494 rc = pci_enable_device_io(iface->pdev); 495 if (rc) 496 goto errout_free; 497 498 rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name); 499 if (rc) { 500 printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n", 501 iface->bar); 502 goto errout_free; 503 } 504 505 iface->base = pci_resource_start(iface->pdev, iface->bar); 506 rc = scx200_acb_create(iface); 507 508 if (rc == 0) 509 return 0; 510 511 pci_release_region(iface->pdev, iface->bar); 512 pci_dev_put(iface->pdev); 513 errout_free: 514 kfree(iface); 515 return rc; 516 } 517 518 static int __init scx200_create_isa(const char *text, unsigned long base, 519 int index) 520 { 521 struct scx200_acb_iface *iface; 522 int rc; 523 524 iface = scx200_create_iface(text, NULL, index); 525 526 if (iface == NULL) 527 return -ENOMEM; 528 529 if (!request_region(base, 8, iface->adapter.name)) { 530 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n", 531 base, base + 8 - 1); 532 rc = -EBUSY; 533 goto errout_free; 534 } 535 536 iface->base = base; 537 rc = scx200_acb_create(iface); 538 539 if (rc == 0) 540 return 0; 541 542 release_region(base, 8); 543 errout_free: 544 kfree(iface); 545 return rc; 546 } 547 548 /* Driver data is an index into the scx200_data array that indicates 549 * the name and the BAR where the I/O address resource is located. ISA 550 * devices are flagged with a bar value of -1 */ 551 552 static struct pci_device_id scx200_pci[] = { 553 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE), 554 .driver_data = 0 }, 555 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE), 556 .driver_data = 0 }, 557 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA), 558 .driver_data = 1 }, 559 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA), 560 .driver_data = 2 } 561 }; 562 563 static struct { 564 const char *name; 565 int bar; 566 } scx200_data[] = { 567 { "SCx200", -1 }, 568 { "CS5535", 0 }, 569 { "CS5536", 0 } 570 }; 571 572 static __init int scx200_scan_pci(void) 573 { 574 int data, dev; 575 int rc = -ENODEV; 576 struct pci_dev *pdev; 577 578 for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) { 579 pdev = pci_get_device(scx200_pci[dev].vendor, 580 scx200_pci[dev].device, NULL); 581 582 if (pdev == NULL) 583 continue; 584 585 data = scx200_pci[dev].driver_data; 586 587 /* if .bar is greater or equal to zero, this is a 588 * PCI device - otherwise, we assume 589 that the ports are ISA based 590 */ 591 592 if (scx200_data[data].bar >= 0) 593 rc = scx200_create_pci(scx200_data[data].name, pdev, 594 scx200_data[data].bar); 595 else { 596 int i; 597 598 pci_dev_put(pdev); 599 for (i = 0; i < MAX_DEVICES; ++i) { 600 if (base[i] == 0) 601 continue; 602 603 rc = scx200_create_isa(scx200_data[data].name, 604 base[i], 605 i); 606 } 607 } 608 609 break; 610 } 611 612 return rc; 613 } 614 615 static int __init scx200_acb_init(void) 616 { 617 int rc; 618 619 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); 620 621 rc = scx200_scan_pci(); 622 623 /* If at least one bus was created, init must succeed */ 624 if (scx200_acb_list) 625 return 0; 626 return rc; 627 } 628 629 static void __exit scx200_acb_cleanup(void) 630 { 631 struct scx200_acb_iface *iface; 632 633 mutex_lock(&scx200_acb_list_mutex); 634 while ((iface = scx200_acb_list) != NULL) { 635 scx200_acb_list = iface->next; 636 mutex_unlock(&scx200_acb_list_mutex); 637 638 i2c_del_adapter(&iface->adapter); 639 640 if (iface->pdev) { 641 pci_release_region(iface->pdev, iface->bar); 642 pci_dev_put(iface->pdev); 643 } 644 else 645 release_region(iface->base, 8); 646 647 kfree(iface); 648 mutex_lock(&scx200_acb_list_mutex); 649 } 650 mutex_unlock(&scx200_acb_list_mutex); 651 } 652 653 module_init(scx200_acb_init); 654 module_exit(scx200_acb_cleanup); 655