12bbd681bSSubhendu Sekhar Behera /*
22bbd681bSSubhendu Sekhar Behera * Copyright (c) 2003-2015 Broadcom Corporation
32bbd681bSSubhendu Sekhar Behera *
42bbd681bSSubhendu Sekhar Behera * This file is licensed under the terms of the GNU General Public
52bbd681bSSubhendu Sekhar Behera * License version 2. This program is licensed "as is" without any
62bbd681bSSubhendu Sekhar Behera * warranty of any kind, whether express or implied.
72bbd681bSSubhendu Sekhar Behera */
82bbd681bSSubhendu Sekhar Behera
9748c0bbbSTanmay Jagdale #include <linux/acpi.h>
10c347b8fcSJayachandran C #include <linux/clk.h>
112bbd681bSSubhendu Sekhar Behera #include <linux/completion.h>
122bbd681bSSubhendu Sekhar Behera #include <linux/i2c.h>
1340f4e372SGeorge Cherian #include <linux/i2c-smbus.h>
142bbd681bSSubhendu Sekhar Behera #include <linux/init.h>
152bbd681bSSubhendu Sekhar Behera #include <linux/interrupt.h>
162bbd681bSSubhendu Sekhar Behera #include <linux/io.h>
172bbd681bSSubhendu Sekhar Behera #include <linux/kernel.h>
182bbd681bSSubhendu Sekhar Behera #include <linux/module.h>
192bbd681bSSubhendu Sekhar Behera #include <linux/platform_device.h>
20d3898a78SGeorge Cherian #include <linux/delay.h>
212bbd681bSSubhendu Sekhar Behera
222bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_DIV 0x0
232bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL 0x1
242bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD 0x2
252bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_STATUS 0x3
262bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MTXFIFO 0x4
272bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MRXFIFO 0x5
282bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MFIFOCTRL 0x6
292bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_STXFIFO 0x7
302bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_SRXFIFO 0x8
312bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_SFIFOCTRL 0x9
322bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_SLAVEADDR 0xA
332bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_OWNADDR 0xB
342bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_FIFOWCNT 0xC
352bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN 0xD
362bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTST 0xE
372bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_WAITCNT 0xF
382bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_TIMEOUT 0X10
392bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_GENCALLADDR 0x11
402bbd681bSSubhendu Sekhar Behera
41d3898a78SGeorge Cherian #define XLP9XX_I2C_STATUS_BUSY BIT(0)
42d3898a78SGeorge Cherian
432bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD_START BIT(7)
442bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD_STOP BIT(6)
452bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD_READ BIT(5)
462bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD_WRITE BIT(4)
472bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CMD_ACK BIT(3)
482bbd681bSSubhendu Sekhar Behera
492bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_MCTLEN_SHIFT 16
502bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_MCTLEN_MASK 0xffff0000
512bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_RST BIT(8)
522bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_EN BIT(6)
532bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_MASTER BIT(4)
542bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_FIFORD BIT(1)
552bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_CTRL_ADDMODE BIT(0)
562bbd681bSSubhendu Sekhar Behera
572bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_NACKADDR BIT(25)
582bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_SADDR BIT(13)
592bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_DATADONE BIT(12)
602bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_ARLOST BIT(11)
612bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_MFIFOFULL BIT(4)
622bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_MFIFOEMTY BIT(3)
632bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_MFIFOHI BIT(2)
642bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_INTEN_BUSERR BIT(0)
652bbd681bSSubhendu Sekhar Behera
662bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT 8
672bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MFIFOCTRL_LOTH_SHIFT 0
682bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_MFIFOCTRL_RST BIT(16)
692bbd681bSSubhendu Sekhar Behera
702bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_SLAVEADDR_RW BIT(0)
712bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_SLAVEADDR_ADDR_SHIFT 1
722bbd681bSSubhendu Sekhar Behera
732bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_IP_CLK_FREQ 133000000UL
742bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_FIFO_SIZE 0x80U
752bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_TIMEOUT_MS 1000
76d3898a78SGeorge Cherian #define XLP9XX_I2C_BUSY_TIMEOUT 50
772bbd681bSSubhendu Sekhar Behera
782bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_FIFO_WCNT_MASK 0xff
792bbd681bSSubhendu Sekhar Behera #define XLP9XX_I2C_STATUS_ERRMASK (XLP9XX_I2C_INTEN_ARLOST | \
802bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_INTEN_NACKADDR | XLP9XX_I2C_INTEN_BUSERR)
812bbd681bSSubhendu Sekhar Behera
822bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev {
832bbd681bSSubhendu Sekhar Behera struct device *dev;
842bbd681bSSubhendu Sekhar Behera struct i2c_adapter adapter;
852bbd681bSSubhendu Sekhar Behera struct completion msg_complete;
8640f4e372SGeorge Cherian struct i2c_smbus_alert_setup alert_data;
8740f4e372SGeorge Cherian struct i2c_client *ara;
882bbd681bSSubhendu Sekhar Behera int irq;
892bbd681bSSubhendu Sekhar Behera bool msg_read;
905515ae11SKamlakant Patel bool len_recv;
915515ae11SKamlakant Patel bool client_pec;
922bbd681bSSubhendu Sekhar Behera u32 __iomem *base;
932bbd681bSSubhendu Sekhar Behera u32 msg_buf_remaining;
942bbd681bSSubhendu Sekhar Behera u32 msg_len;
95c347b8fcSJayachandran C u32 ip_clk_hz;
962bbd681bSSubhendu Sekhar Behera u32 clk_hz;
972bbd681bSSubhendu Sekhar Behera u32 msg_err;
982bbd681bSSubhendu Sekhar Behera u8 *msg_buf;
992bbd681bSSubhendu Sekhar Behera };
1002bbd681bSSubhendu Sekhar Behera
xlp9xx_write_i2c_reg(struct xlp9xx_i2c_dev * priv,unsigned long reg,u32 val)1012bbd681bSSubhendu Sekhar Behera static inline void xlp9xx_write_i2c_reg(struct xlp9xx_i2c_dev *priv,
1022bbd681bSSubhendu Sekhar Behera unsigned long reg, u32 val)
1032bbd681bSSubhendu Sekhar Behera {
1042bbd681bSSubhendu Sekhar Behera writel(val, priv->base + reg);
1052bbd681bSSubhendu Sekhar Behera }
1062bbd681bSSubhendu Sekhar Behera
xlp9xx_read_i2c_reg(struct xlp9xx_i2c_dev * priv,unsigned long reg)1072bbd681bSSubhendu Sekhar Behera static inline u32 xlp9xx_read_i2c_reg(struct xlp9xx_i2c_dev *priv,
1082bbd681bSSubhendu Sekhar Behera unsigned long reg)
1092bbd681bSSubhendu Sekhar Behera {
1102bbd681bSSubhendu Sekhar Behera return readl(priv->base + reg);
1112bbd681bSSubhendu Sekhar Behera }
1122bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_mask_irq(struct xlp9xx_i2c_dev * priv,u32 mask)1132bbd681bSSubhendu Sekhar Behera static void xlp9xx_i2c_mask_irq(struct xlp9xx_i2c_dev *priv, u32 mask)
1142bbd681bSSubhendu Sekhar Behera {
1152bbd681bSSubhendu Sekhar Behera u32 inten;
1162bbd681bSSubhendu Sekhar Behera
1172bbd681bSSubhendu Sekhar Behera inten = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTEN) & ~mask;
1182bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, inten);
1192bbd681bSSubhendu Sekhar Behera }
1202bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_unmask_irq(struct xlp9xx_i2c_dev * priv,u32 mask)1212bbd681bSSubhendu Sekhar Behera static void xlp9xx_i2c_unmask_irq(struct xlp9xx_i2c_dev *priv, u32 mask)
1222bbd681bSSubhendu Sekhar Behera {
1232bbd681bSSubhendu Sekhar Behera u32 inten;
1242bbd681bSSubhendu Sekhar Behera
1252bbd681bSSubhendu Sekhar Behera inten = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTEN) | mask;
1262bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, inten);
1272bbd681bSSubhendu Sekhar Behera }
1282bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_update_rx_fifo_thres(struct xlp9xx_i2c_dev * priv)1292bbd681bSSubhendu Sekhar Behera static void xlp9xx_i2c_update_rx_fifo_thres(struct xlp9xx_i2c_dev *priv)
1302bbd681bSSubhendu Sekhar Behera {
1312bbd681bSSubhendu Sekhar Behera u32 thres;
1322bbd681bSSubhendu Sekhar Behera
13341b1d4deSGeorge Cherian if (priv->len_recv)
13441b1d4deSGeorge Cherian /* interrupt after the first read to examine
13541b1d4deSGeorge Cherian * the length byte before proceeding further
13641b1d4deSGeorge Cherian */
13741b1d4deSGeorge Cherian thres = 1;
13841b1d4deSGeorge Cherian else if (priv->msg_buf_remaining > XLP9XX_I2C_FIFO_SIZE)
13941b1d4deSGeorge Cherian thres = XLP9XX_I2C_FIFO_SIZE;
14041b1d4deSGeorge Cherian else
14141b1d4deSGeorge Cherian thres = priv->msg_buf_remaining;
14241b1d4deSGeorge Cherian
1432bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MFIFOCTRL,
1442bbd681bSSubhendu Sekhar Behera thres << XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT);
1452bbd681bSSubhendu Sekhar Behera }
1462bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_fill_tx_fifo(struct xlp9xx_i2c_dev * priv)1472bbd681bSSubhendu Sekhar Behera static void xlp9xx_i2c_fill_tx_fifo(struct xlp9xx_i2c_dev *priv)
1482bbd681bSSubhendu Sekhar Behera {
1492bbd681bSSubhendu Sekhar Behera u32 len, i;
1502bbd681bSSubhendu Sekhar Behera u8 *buf = priv->msg_buf;
1512bbd681bSSubhendu Sekhar Behera
1522bbd681bSSubhendu Sekhar Behera len = min(priv->msg_buf_remaining, XLP9XX_I2C_FIFO_SIZE);
1532bbd681bSSubhendu Sekhar Behera for (i = 0; i < len; i++)
1542bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MTXFIFO, buf[i]);
1552bbd681bSSubhendu Sekhar Behera priv->msg_buf_remaining -= len;
1562bbd681bSSubhendu Sekhar Behera priv->msg_buf += len;
1572bbd681bSSubhendu Sekhar Behera }
1582bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_update_rlen(struct xlp9xx_i2c_dev * priv)1598d504d80SGeorge Cherian static void xlp9xx_i2c_update_rlen(struct xlp9xx_i2c_dev *priv)
1608d504d80SGeorge Cherian {
1618d504d80SGeorge Cherian u32 val, len;
1628d504d80SGeorge Cherian
1638d504d80SGeorge Cherian /*
1648d504d80SGeorge Cherian * Update receive length. Re-read len to get the latest value,
1658d504d80SGeorge Cherian * and then add 4 to have a minimum value that can be safely
1668d504d80SGeorge Cherian * written. This is to account for the byte read above, the
1678d504d80SGeorge Cherian * transfer in progress and any delays in the register I/O
1688d504d80SGeorge Cherian */
1698d504d80SGeorge Cherian val = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_CTRL);
1708d504d80SGeorge Cherian len = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_FIFOWCNT) &
1718d504d80SGeorge Cherian XLP9XX_I2C_FIFO_WCNT_MASK;
1728d504d80SGeorge Cherian len = max_t(u32, priv->msg_len, len + 4);
17388b4116eSGeorge Cherian if (len >= I2C_SMBUS_BLOCK_MAX + 2)
17488b4116eSGeorge Cherian return;
1758d504d80SGeorge Cherian val = (val & ~XLP9XX_I2C_CTRL_MCTLEN_MASK) |
1768d504d80SGeorge Cherian (len << XLP9XX_I2C_CTRL_MCTLEN_SHIFT);
1778d504d80SGeorge Cherian xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, val);
1788d504d80SGeorge Cherian }
1798d504d80SGeorge Cherian
xlp9xx_i2c_drain_rx_fifo(struct xlp9xx_i2c_dev * priv)1802bbd681bSSubhendu Sekhar Behera static void xlp9xx_i2c_drain_rx_fifo(struct xlp9xx_i2c_dev *priv)
1812bbd681bSSubhendu Sekhar Behera {
1828d504d80SGeorge Cherian u32 len, i;
1835515ae11SKamlakant Patel u8 rlen, *buf = priv->msg_buf;
1842bbd681bSSubhendu Sekhar Behera
1852bbd681bSSubhendu Sekhar Behera len = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_FIFOWCNT) &
1862bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_FIFO_WCNT_MASK;
1875515ae11SKamlakant Patel if (!len)
1885515ae11SKamlakant Patel return;
1895515ae11SKamlakant Patel if (priv->len_recv) {
1905515ae11SKamlakant Patel /* read length byte */
1915515ae11SKamlakant Patel rlen = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
1925eb173f5SGeorge Cherian
1935eb173f5SGeorge Cherian /*
1945eb173f5SGeorge Cherian * We expect at least 2 interrupts for I2C_M_RECV_LEN
1955eb173f5SGeorge Cherian * transactions. The length is updated during the first
1965eb173f5SGeorge Cherian * interrupt, and the buffer contents are only copied
1975eb173f5SGeorge Cherian * during subsequent interrupts. If in case the interrupts
1985eb173f5SGeorge Cherian * get merged we would complete the transaction without
1995eb173f5SGeorge Cherian * copying out the bytes from RX fifo. To avoid this now we
2005eb173f5SGeorge Cherian * drain the fifo as and when data is available.
2015eb173f5SGeorge Cherian * We drained the rlen byte already, decrement total length
2025eb173f5SGeorge Cherian * by one.
2035eb173f5SGeorge Cherian */
2045eb173f5SGeorge Cherian
2055eb173f5SGeorge Cherian len--;
20688b4116eSGeorge Cherian if (rlen > I2C_SMBUS_BLOCK_MAX || rlen == 0) {
20788b4116eSGeorge Cherian rlen = 0; /*abort transfer */
20888b4116eSGeorge Cherian priv->msg_buf_remaining = 0;
20988b4116eSGeorge Cherian priv->msg_len = 0;
2105eb173f5SGeorge Cherian xlp9xx_i2c_update_rlen(priv);
2115eb173f5SGeorge Cherian return;
2125eb173f5SGeorge Cherian }
2135eb173f5SGeorge Cherian
2145515ae11SKamlakant Patel *buf++ = rlen;
2155515ae11SKamlakant Patel if (priv->client_pec)
21688b4116eSGeorge Cherian ++rlen; /* account for error check byte */
2175515ae11SKamlakant Patel /* update remaining bytes and message length */
2185515ae11SKamlakant Patel priv->msg_buf_remaining = rlen;
2195515ae11SKamlakant Patel priv->msg_len = rlen + 1;
2208d504d80SGeorge Cherian xlp9xx_i2c_update_rlen(priv);
22188b4116eSGeorge Cherian priv->len_recv = false;
2225eb173f5SGeorge Cherian }
2235eb173f5SGeorge Cherian
2242bbd681bSSubhendu Sekhar Behera len = min(priv->msg_buf_remaining, len);
2252bbd681bSSubhendu Sekhar Behera for (i = 0; i < len; i++, buf++)
2262bbd681bSSubhendu Sekhar Behera *buf = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
2272bbd681bSSubhendu Sekhar Behera
2282bbd681bSSubhendu Sekhar Behera priv->msg_buf_remaining -= len;
2292bbd681bSSubhendu Sekhar Behera priv->msg_buf = buf;
2302bbd681bSSubhendu Sekhar Behera
2312bbd681bSSubhendu Sekhar Behera if (priv->msg_buf_remaining)
2322bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_update_rx_fifo_thres(priv);
2332bbd681bSSubhendu Sekhar Behera }
2342bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_isr(int irq,void * dev_id)2352bbd681bSSubhendu Sekhar Behera static irqreturn_t xlp9xx_i2c_isr(int irq, void *dev_id)
2362bbd681bSSubhendu Sekhar Behera {
2372bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev *priv = dev_id;
2382bbd681bSSubhendu Sekhar Behera u32 status;
2392bbd681bSSubhendu Sekhar Behera
2402bbd681bSSubhendu Sekhar Behera status = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTST);
2412bbd681bSSubhendu Sekhar Behera if (status == 0)
2422bbd681bSSubhendu Sekhar Behera return IRQ_NONE;
2432bbd681bSSubhendu Sekhar Behera
2442bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTST, status);
2452bbd681bSSubhendu Sekhar Behera if (status & XLP9XX_I2C_STATUS_ERRMASK) {
2462bbd681bSSubhendu Sekhar Behera priv->msg_err = status;
2472bbd681bSSubhendu Sekhar Behera goto xfer_done;
2482bbd681bSSubhendu Sekhar Behera }
2492bbd681bSSubhendu Sekhar Behera
2502bbd681bSSubhendu Sekhar Behera /* SADDR ACK for SMBUS_QUICK */
2512bbd681bSSubhendu Sekhar Behera if ((status & XLP9XX_I2C_INTEN_SADDR) && (priv->msg_len == 0))
2522bbd681bSSubhendu Sekhar Behera goto xfer_done;
2532bbd681bSSubhendu Sekhar Behera
2542bbd681bSSubhendu Sekhar Behera if (!priv->msg_read) {
2552bbd681bSSubhendu Sekhar Behera if (status & XLP9XX_I2C_INTEN_MFIFOEMTY) {
2562bbd681bSSubhendu Sekhar Behera /* TX FIFO got empty, fill it up again */
2572bbd681bSSubhendu Sekhar Behera if (priv->msg_buf_remaining)
2582bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_fill_tx_fifo(priv);
2592bbd681bSSubhendu Sekhar Behera else
2602bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_mask_irq(priv,
2612bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_INTEN_MFIFOEMTY);
2622bbd681bSSubhendu Sekhar Behera }
2632bbd681bSSubhendu Sekhar Behera } else {
2642bbd681bSSubhendu Sekhar Behera if (status & (XLP9XX_I2C_INTEN_DATADONE |
2652bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_INTEN_MFIFOHI)) {
2662bbd681bSSubhendu Sekhar Behera /* data is in FIFO, read it */
2672bbd681bSSubhendu Sekhar Behera if (priv->msg_buf_remaining)
2682bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_drain_rx_fifo(priv);
2692bbd681bSSubhendu Sekhar Behera }
2702bbd681bSSubhendu Sekhar Behera }
2712bbd681bSSubhendu Sekhar Behera
2722bbd681bSSubhendu Sekhar Behera /* Transfer complete */
2732bbd681bSSubhendu Sekhar Behera if (status & XLP9XX_I2C_INTEN_DATADONE)
2742bbd681bSSubhendu Sekhar Behera goto xfer_done;
2752bbd681bSSubhendu Sekhar Behera
2762bbd681bSSubhendu Sekhar Behera return IRQ_HANDLED;
2772bbd681bSSubhendu Sekhar Behera
2782bbd681bSSubhendu Sekhar Behera xfer_done:
2792bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
2802bbd681bSSubhendu Sekhar Behera complete(&priv->msg_complete);
2812bbd681bSSubhendu Sekhar Behera return IRQ_HANDLED;
2822bbd681bSSubhendu Sekhar Behera }
2832bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_check_bus_status(struct xlp9xx_i2c_dev * priv)284d3898a78SGeorge Cherian static int xlp9xx_i2c_check_bus_status(struct xlp9xx_i2c_dev *priv)
285d3898a78SGeorge Cherian {
286d3898a78SGeorge Cherian u32 status;
287d3898a78SGeorge Cherian u32 busy_timeout = XLP9XX_I2C_BUSY_TIMEOUT;
288d3898a78SGeorge Cherian
289d3898a78SGeorge Cherian while (busy_timeout) {
290d3898a78SGeorge Cherian status = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_STATUS);
291d3898a78SGeorge Cherian if ((status & XLP9XX_I2C_STATUS_BUSY) == 0)
292d3898a78SGeorge Cherian break;
293d3898a78SGeorge Cherian
294d3898a78SGeorge Cherian busy_timeout--;
295d3898a78SGeorge Cherian usleep_range(1000, 1100);
296d3898a78SGeorge Cherian }
297d3898a78SGeorge Cherian
298d3898a78SGeorge Cherian if (!busy_timeout)
299d3898a78SGeorge Cherian return -EIO;
300d3898a78SGeorge Cherian
301d3898a78SGeorge Cherian return 0;
302d3898a78SGeorge Cherian }
303d3898a78SGeorge Cherian
xlp9xx_i2c_init(struct xlp9xx_i2c_dev * priv)3042bbd681bSSubhendu Sekhar Behera static int xlp9xx_i2c_init(struct xlp9xx_i2c_dev *priv)
3052bbd681bSSubhendu Sekhar Behera {
3062bbd681bSSubhendu Sekhar Behera u32 prescale;
3072bbd681bSSubhendu Sekhar Behera
3082bbd681bSSubhendu Sekhar Behera /*
3092bbd681bSSubhendu Sekhar Behera * The controller uses 5 * SCL clock internally.
3102bbd681bSSubhendu Sekhar Behera * So prescale value should be divided by 5.
3112bbd681bSSubhendu Sekhar Behera */
312c347b8fcSJayachandran C prescale = DIV_ROUND_UP(priv->ip_clk_hz, priv->clk_hz);
3132bbd681bSSubhendu Sekhar Behera prescale = ((prescale - 8) / 5) - 1;
3142bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, XLP9XX_I2C_CTRL_RST);
3152bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, XLP9XX_I2C_CTRL_EN |
3162bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_CTRL_MASTER);
3172bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_DIV, prescale);
3182bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
3192bbd681bSSubhendu Sekhar Behera
3202bbd681bSSubhendu Sekhar Behera return 0;
3212bbd681bSSubhendu Sekhar Behera }
3222bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_xfer_msg(struct xlp9xx_i2c_dev * priv,struct i2c_msg * msg,int last_msg)3232bbd681bSSubhendu Sekhar Behera static int xlp9xx_i2c_xfer_msg(struct xlp9xx_i2c_dev *priv, struct i2c_msg *msg,
3242bbd681bSSubhendu Sekhar Behera int last_msg)
3252bbd681bSSubhendu Sekhar Behera {
3262bbd681bSSubhendu Sekhar Behera unsigned long timeleft;
3275515ae11SKamlakant Patel u32 intr_mask, cmd, val, len;
3282bbd681bSSubhendu Sekhar Behera
3292bbd681bSSubhendu Sekhar Behera priv->msg_buf = msg->buf;
3302bbd681bSSubhendu Sekhar Behera priv->msg_buf_remaining = priv->msg_len = msg->len;
3312bbd681bSSubhendu Sekhar Behera priv->msg_err = 0;
3322bbd681bSSubhendu Sekhar Behera priv->msg_read = (msg->flags & I2C_M_RD);
3332bbd681bSSubhendu Sekhar Behera reinit_completion(&priv->msg_complete);
3342bbd681bSSubhendu Sekhar Behera
3352bbd681bSSubhendu Sekhar Behera /* Reset FIFO */
3362bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MFIFOCTRL,
3372bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_MFIFOCTRL_RST);
3382bbd681bSSubhendu Sekhar Behera
3392bbd681bSSubhendu Sekhar Behera /* set slave addr */
3402bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_SLAVEADDR,
3412bbd681bSSubhendu Sekhar Behera (msg->addr << XLP9XX_I2C_SLAVEADDR_ADDR_SHIFT) |
3422bbd681bSSubhendu Sekhar Behera (priv->msg_read ? XLP9XX_I2C_SLAVEADDR_RW : 0));
3432bbd681bSSubhendu Sekhar Behera
3442bbd681bSSubhendu Sekhar Behera /* Build control word for transfer */
3452bbd681bSSubhendu Sekhar Behera val = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_CTRL);
3462bbd681bSSubhendu Sekhar Behera if (!priv->msg_read)
3472bbd681bSSubhendu Sekhar Behera val &= ~XLP9XX_I2C_CTRL_FIFORD;
3482bbd681bSSubhendu Sekhar Behera else
3492bbd681bSSubhendu Sekhar Behera val |= XLP9XX_I2C_CTRL_FIFORD; /* read */
3502bbd681bSSubhendu Sekhar Behera
3512bbd681bSSubhendu Sekhar Behera if (msg->flags & I2C_M_TEN)
3522bbd681bSSubhendu Sekhar Behera val |= XLP9XX_I2C_CTRL_ADDMODE; /* 10-bit address mode*/
3532bbd681bSSubhendu Sekhar Behera else
3542bbd681bSSubhendu Sekhar Behera val &= ~XLP9XX_I2C_CTRL_ADDMODE;
3552bbd681bSSubhendu Sekhar Behera
3565515ae11SKamlakant Patel priv->len_recv = msg->flags & I2C_M_RECV_LEN;
35788b4116eSGeorge Cherian len = priv->len_recv ? I2C_SMBUS_BLOCK_MAX + 2 : msg->len;
3585515ae11SKamlakant Patel priv->client_pec = msg->flags & I2C_CLIENT_PEC;
3595515ae11SKamlakant Patel
36088b4116eSGeorge Cherian /* set FIFO threshold if reading */
36188b4116eSGeorge Cherian if (priv->msg_read)
36288b4116eSGeorge Cherian xlp9xx_i2c_update_rx_fifo_thres(priv);
36388b4116eSGeorge Cherian
3642bbd681bSSubhendu Sekhar Behera /* set data length to be transferred */
3652bbd681bSSubhendu Sekhar Behera val = (val & ~XLP9XX_I2C_CTRL_MCTLEN_MASK) |
3665515ae11SKamlakant Patel (len << XLP9XX_I2C_CTRL_MCTLEN_SHIFT);
3672bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, val);
3682bbd681bSSubhendu Sekhar Behera
3692bbd681bSSubhendu Sekhar Behera /* fill fifo during tx */
3702bbd681bSSubhendu Sekhar Behera if (!priv->msg_read)
3712bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_fill_tx_fifo(priv);
3722bbd681bSSubhendu Sekhar Behera
3732bbd681bSSubhendu Sekhar Behera /* set interrupt mask */
3742bbd681bSSubhendu Sekhar Behera intr_mask = (XLP9XX_I2C_INTEN_ARLOST | XLP9XX_I2C_INTEN_BUSERR |
3752bbd681bSSubhendu Sekhar Behera XLP9XX_I2C_INTEN_NACKADDR | XLP9XX_I2C_INTEN_DATADONE);
3762bbd681bSSubhendu Sekhar Behera
3772bbd681bSSubhendu Sekhar Behera if (priv->msg_read) {
3782bbd681bSSubhendu Sekhar Behera intr_mask |= XLP9XX_I2C_INTEN_MFIFOHI;
3792bbd681bSSubhendu Sekhar Behera if (msg->len == 0)
3802bbd681bSSubhendu Sekhar Behera intr_mask |= XLP9XX_I2C_INTEN_SADDR;
3812bbd681bSSubhendu Sekhar Behera } else {
3822bbd681bSSubhendu Sekhar Behera if (msg->len == 0)
3832bbd681bSSubhendu Sekhar Behera intr_mask |= XLP9XX_I2C_INTEN_SADDR;
3842bbd681bSSubhendu Sekhar Behera else
3852bbd681bSSubhendu Sekhar Behera intr_mask |= XLP9XX_I2C_INTEN_MFIFOEMTY;
3862bbd681bSSubhendu Sekhar Behera }
3872bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_unmask_irq(priv, intr_mask);
3882bbd681bSSubhendu Sekhar Behera
3892bbd681bSSubhendu Sekhar Behera /* set cmd reg */
3902bbd681bSSubhendu Sekhar Behera cmd = XLP9XX_I2C_CMD_START;
391e349d7d0SGeorge Cherian if (msg->len)
392e349d7d0SGeorge Cherian cmd |= (priv->msg_read ?
393e349d7d0SGeorge Cherian XLP9XX_I2C_CMD_READ : XLP9XX_I2C_CMD_WRITE);
3942bbd681bSSubhendu Sekhar Behera if (last_msg)
3952bbd681bSSubhendu Sekhar Behera cmd |= XLP9XX_I2C_CMD_STOP;
3962bbd681bSSubhendu Sekhar Behera
3972bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CMD, cmd);
3982bbd681bSSubhendu Sekhar Behera
3992bbd681bSSubhendu Sekhar Behera timeleft = msecs_to_jiffies(XLP9XX_I2C_TIMEOUT_MS);
4002bbd681bSSubhendu Sekhar Behera timeleft = wait_for_completion_timeout(&priv->msg_complete, timeleft);
4012bbd681bSSubhendu Sekhar Behera
402e349d7d0SGeorge Cherian if (priv->msg_err & XLP9XX_I2C_INTEN_BUSERR) {
4032bbd681bSSubhendu Sekhar Behera dev_dbg(priv->dev, "transfer error %x!\n", priv->msg_err);
404e349d7d0SGeorge Cherian xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CMD, XLP9XX_I2C_CMD_STOP);
405e349d7d0SGeorge Cherian return -EIO;
406e349d7d0SGeorge Cherian } else if (priv->msg_err & XLP9XX_I2C_INTEN_NACKADDR) {
407e349d7d0SGeorge Cherian return -ENXIO;
4082bbd681bSSubhendu Sekhar Behera }
4092bbd681bSSubhendu Sekhar Behera
4102bbd681bSSubhendu Sekhar Behera if (timeleft == 0) {
4112bbd681bSSubhendu Sekhar Behera dev_dbg(priv->dev, "i2c transfer timed out!\n");
4122bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_init(priv);
4132bbd681bSSubhendu Sekhar Behera return -ETIMEDOUT;
4142bbd681bSSubhendu Sekhar Behera }
4152bbd681bSSubhendu Sekhar Behera
4165515ae11SKamlakant Patel /* update msg->len with actual received length */
41788b4116eSGeorge Cherian if (msg->flags & I2C_M_RECV_LEN) {
41888b4116eSGeorge Cherian if (!priv->msg_len)
41988b4116eSGeorge Cherian return -EPROTO;
4205515ae11SKamlakant Patel msg->len = priv->msg_len;
42188b4116eSGeorge Cherian }
4222bbd681bSSubhendu Sekhar Behera return 0;
4232bbd681bSSubhendu Sekhar Behera }
4242bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_xfer(struct i2c_adapter * adap,struct i2c_msg * msgs,int num)4252bbd681bSSubhendu Sekhar Behera static int xlp9xx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
4262bbd681bSSubhendu Sekhar Behera int num)
4272bbd681bSSubhendu Sekhar Behera {
4282bbd681bSSubhendu Sekhar Behera int i, ret;
4292bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev *priv = i2c_get_adapdata(adap);
4302bbd681bSSubhendu Sekhar Behera
431d3898a78SGeorge Cherian ret = xlp9xx_i2c_check_bus_status(priv);
432d3898a78SGeorge Cherian if (ret) {
433d3898a78SGeorge Cherian xlp9xx_i2c_init(priv);
434d3898a78SGeorge Cherian ret = xlp9xx_i2c_check_bus_status(priv);
435d3898a78SGeorge Cherian if (ret)
436d3898a78SGeorge Cherian return ret;
437d3898a78SGeorge Cherian }
438d3898a78SGeorge Cherian
4392bbd681bSSubhendu Sekhar Behera for (i = 0; i < num; i++) {
4402bbd681bSSubhendu Sekhar Behera ret = xlp9xx_i2c_xfer_msg(priv, &msgs[i], i == num - 1);
4412bbd681bSSubhendu Sekhar Behera if (ret != 0)
4422bbd681bSSubhendu Sekhar Behera return ret;
4432bbd681bSSubhendu Sekhar Behera }
4442bbd681bSSubhendu Sekhar Behera
4452bbd681bSSubhendu Sekhar Behera return num;
4462bbd681bSSubhendu Sekhar Behera }
4472bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_functionality(struct i2c_adapter * adapter)4482bbd681bSSubhendu Sekhar Behera static u32 xlp9xx_i2c_functionality(struct i2c_adapter *adapter)
4492bbd681bSSubhendu Sekhar Behera {
45041b1d4deSGeorge Cherian return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_READ_BLOCK_DATA |
45141b1d4deSGeorge Cherian I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
4522bbd681bSSubhendu Sekhar Behera }
4532bbd681bSSubhendu Sekhar Behera
45492d9d0dfSBhumika Goyal static const struct i2c_algorithm xlp9xx_i2c_algo = {
4552bbd681bSSubhendu Sekhar Behera .master_xfer = xlp9xx_i2c_xfer,
4562bbd681bSSubhendu Sekhar Behera .functionality = xlp9xx_i2c_functionality,
4572bbd681bSSubhendu Sekhar Behera };
4582bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_get_frequency(struct platform_device * pdev,struct xlp9xx_i2c_dev * priv)4592bbd681bSSubhendu Sekhar Behera static int xlp9xx_i2c_get_frequency(struct platform_device *pdev,
4602bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev *priv)
4612bbd681bSSubhendu Sekhar Behera {
462c347b8fcSJayachandran C struct clk *clk;
4632bbd681bSSubhendu Sekhar Behera u32 freq;
4642bbd681bSSubhendu Sekhar Behera int err;
4652bbd681bSSubhendu Sekhar Behera
466c347b8fcSJayachandran C clk = devm_clk_get(&pdev->dev, NULL);
467c347b8fcSJayachandran C if (IS_ERR(clk)) {
468c347b8fcSJayachandran C priv->ip_clk_hz = XLP9XX_I2C_IP_CLK_FREQ;
469c347b8fcSJayachandran C dev_dbg(&pdev->dev, "using default input frequency %u\n",
470c347b8fcSJayachandran C priv->ip_clk_hz);
471c347b8fcSJayachandran C } else {
472c347b8fcSJayachandran C priv->ip_clk_hz = clk_get_rate(clk);
473c347b8fcSJayachandran C }
474c347b8fcSJayachandran C
475748c0bbbSTanmay Jagdale err = device_property_read_u32(&pdev->dev, "clock-frequency", &freq);
4762bbd681bSSubhendu Sekhar Behera if (err) {
47790224e64SAndy Shevchenko freq = I2C_MAX_STANDARD_MODE_FREQ;
4782bbd681bSSubhendu Sekhar Behera dev_dbg(&pdev->dev, "using default frequency %u\n", freq);
47990224e64SAndy Shevchenko } else if (freq == 0 || freq > I2C_MAX_FAST_MODE_FREQ) {
4802bbd681bSSubhendu Sekhar Behera dev_warn(&pdev->dev, "invalid frequency %u, using default\n",
4812bbd681bSSubhendu Sekhar Behera freq);
48290224e64SAndy Shevchenko freq = I2C_MAX_STANDARD_MODE_FREQ;
4832bbd681bSSubhendu Sekhar Behera }
4842bbd681bSSubhendu Sekhar Behera priv->clk_hz = freq;
4852bbd681bSSubhendu Sekhar Behera
4862bbd681bSSubhendu Sekhar Behera return 0;
4872bbd681bSSubhendu Sekhar Behera }
4882bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_smbus_setup(struct xlp9xx_i2c_dev * priv,struct platform_device * pdev)48940f4e372SGeorge Cherian static int xlp9xx_i2c_smbus_setup(struct xlp9xx_i2c_dev *priv,
49040f4e372SGeorge Cherian struct platform_device *pdev)
49140f4e372SGeorge Cherian {
492ed680522SWolfram Sang struct i2c_client *ara;
493ed680522SWolfram Sang
49440f4e372SGeorge Cherian if (!priv->alert_data.irq)
49540f4e372SGeorge Cherian return -EINVAL;
49640f4e372SGeorge Cherian
497ed680522SWolfram Sang ara = i2c_new_smbus_alert_device(&priv->adapter, &priv->alert_data);
498ed680522SWolfram Sang if (IS_ERR(ara))
499ed680522SWolfram Sang return PTR_ERR(ara);
500ed680522SWolfram Sang
501ed680522SWolfram Sang priv->ara = ara;
50240f4e372SGeorge Cherian
50340f4e372SGeorge Cherian return 0;
50440f4e372SGeorge Cherian }
50540f4e372SGeorge Cherian
xlp9xx_i2c_probe(struct platform_device * pdev)5062bbd681bSSubhendu Sekhar Behera static int xlp9xx_i2c_probe(struct platform_device *pdev)
5072bbd681bSSubhendu Sekhar Behera {
5082bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev *priv;
5092bbd681bSSubhendu Sekhar Behera int err = 0;
5102bbd681bSSubhendu Sekhar Behera
5112bbd681bSSubhendu Sekhar Behera priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
5122bbd681bSSubhendu Sekhar Behera if (!priv)
5132bbd681bSSubhendu Sekhar Behera return -ENOMEM;
5142bbd681bSSubhendu Sekhar Behera
515e0442d76SDejin Zheng priv->base = devm_platform_ioremap_resource(pdev, 0);
5162bbd681bSSubhendu Sekhar Behera if (IS_ERR(priv->base))
5172bbd681bSSubhendu Sekhar Behera return PTR_ERR(priv->base);
5182bbd681bSSubhendu Sekhar Behera
5192bbd681bSSubhendu Sekhar Behera priv->irq = platform_get_irq(pdev, 0);
520661e8a88SSergey Shtylyov if (priv->irq < 0)
5212bbd681bSSubhendu Sekhar Behera return priv->irq;
52240f4e372SGeorge Cherian /* SMBAlert irq */
52340f4e372SGeorge Cherian priv->alert_data.irq = platform_get_irq(pdev, 1);
52440f4e372SGeorge Cherian if (priv->alert_data.irq <= 0)
52540f4e372SGeorge Cherian priv->alert_data.irq = 0;
5262bbd681bSSubhendu Sekhar Behera
5272bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_get_frequency(pdev, priv);
5282bbd681bSSubhendu Sekhar Behera xlp9xx_i2c_init(priv);
5292bbd681bSSubhendu Sekhar Behera
5302bbd681bSSubhendu Sekhar Behera err = devm_request_irq(&pdev->dev, priv->irq, xlp9xx_i2c_isr, 0,
5312bbd681bSSubhendu Sekhar Behera pdev->name, priv);
532*9a648b3fSLiao Chang if (err)
533*9a648b3fSLiao Chang return dev_err_probe(&pdev->dev, err, "IRQ request failed!\n");
5342bbd681bSSubhendu Sekhar Behera
5352bbd681bSSubhendu Sekhar Behera init_completion(&priv->msg_complete);
5362bbd681bSSubhendu Sekhar Behera priv->adapter.dev.parent = &pdev->dev;
5372bbd681bSSubhendu Sekhar Behera priv->adapter.algo = &xlp9xx_i2c_algo;
538227855b9SGeorge Cherian priv->adapter.class = I2C_CLASS_HWMON;
539254df038STanmay Jagdale ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
5402bbd681bSSubhendu Sekhar Behera priv->adapter.dev.of_node = pdev->dev.of_node;
5412bbd681bSSubhendu Sekhar Behera priv->dev = &pdev->dev;
5422bbd681bSSubhendu Sekhar Behera
5432bbd681bSSubhendu Sekhar Behera snprintf(priv->adapter.name, sizeof(priv->adapter.name), "xlp9xx-i2c");
5442bbd681bSSubhendu Sekhar Behera i2c_set_adapdata(&priv->adapter, priv);
5452bbd681bSSubhendu Sekhar Behera
5462bbd681bSSubhendu Sekhar Behera err = i2c_add_adapter(&priv->adapter);
547ea734404SWolfram Sang if (err)
5482bbd681bSSubhendu Sekhar Behera return err;
5492bbd681bSSubhendu Sekhar Behera
55040f4e372SGeorge Cherian err = xlp9xx_i2c_smbus_setup(priv, pdev);
55140f4e372SGeorge Cherian if (err)
55240f4e372SGeorge Cherian dev_dbg(&pdev->dev, "No active SMBus alert %d\n", err);
55340f4e372SGeorge Cherian
5542bbd681bSSubhendu Sekhar Behera platform_set_drvdata(pdev, priv);
5552bbd681bSSubhendu Sekhar Behera dev_dbg(&pdev->dev, "I2C bus:%d added\n", priv->adapter.nr);
5562bbd681bSSubhendu Sekhar Behera
5572bbd681bSSubhendu Sekhar Behera return 0;
5582bbd681bSSubhendu Sekhar Behera }
5592bbd681bSSubhendu Sekhar Behera
xlp9xx_i2c_remove(struct platform_device * pdev)560e190a0c3SUwe Kleine-König static void xlp9xx_i2c_remove(struct platform_device *pdev)
5612bbd681bSSubhendu Sekhar Behera {
5622bbd681bSSubhendu Sekhar Behera struct xlp9xx_i2c_dev *priv;
5632bbd681bSSubhendu Sekhar Behera
5642bbd681bSSubhendu Sekhar Behera priv = platform_get_drvdata(pdev);
5652bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
5662bbd681bSSubhendu Sekhar Behera synchronize_irq(priv->irq);
5672bbd681bSSubhendu Sekhar Behera i2c_del_adapter(&priv->adapter);
5682bbd681bSSubhendu Sekhar Behera xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, 0);
5692bbd681bSSubhendu Sekhar Behera }
5702bbd681bSSubhendu Sekhar Behera
571748c0bbbSTanmay Jagdale #ifdef CONFIG_ACPI
572748c0bbbSTanmay Jagdale static const struct acpi_device_id xlp9xx_i2c_acpi_ids[] = {
573748c0bbbSTanmay Jagdale {"BRCM9007", 0},
5744165bd4bSJayachandran C {"CAV9007", 0},
575748c0bbbSTanmay Jagdale {}
576748c0bbbSTanmay Jagdale };
577748c0bbbSTanmay Jagdale MODULE_DEVICE_TABLE(acpi, xlp9xx_i2c_acpi_ids);
578748c0bbbSTanmay Jagdale #endif
579748c0bbbSTanmay Jagdale
5802bbd681bSSubhendu Sekhar Behera static struct platform_driver xlp9xx_i2c_driver = {
5812bbd681bSSubhendu Sekhar Behera .probe = xlp9xx_i2c_probe,
582e190a0c3SUwe Kleine-König .remove_new = xlp9xx_i2c_remove,
5832bbd681bSSubhendu Sekhar Behera .driver = {
5842bbd681bSSubhendu Sekhar Behera .name = "xlp9xx-i2c",
585748c0bbbSTanmay Jagdale .acpi_match_table = ACPI_PTR(xlp9xx_i2c_acpi_ids),
5862bbd681bSSubhendu Sekhar Behera },
5872bbd681bSSubhendu Sekhar Behera };
5882bbd681bSSubhendu Sekhar Behera
5892bbd681bSSubhendu Sekhar Behera module_platform_driver(xlp9xx_i2c_driver);
5902bbd681bSSubhendu Sekhar Behera
5912bbd681bSSubhendu Sekhar Behera MODULE_AUTHOR("Subhendu Sekhar Behera <sbehera@broadcom.com>");
5922bbd681bSSubhendu Sekhar Behera MODULE_DESCRIPTION("XLP9XX/5XX I2C Bus Controller Driver");
5932bbd681bSSubhendu Sekhar Behera MODULE_LICENSE("GPL v2");
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