1 /* 2 * X-Gene SLIMpro I2C Driver 3 * 4 * Copyright (c) 2014, Applied Micro Circuits Corporation 5 * Author: Feng Kan <fkan@apm.com> 6 * Author: Hieu Le <hnle@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, see <http://www.gnu.org/licenses/>. 20 * 21 * This driver provides support for X-Gene SLIMpro I2C device access 22 * using the APM X-Gene SLIMpro mailbox driver. 23 * 24 */ 25 #include <acpi/pcc.h> 26 #include <linux/acpi.h> 27 #include <linux/dma-mapping.h> 28 #include <linux/i2c.h> 29 #include <linux/interrupt.h> 30 #include <linux/io.h> 31 #include <linux/mailbox_client.h> 32 #include <linux/module.h> 33 #include <linux/of.h> 34 #include <linux/platform_device.h> 35 #include <linux/version.h> 36 37 #define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */ 38 #define MAILBOX_I2C_INDEX 0 39 #define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */ 40 41 #define SMBUS_CMD_LEN 1 42 #define BYTE_DATA 1 43 #define WORD_DATA 2 44 #define BLOCK_DATA 3 45 46 #define SLIMPRO_IIC_I2C_PROTOCOL 0 47 #define SLIMPRO_IIC_SMB_PROTOCOL 1 48 49 #define SLIMPRO_IIC_READ 0 50 #define SLIMPRO_IIC_WRITE 1 51 52 #define IIC_SMB_WITHOUT_DATA_LEN 0 53 #define IIC_SMB_WITH_DATA_LEN 1 54 55 #define SLIMPRO_DEBUG_MSG 0 56 #define SLIMPRO_MSG_TYPE_SHIFT 28 57 #define SLIMPRO_DBG_SUBTYPE_I2C1READ 4 58 #define SLIMPRO_DBGMSG_TYPE_SHIFT 24 59 #define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U 60 #define SLIMPRO_IIC_DEV_SHIFT 23 61 #define SLIMPRO_IIC_DEV_MASK 0x00800000U 62 #define SLIMPRO_IIC_DEVID_SHIFT 13 63 #define SLIMPRO_IIC_DEVID_MASK 0x007FE000U 64 #define SLIMPRO_IIC_RW_SHIFT 12 65 #define SLIMPRO_IIC_RW_MASK 0x00001000U 66 #define SLIMPRO_IIC_PROTO_SHIFT 11 67 #define SLIMPRO_IIC_PROTO_MASK 0x00000800U 68 #define SLIMPRO_IIC_ADDRLEN_SHIFT 8 69 #define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U 70 #define SLIMPRO_IIC_DATALEN_SHIFT 0 71 #define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU 72 73 /* 74 * SLIMpro I2C message encode 75 * 76 * dev - Controller number (0-based) 77 * chip - I2C chip address 78 * op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE 79 * proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL 80 * addrlen - Length of the address field 81 * datalen - Length of the data field 82 */ 83 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \ 84 ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \ 85 ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \ 86 SLIMPRO_DBGMSG_TYPE_MASK) | \ 87 ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \ 88 ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \ 89 ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \ 90 ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \ 91 ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \ 92 ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK)) 93 94 #define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28) 95 96 /* 97 * Encode for upper address for block data 98 */ 99 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000 100 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \ 101 & 0x40000000)) 102 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \ 103 & 0x3FF00000)) 104 #define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF) 105 106 #define SLIMPRO_IIC_MSG_DWORD_COUNT 3 107 108 /* PCC related defines */ 109 #define PCC_SIGNATURE 0x50424300 110 #define PCC_STS_CMD_COMPLETE BIT(0) 111 #define PCC_STS_SCI_DOORBELL BIT(1) 112 #define PCC_STS_ERR BIT(2) 113 #define PCC_STS_PLAT_NOTIFY BIT(3) 114 #define PCC_CMD_GENERATE_DB_INT BIT(15) 115 116 struct slimpro_i2c_dev { 117 struct i2c_adapter adapter; 118 struct device *dev; 119 struct mbox_chan *mbox_chan; 120 struct mbox_client mbox_client; 121 int mbox_idx; 122 struct completion rd_complete; 123 u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */ 124 u32 *resp_msg; 125 phys_addr_t comm_base_addr; 126 void *pcc_comm_addr; 127 }; 128 129 #define to_slimpro_i2c_dev(cl) \ 130 container_of(cl, struct slimpro_i2c_dev, mbox_client) 131 132 enum slimpro_i2c_version { 133 XGENE_SLIMPRO_I2C_V1 = 0, 134 XGENE_SLIMPRO_I2C_V2 = 1, 135 }; 136 137 /* 138 * This function tests and clears a bitmask then returns its old value 139 */ 140 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) 141 { 142 u16 ret, val; 143 144 val = le16_to_cpu(READ_ONCE(*addr)); 145 ret = val & mask; 146 val &= ~mask; 147 WRITE_ONCE(*addr, cpu_to_le16(val)); 148 149 return ret; 150 } 151 152 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg) 153 { 154 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 155 156 /* 157 * Response message format: 158 * mssg[0] is the return code of the operation 159 * mssg[1] is the first data word 160 * mssg[2] is NOT used 161 */ 162 if (ctx->resp_msg) 163 *ctx->resp_msg = ((u32 *)mssg)[1]; 164 165 if (ctx->mbox_client.tx_block) 166 complete(&ctx->rd_complete); 167 } 168 169 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg) 170 { 171 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 172 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 173 174 /* Check if platform sends interrupt */ 175 if (!xgene_word_tst_and_clr(&generic_comm_base->status, 176 PCC_STS_SCI_DOORBELL)) 177 return; 178 179 if (xgene_word_tst_and_clr(&generic_comm_base->status, 180 PCC_STS_CMD_COMPLETE)) { 181 msg = generic_comm_base + 1; 182 183 /* Response message msg[1] contains the return value. */ 184 if (ctx->resp_msg) 185 *ctx->resp_msg = ((u32 *)msg)[1]; 186 187 complete(&ctx->rd_complete); 188 } 189 } 190 191 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg) 192 { 193 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 194 u32 *ptr = (void *)(generic_comm_base + 1); 195 u16 status; 196 int i; 197 198 WRITE_ONCE(generic_comm_base->signature, 199 cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx)); 200 201 WRITE_ONCE(generic_comm_base->command, 202 cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT)); 203 204 status = le16_to_cpu(READ_ONCE(generic_comm_base->status)); 205 status &= ~PCC_STS_CMD_COMPLETE; 206 WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status)); 207 208 /* Copy the message to the PCC comm space */ 209 for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++) 210 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); 211 } 212 213 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx) 214 { 215 if (ctx->mbox_client.tx_block || !acpi_disabled) { 216 if (!wait_for_completion_timeout(&ctx->rd_complete, 217 msecs_to_jiffies(MAILBOX_OP_TIMEOUT))) 218 return -ETIMEDOUT; 219 } 220 221 /* Check of invalid data or no device */ 222 if (*ctx->resp_msg == 0xffffffff) 223 return -ENODEV; 224 225 return 0; 226 } 227 228 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx, 229 u32 *msg, 230 u32 *data) 231 { 232 int rc; 233 234 ctx->resp_msg = data; 235 236 if (!acpi_disabled) { 237 reinit_completion(&ctx->rd_complete); 238 slimpro_i2c_pcc_tx_prepare(ctx, msg); 239 } 240 241 rc = mbox_send_message(ctx->mbox_chan, msg); 242 if (rc < 0) 243 goto err; 244 245 rc = start_i2c_msg_xfer(ctx); 246 247 err: 248 if (!acpi_disabled) 249 mbox_chan_txdone(ctx->mbox_chan, 0); 250 251 ctx->resp_msg = NULL; 252 253 return rc; 254 } 255 256 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip, 257 u32 addr, u32 addrlen, u32 protocol, 258 u32 readlen, u32 *data) 259 { 260 u32 msg[3]; 261 262 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 263 SLIMPRO_IIC_READ, protocol, addrlen, readlen); 264 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 265 msg[2] = 0; 266 267 return slimpro_i2c_send_msg(ctx, msg, data); 268 } 269 270 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip, 271 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 272 u32 data) 273 { 274 u32 msg[3]; 275 276 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 277 SLIMPRO_IIC_WRITE, protocol, addrlen, writelen); 278 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 279 msg[2] = data; 280 281 return slimpro_i2c_send_msg(ctx, msg, msg); 282 } 283 284 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr, 285 u32 addrlen, u32 protocol, u32 readlen, 286 u32 with_data_len, void *data) 287 { 288 dma_addr_t paddr; 289 u32 msg[3]; 290 int rc; 291 292 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE); 293 if (dma_mapping_error(ctx->dev, paddr)) { 294 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 295 ctx->dma_buffer); 296 return -ENOMEM; 297 } 298 299 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ, 300 protocol, addrlen, readlen); 301 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 302 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) | 303 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 304 SLIMPRO_IIC_ENCODE_ADDR(addr); 305 msg[2] = (u32)paddr; 306 307 rc = slimpro_i2c_send_msg(ctx, msg, msg); 308 309 /* Copy to destination */ 310 memcpy(data, ctx->dma_buffer, readlen); 311 312 dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE); 313 return rc; 314 } 315 316 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip, 317 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 318 void *data) 319 { 320 dma_addr_t paddr; 321 u32 msg[3]; 322 int rc; 323 324 memcpy(ctx->dma_buffer, data, writelen); 325 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen, 326 DMA_TO_DEVICE); 327 if (dma_mapping_error(ctx->dev, paddr)) { 328 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 329 ctx->dma_buffer); 330 return -ENOMEM; 331 } 332 333 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE, 334 protocol, addrlen, writelen); 335 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 336 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 337 SLIMPRO_IIC_ENCODE_ADDR(addr); 338 msg[2] = (u32)paddr; 339 340 if (ctx->mbox_client.tx_block) 341 reinit_completion(&ctx->rd_complete); 342 343 rc = slimpro_i2c_send_msg(ctx, msg, msg); 344 345 dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE); 346 return rc; 347 } 348 349 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr, 350 unsigned short flags, char read_write, 351 u8 command, int size, 352 union i2c_smbus_data *data) 353 { 354 struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap); 355 int ret = -EOPNOTSUPP; 356 u32 val; 357 358 switch (size) { 359 case I2C_SMBUS_BYTE: 360 if (read_write == I2C_SMBUS_READ) { 361 ret = slimpro_i2c_rd(ctx, addr, 0, 0, 362 SLIMPRO_IIC_SMB_PROTOCOL, 363 BYTE_DATA, &val); 364 data->byte = val; 365 } else { 366 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 367 SLIMPRO_IIC_SMB_PROTOCOL, 368 0, 0); 369 } 370 break; 371 case I2C_SMBUS_BYTE_DATA: 372 if (read_write == I2C_SMBUS_READ) { 373 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 374 SLIMPRO_IIC_SMB_PROTOCOL, 375 BYTE_DATA, &val); 376 data->byte = val; 377 } else { 378 val = data->byte; 379 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 380 SLIMPRO_IIC_SMB_PROTOCOL, 381 BYTE_DATA, val); 382 } 383 break; 384 case I2C_SMBUS_WORD_DATA: 385 if (read_write == I2C_SMBUS_READ) { 386 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 387 SLIMPRO_IIC_SMB_PROTOCOL, 388 WORD_DATA, &val); 389 data->word = val; 390 } else { 391 val = data->word; 392 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 393 SLIMPRO_IIC_SMB_PROTOCOL, 394 WORD_DATA, val); 395 } 396 break; 397 case I2C_SMBUS_BLOCK_DATA: 398 if (read_write == I2C_SMBUS_READ) { 399 ret = slimpro_i2c_blkrd(ctx, addr, command, 400 SMBUS_CMD_LEN, 401 SLIMPRO_IIC_SMB_PROTOCOL, 402 I2C_SMBUS_BLOCK_MAX + 1, 403 IIC_SMB_WITH_DATA_LEN, 404 &data->block[0]); 405 406 } else { 407 ret = slimpro_i2c_blkwr(ctx, addr, command, 408 SMBUS_CMD_LEN, 409 SLIMPRO_IIC_SMB_PROTOCOL, 410 data->block[0] + 1, 411 &data->block[0]); 412 } 413 break; 414 case I2C_SMBUS_I2C_BLOCK_DATA: 415 if (read_write == I2C_SMBUS_READ) { 416 ret = slimpro_i2c_blkrd(ctx, addr, 417 command, 418 SMBUS_CMD_LEN, 419 SLIMPRO_IIC_I2C_PROTOCOL, 420 I2C_SMBUS_BLOCK_MAX, 421 IIC_SMB_WITHOUT_DATA_LEN, 422 &data->block[1]); 423 } else { 424 ret = slimpro_i2c_blkwr(ctx, addr, command, 425 SMBUS_CMD_LEN, 426 SLIMPRO_IIC_I2C_PROTOCOL, 427 data->block[0], 428 &data->block[1]); 429 } 430 break; 431 default: 432 break; 433 } 434 return ret; 435 } 436 437 /* 438 * Return list of supported functionality. 439 */ 440 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter) 441 { 442 return I2C_FUNC_SMBUS_BYTE | 443 I2C_FUNC_SMBUS_BYTE_DATA | 444 I2C_FUNC_SMBUS_WORD_DATA | 445 I2C_FUNC_SMBUS_BLOCK_DATA | 446 I2C_FUNC_SMBUS_I2C_BLOCK; 447 } 448 449 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = { 450 .smbus_xfer = xgene_slimpro_i2c_xfer, 451 .functionality = xgene_slimpro_i2c_func, 452 }; 453 454 static int xgene_slimpro_i2c_probe(struct platform_device *pdev) 455 { 456 struct slimpro_i2c_dev *ctx; 457 struct i2c_adapter *adapter; 458 struct mbox_client *cl; 459 int rc; 460 461 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); 462 if (!ctx) 463 return -ENOMEM; 464 465 ctx->dev = &pdev->dev; 466 platform_set_drvdata(pdev, ctx); 467 cl = &ctx->mbox_client; 468 469 /* Request mailbox channel */ 470 cl->dev = &pdev->dev; 471 init_completion(&ctx->rd_complete); 472 cl->tx_tout = MAILBOX_OP_TIMEOUT; 473 cl->knows_txdone = false; 474 if (acpi_disabled) { 475 cl->tx_block = true; 476 cl->rx_callback = slimpro_i2c_rx_cb; 477 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX); 478 if (IS_ERR(ctx->mbox_chan)) { 479 dev_err(&pdev->dev, "i2c mailbox channel request failed\n"); 480 return PTR_ERR(ctx->mbox_chan); 481 } 482 } else { 483 struct acpi_pcct_hw_reduced *cppc_ss; 484 const struct acpi_device_id *acpi_id; 485 int version = XGENE_SLIMPRO_I2C_V1; 486 487 acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table, 488 &pdev->dev); 489 if (!acpi_id) 490 return -EINVAL; 491 492 version = (int)acpi_id->driver_data; 493 494 if (device_property_read_u32(&pdev->dev, "pcc-channel", 495 &ctx->mbox_idx)) 496 ctx->mbox_idx = MAILBOX_I2C_INDEX; 497 498 cl->tx_block = false; 499 cl->rx_callback = slimpro_i2c_pcc_rx_cb; 500 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); 501 if (IS_ERR(ctx->mbox_chan)) { 502 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); 503 return PTR_ERR(ctx->mbox_chan); 504 } 505 506 /* 507 * The PCC mailbox controller driver should 508 * have parsed the PCCT (global table of all 509 * PCC channels) and stored pointers to the 510 * subspace communication region in con_priv. 511 */ 512 cppc_ss = ctx->mbox_chan->con_priv; 513 if (!cppc_ss) { 514 dev_err(&pdev->dev, "PPC subspace not found\n"); 515 rc = -ENOENT; 516 goto mbox_err; 517 } 518 519 if (!ctx->mbox_chan->mbox->txdone_irq) { 520 dev_err(&pdev->dev, "PCC IRQ not supported\n"); 521 rc = -ENOENT; 522 goto mbox_err; 523 } 524 525 /* 526 * This is the shared communication region 527 * for the OS and Platform to communicate over. 528 */ 529 ctx->comm_base_addr = cppc_ss->base_address; 530 if (ctx->comm_base_addr) { 531 if (version == XGENE_SLIMPRO_I2C_V2) 532 ctx->pcc_comm_addr = memremap( 533 ctx->comm_base_addr, 534 cppc_ss->length, 535 MEMREMAP_WT); 536 else 537 ctx->pcc_comm_addr = memremap( 538 ctx->comm_base_addr, 539 cppc_ss->length, 540 MEMREMAP_WB); 541 } else { 542 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); 543 rc = -ENOENT; 544 goto mbox_err; 545 } 546 547 if (!ctx->pcc_comm_addr) { 548 dev_err(&pdev->dev, 549 "Failed to ioremap PCC comm region\n"); 550 rc = -ENOMEM; 551 goto mbox_err; 552 } 553 } 554 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 555 if (rc) 556 dev_warn(&pdev->dev, "Unable to set dma mask\n"); 557 558 /* Setup I2C adapter */ 559 adapter = &ctx->adapter; 560 snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C"); 561 adapter->algo = &xgene_slimpro_i2c_algorithm; 562 adapter->class = I2C_CLASS_HWMON; 563 adapter->dev.parent = &pdev->dev; 564 adapter->dev.of_node = pdev->dev.of_node; 565 ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev)); 566 i2c_set_adapdata(adapter, ctx); 567 rc = i2c_add_adapter(adapter); 568 if (rc) 569 goto mbox_err; 570 571 dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n"); 572 return 0; 573 574 mbox_err: 575 if (acpi_disabled) 576 mbox_free_channel(ctx->mbox_chan); 577 else 578 pcc_mbox_free_channel(ctx->mbox_chan); 579 580 return rc; 581 } 582 583 static int xgene_slimpro_i2c_remove(struct platform_device *pdev) 584 { 585 struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev); 586 587 i2c_del_adapter(&ctx->adapter); 588 589 if (acpi_disabled) 590 mbox_free_channel(ctx->mbox_chan); 591 else 592 pcc_mbox_free_channel(ctx->mbox_chan); 593 594 return 0; 595 } 596 597 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = { 598 {.compatible = "apm,xgene-slimpro-i2c" }, 599 {}, 600 }; 601 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids); 602 603 #ifdef CONFIG_ACPI 604 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = { 605 {"APMC0D40", XGENE_SLIMPRO_I2C_V1}, 606 {"APMC0D8B", XGENE_SLIMPRO_I2C_V2}, 607 {} 608 }; 609 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids); 610 #endif 611 612 static struct platform_driver xgene_slimpro_i2c_driver = { 613 .probe = xgene_slimpro_i2c_probe, 614 .remove = xgene_slimpro_i2c_remove, 615 .driver = { 616 .name = "xgene-slimpro-i2c", 617 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids), 618 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids) 619 }, 620 }; 621 622 module_platform_driver(xgene_slimpro_i2c_driver); 623 624 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver"); 625 MODULE_AUTHOR("Feng Kan <fkan@apm.com>"); 626 MODULE_AUTHOR("Hieu Le <hnle@apm.com>"); 627 MODULE_LICENSE("GPL"); 628