1 /* 2 * X-Gene SLIMpro I2C Driver 3 * 4 * Copyright (c) 2014, Applied Micro Circuits Corporation 5 * Author: Feng Kan <fkan@apm.com> 6 * Author: Hieu Le <hnle@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, see <http://www.gnu.org/licenses/>. 20 * 21 * This driver provides support for X-Gene SLIMpro I2C device access 22 * using the APM X-Gene SLIMpro mailbox driver. 23 * 24 */ 25 #include <acpi/pcc.h> 26 #include <linux/acpi.h> 27 #include <linux/dma-mapping.h> 28 #include <linux/i2c.h> 29 #include <linux/interrupt.h> 30 #include <linux/io.h> 31 #include <linux/mailbox_client.h> 32 #include <linux/module.h> 33 #include <linux/of.h> 34 #include <linux/platform_device.h> 35 #include <linux/version.h> 36 37 #define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */ 38 #define MAILBOX_I2C_INDEX 0 39 #define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */ 40 41 #define SMBUS_CMD_LEN 1 42 #define BYTE_DATA 1 43 #define WORD_DATA 2 44 #define BLOCK_DATA 3 45 46 #define SLIMPRO_IIC_I2C_PROTOCOL 0 47 #define SLIMPRO_IIC_SMB_PROTOCOL 1 48 49 #define SLIMPRO_IIC_READ 0 50 #define SLIMPRO_IIC_WRITE 1 51 52 #define IIC_SMB_WITHOUT_DATA_LEN 0 53 #define IIC_SMB_WITH_DATA_LEN 1 54 55 #define SLIMPRO_DEBUG_MSG 0 56 #define SLIMPRO_MSG_TYPE_SHIFT 28 57 #define SLIMPRO_DBG_SUBTYPE_I2C1READ 4 58 #define SLIMPRO_DBGMSG_TYPE_SHIFT 24 59 #define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U 60 #define SLIMPRO_IIC_DEV_SHIFT 23 61 #define SLIMPRO_IIC_DEV_MASK 0x00800000U 62 #define SLIMPRO_IIC_DEVID_SHIFT 13 63 #define SLIMPRO_IIC_DEVID_MASK 0x007FE000U 64 #define SLIMPRO_IIC_RW_SHIFT 12 65 #define SLIMPRO_IIC_RW_MASK 0x00001000U 66 #define SLIMPRO_IIC_PROTO_SHIFT 11 67 #define SLIMPRO_IIC_PROTO_MASK 0x00000800U 68 #define SLIMPRO_IIC_ADDRLEN_SHIFT 8 69 #define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U 70 #define SLIMPRO_IIC_DATALEN_SHIFT 0 71 #define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU 72 73 /* 74 * SLIMpro I2C message encode 75 * 76 * dev - Controller number (0-based) 77 * chip - I2C chip address 78 * op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE 79 * proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL 80 * addrlen - Length of the address field 81 * datalen - Length of the data field 82 */ 83 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \ 84 ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \ 85 ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \ 86 SLIMPRO_DBGMSG_TYPE_MASK) | \ 87 ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \ 88 ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \ 89 ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \ 90 ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \ 91 ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \ 92 ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK)) 93 94 #define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28) 95 96 /* 97 * Encode for upper address for block data 98 */ 99 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000 100 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \ 101 & 0x40000000)) 102 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \ 103 & 0x3FF00000)) 104 #define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF) 105 106 #define SLIMPRO_IIC_MSG_DWORD_COUNT 3 107 108 /* PCC related defines */ 109 #define PCC_SIGNATURE 0x50424300 110 #define PCC_STS_CMD_COMPLETE BIT(0) 111 #define PCC_STS_SCI_DOORBELL BIT(1) 112 #define PCC_STS_ERR BIT(2) 113 #define PCC_STS_PLAT_NOTIFY BIT(3) 114 #define PCC_CMD_GENERATE_DB_INT BIT(15) 115 116 struct slimpro_i2c_dev { 117 struct i2c_adapter adapter; 118 struct device *dev; 119 struct mbox_chan *mbox_chan; 120 struct mbox_client mbox_client; 121 int mbox_idx; 122 struct completion rd_complete; 123 u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */ 124 u32 *resp_msg; 125 phys_addr_t comm_base_addr; 126 void *pcc_comm_addr; 127 }; 128 129 #define to_slimpro_i2c_dev(cl) \ 130 container_of(cl, struct slimpro_i2c_dev, mbox_client) 131 132 /* 133 * This function tests and clears a bitmask then returns its old value 134 */ 135 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) 136 { 137 u16 ret, val; 138 139 val = le16_to_cpu(READ_ONCE(*addr)); 140 ret = val & mask; 141 val &= ~mask; 142 WRITE_ONCE(*addr, cpu_to_le16(val)); 143 144 return ret; 145 } 146 147 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg) 148 { 149 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 150 151 /* 152 * Response message format: 153 * mssg[0] is the return code of the operation 154 * mssg[1] is the first data word 155 * mssg[2] is NOT used 156 */ 157 if (ctx->resp_msg) 158 *ctx->resp_msg = ((u32 *)mssg)[1]; 159 160 if (ctx->mbox_client.tx_block) 161 complete(&ctx->rd_complete); 162 } 163 164 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg) 165 { 166 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 167 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 168 169 /* Check if platform sends interrupt */ 170 if (!xgene_word_tst_and_clr(&generic_comm_base->status, 171 PCC_STS_SCI_DOORBELL)) 172 return; 173 174 if (xgene_word_tst_and_clr(&generic_comm_base->status, 175 PCC_STS_CMD_COMPLETE)) { 176 msg = generic_comm_base + 1; 177 178 /* Response message msg[1] contains the return value. */ 179 if (ctx->resp_msg) 180 *ctx->resp_msg = ((u32 *)msg)[1]; 181 182 complete(&ctx->rd_complete); 183 } 184 } 185 186 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg) 187 { 188 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 189 u32 *ptr = (void *)(generic_comm_base + 1); 190 u16 status; 191 int i; 192 193 WRITE_ONCE(generic_comm_base->signature, 194 cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx)); 195 196 WRITE_ONCE(generic_comm_base->command, 197 cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT)); 198 199 status = le16_to_cpu(READ_ONCE(generic_comm_base->status)); 200 status &= ~PCC_STS_CMD_COMPLETE; 201 WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status)); 202 203 /* Copy the message to the PCC comm space */ 204 for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++) 205 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); 206 } 207 208 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx) 209 { 210 if (ctx->mbox_client.tx_block || !acpi_disabled) { 211 if (!wait_for_completion_timeout(&ctx->rd_complete, 212 msecs_to_jiffies(MAILBOX_OP_TIMEOUT))) 213 return -ETIMEDOUT; 214 } 215 216 /* Check of invalid data or no device */ 217 if (*ctx->resp_msg == 0xffffffff) 218 return -ENODEV; 219 220 return 0; 221 } 222 223 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx, 224 u32 *msg, 225 u32 *data) 226 { 227 int rc; 228 229 ctx->resp_msg = data; 230 231 if (!acpi_disabled) { 232 reinit_completion(&ctx->rd_complete); 233 slimpro_i2c_pcc_tx_prepare(ctx, msg); 234 } 235 236 rc = mbox_send_message(ctx->mbox_chan, msg); 237 if (rc < 0) 238 goto err; 239 240 rc = start_i2c_msg_xfer(ctx); 241 242 err: 243 if (!acpi_disabled) 244 mbox_chan_txdone(ctx->mbox_chan, 0); 245 246 ctx->resp_msg = NULL; 247 248 return rc; 249 } 250 251 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip, 252 u32 addr, u32 addrlen, u32 protocol, 253 u32 readlen, u32 *data) 254 { 255 u32 msg[3]; 256 257 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 258 SLIMPRO_IIC_READ, protocol, addrlen, readlen); 259 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 260 msg[2] = 0; 261 262 return slimpro_i2c_send_msg(ctx, msg, data); 263 } 264 265 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip, 266 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 267 u32 data) 268 { 269 u32 msg[3]; 270 271 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 272 SLIMPRO_IIC_WRITE, protocol, addrlen, writelen); 273 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 274 msg[2] = data; 275 276 return slimpro_i2c_send_msg(ctx, msg, msg); 277 } 278 279 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr, 280 u32 addrlen, u32 protocol, u32 readlen, 281 u32 with_data_len, void *data) 282 { 283 dma_addr_t paddr; 284 u32 msg[3]; 285 int rc; 286 287 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE); 288 if (dma_mapping_error(ctx->dev, paddr)) { 289 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 290 ctx->dma_buffer); 291 return -ENOMEM; 292 } 293 294 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ, 295 protocol, addrlen, readlen); 296 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 297 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) | 298 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 299 SLIMPRO_IIC_ENCODE_ADDR(addr); 300 msg[2] = (u32)paddr; 301 302 rc = slimpro_i2c_send_msg(ctx, msg, msg); 303 304 /* Copy to destination */ 305 memcpy(data, ctx->dma_buffer, readlen); 306 307 dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE); 308 return rc; 309 } 310 311 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip, 312 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 313 void *data) 314 { 315 dma_addr_t paddr; 316 u32 msg[3]; 317 int rc; 318 319 memcpy(ctx->dma_buffer, data, writelen); 320 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen, 321 DMA_TO_DEVICE); 322 if (dma_mapping_error(ctx->dev, paddr)) { 323 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 324 ctx->dma_buffer); 325 return -ENOMEM; 326 } 327 328 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE, 329 protocol, addrlen, writelen); 330 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 331 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 332 SLIMPRO_IIC_ENCODE_ADDR(addr); 333 msg[2] = (u32)paddr; 334 335 if (ctx->mbox_client.tx_block) 336 reinit_completion(&ctx->rd_complete); 337 338 rc = slimpro_i2c_send_msg(ctx, msg, msg); 339 340 dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE); 341 return rc; 342 } 343 344 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr, 345 unsigned short flags, char read_write, 346 u8 command, int size, 347 union i2c_smbus_data *data) 348 { 349 struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap); 350 int ret = -EOPNOTSUPP; 351 u32 val; 352 353 switch (size) { 354 case I2C_SMBUS_BYTE: 355 if (read_write == I2C_SMBUS_READ) { 356 ret = slimpro_i2c_rd(ctx, addr, 0, 0, 357 SLIMPRO_IIC_SMB_PROTOCOL, 358 BYTE_DATA, &val); 359 data->byte = val; 360 } else { 361 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 362 SLIMPRO_IIC_SMB_PROTOCOL, 363 0, 0); 364 } 365 break; 366 case I2C_SMBUS_BYTE_DATA: 367 if (read_write == I2C_SMBUS_READ) { 368 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 369 SLIMPRO_IIC_SMB_PROTOCOL, 370 BYTE_DATA, &val); 371 data->byte = val; 372 } else { 373 val = data->byte; 374 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 375 SLIMPRO_IIC_SMB_PROTOCOL, 376 BYTE_DATA, val); 377 } 378 break; 379 case I2C_SMBUS_WORD_DATA: 380 if (read_write == I2C_SMBUS_READ) { 381 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 382 SLIMPRO_IIC_SMB_PROTOCOL, 383 WORD_DATA, &val); 384 data->word = val; 385 } else { 386 val = data->word; 387 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 388 SLIMPRO_IIC_SMB_PROTOCOL, 389 WORD_DATA, val); 390 } 391 break; 392 case I2C_SMBUS_BLOCK_DATA: 393 if (read_write == I2C_SMBUS_READ) { 394 ret = slimpro_i2c_blkrd(ctx, addr, command, 395 SMBUS_CMD_LEN, 396 SLIMPRO_IIC_SMB_PROTOCOL, 397 I2C_SMBUS_BLOCK_MAX + 1, 398 IIC_SMB_WITH_DATA_LEN, 399 &data->block[0]); 400 401 } else { 402 ret = slimpro_i2c_blkwr(ctx, addr, command, 403 SMBUS_CMD_LEN, 404 SLIMPRO_IIC_SMB_PROTOCOL, 405 data->block[0] + 1, 406 &data->block[0]); 407 } 408 break; 409 case I2C_SMBUS_I2C_BLOCK_DATA: 410 if (read_write == I2C_SMBUS_READ) { 411 ret = slimpro_i2c_blkrd(ctx, addr, 412 command, 413 SMBUS_CMD_LEN, 414 SLIMPRO_IIC_I2C_PROTOCOL, 415 I2C_SMBUS_BLOCK_MAX, 416 IIC_SMB_WITHOUT_DATA_LEN, 417 &data->block[1]); 418 } else { 419 ret = slimpro_i2c_blkwr(ctx, addr, command, 420 SMBUS_CMD_LEN, 421 SLIMPRO_IIC_I2C_PROTOCOL, 422 data->block[0], 423 &data->block[1]); 424 } 425 break; 426 default: 427 break; 428 } 429 return ret; 430 } 431 432 /* 433 * Return list of supported functionality. 434 */ 435 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter) 436 { 437 return I2C_FUNC_SMBUS_BYTE | 438 I2C_FUNC_SMBUS_BYTE_DATA | 439 I2C_FUNC_SMBUS_WORD_DATA | 440 I2C_FUNC_SMBUS_BLOCK_DATA | 441 I2C_FUNC_SMBUS_I2C_BLOCK; 442 } 443 444 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = { 445 .smbus_xfer = xgene_slimpro_i2c_xfer, 446 .functionality = xgene_slimpro_i2c_func, 447 }; 448 449 static int xgene_slimpro_i2c_probe(struct platform_device *pdev) 450 { 451 struct slimpro_i2c_dev *ctx; 452 struct i2c_adapter *adapter; 453 struct mbox_client *cl; 454 int rc; 455 456 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); 457 if (!ctx) 458 return -ENOMEM; 459 460 ctx->dev = &pdev->dev; 461 platform_set_drvdata(pdev, ctx); 462 cl = &ctx->mbox_client; 463 464 /* Request mailbox channel */ 465 cl->dev = &pdev->dev; 466 init_completion(&ctx->rd_complete); 467 cl->tx_tout = MAILBOX_OP_TIMEOUT; 468 cl->knows_txdone = false; 469 if (acpi_disabled) { 470 cl->tx_block = true; 471 cl->rx_callback = slimpro_i2c_rx_cb; 472 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX); 473 if (IS_ERR(ctx->mbox_chan)) { 474 dev_err(&pdev->dev, "i2c mailbox channel request failed\n"); 475 return PTR_ERR(ctx->mbox_chan); 476 } 477 } else { 478 struct acpi_pcct_hw_reduced *cppc_ss; 479 480 if (device_property_read_u32(&pdev->dev, "pcc-channel", 481 &ctx->mbox_idx)) 482 ctx->mbox_idx = MAILBOX_I2C_INDEX; 483 484 cl->tx_block = false; 485 cl->rx_callback = slimpro_i2c_pcc_rx_cb; 486 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); 487 if (IS_ERR(ctx->mbox_chan)) { 488 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); 489 return PTR_ERR(ctx->mbox_chan); 490 } 491 492 /* 493 * The PCC mailbox controller driver should 494 * have parsed the PCCT (global table of all 495 * PCC channels) and stored pointers to the 496 * subspace communication region in con_priv. 497 */ 498 cppc_ss = ctx->mbox_chan->con_priv; 499 if (!cppc_ss) { 500 dev_err(&pdev->dev, "PPC subspace not found\n"); 501 rc = -ENOENT; 502 goto mbox_err; 503 } 504 505 if (!ctx->mbox_chan->mbox->txdone_irq) { 506 dev_err(&pdev->dev, "PCC IRQ not supported\n"); 507 rc = -ENOENT; 508 goto mbox_err; 509 } 510 511 /* 512 * This is the shared communication region 513 * for the OS and Platform to communicate over. 514 */ 515 ctx->comm_base_addr = cppc_ss->base_address; 516 if (ctx->comm_base_addr) { 517 ctx->pcc_comm_addr = memremap(ctx->comm_base_addr, 518 cppc_ss->length, 519 MEMREMAP_WB); 520 } else { 521 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); 522 rc = -ENOENT; 523 goto mbox_err; 524 } 525 526 if (!ctx->pcc_comm_addr) { 527 dev_err(&pdev->dev, 528 "Failed to ioremap PCC comm region\n"); 529 rc = -ENOMEM; 530 goto mbox_err; 531 } 532 } 533 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 534 if (rc) 535 dev_warn(&pdev->dev, "Unable to set dma mask\n"); 536 537 /* Setup I2C adapter */ 538 adapter = &ctx->adapter; 539 snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C"); 540 adapter->algo = &xgene_slimpro_i2c_algorithm; 541 adapter->class = I2C_CLASS_HWMON; 542 adapter->dev.parent = &pdev->dev; 543 adapter->dev.of_node = pdev->dev.of_node; 544 ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev)); 545 i2c_set_adapdata(adapter, ctx); 546 rc = i2c_add_adapter(adapter); 547 if (rc) 548 goto mbox_err; 549 550 dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n"); 551 return 0; 552 553 mbox_err: 554 if (acpi_disabled) 555 mbox_free_channel(ctx->mbox_chan); 556 else 557 pcc_mbox_free_channel(ctx->mbox_chan); 558 559 return rc; 560 } 561 562 static int xgene_slimpro_i2c_remove(struct platform_device *pdev) 563 { 564 struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev); 565 566 i2c_del_adapter(&ctx->adapter); 567 568 if (acpi_disabled) 569 mbox_free_channel(ctx->mbox_chan); 570 else 571 pcc_mbox_free_channel(ctx->mbox_chan); 572 573 return 0; 574 } 575 576 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = { 577 {.compatible = "apm,xgene-slimpro-i2c" }, 578 {}, 579 }; 580 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids); 581 582 #ifdef CONFIG_ACPI 583 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = { 584 {"APMC0D40", 0}, 585 {} 586 }; 587 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids); 588 #endif 589 590 static struct platform_driver xgene_slimpro_i2c_driver = { 591 .probe = xgene_slimpro_i2c_probe, 592 .remove = xgene_slimpro_i2c_remove, 593 .driver = { 594 .name = "xgene-slimpro-i2c", 595 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids), 596 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids) 597 }, 598 }; 599 600 module_platform_driver(xgene_slimpro_i2c_driver); 601 602 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver"); 603 MODULE_AUTHOR("Feng Kan <fkan@apm.com>"); 604 MODULE_AUTHOR("Hieu Le <hnle@apm.com>"); 605 MODULE_LICENSE("GPL"); 606