1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * X-Gene SLIMpro I2C Driver 4 * 5 * Copyright (c) 2014, Applied Micro Circuits Corporation 6 * Author: Feng Kan <fkan@apm.com> 7 * Author: Hieu Le <hnle@apm.com> 8 * 9 * This driver provides support for X-Gene SLIMpro I2C device access 10 * using the APM X-Gene SLIMpro mailbox driver. 11 */ 12 #include <acpi/pcc.h> 13 #include <linux/acpi.h> 14 #include <linux/dma-mapping.h> 15 #include <linux/i2c.h> 16 #include <linux/interrupt.h> 17 #include <linux/io.h> 18 #include <linux/mailbox_client.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 23 #define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */ 24 #define MAILBOX_I2C_INDEX 0 25 #define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */ 26 27 #define SMBUS_CMD_LEN 1 28 #define BYTE_DATA 1 29 #define WORD_DATA 2 30 #define BLOCK_DATA 3 31 32 #define SLIMPRO_IIC_I2C_PROTOCOL 0 33 #define SLIMPRO_IIC_SMB_PROTOCOL 1 34 35 #define SLIMPRO_IIC_READ 0 36 #define SLIMPRO_IIC_WRITE 1 37 38 #define IIC_SMB_WITHOUT_DATA_LEN 0 39 #define IIC_SMB_WITH_DATA_LEN 1 40 41 #define SLIMPRO_DEBUG_MSG 0 42 #define SLIMPRO_MSG_TYPE_SHIFT 28 43 #define SLIMPRO_DBG_SUBTYPE_I2C1READ 4 44 #define SLIMPRO_DBGMSG_TYPE_SHIFT 24 45 #define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U 46 #define SLIMPRO_IIC_DEV_SHIFT 23 47 #define SLIMPRO_IIC_DEV_MASK 0x00800000U 48 #define SLIMPRO_IIC_DEVID_SHIFT 13 49 #define SLIMPRO_IIC_DEVID_MASK 0x007FE000U 50 #define SLIMPRO_IIC_RW_SHIFT 12 51 #define SLIMPRO_IIC_RW_MASK 0x00001000U 52 #define SLIMPRO_IIC_PROTO_SHIFT 11 53 #define SLIMPRO_IIC_PROTO_MASK 0x00000800U 54 #define SLIMPRO_IIC_ADDRLEN_SHIFT 8 55 #define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U 56 #define SLIMPRO_IIC_DATALEN_SHIFT 0 57 #define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU 58 59 /* 60 * SLIMpro I2C message encode 61 * 62 * dev - Controller number (0-based) 63 * chip - I2C chip address 64 * op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE 65 * proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL 66 * addrlen - Length of the address field 67 * datalen - Length of the data field 68 */ 69 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \ 70 ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \ 71 ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \ 72 SLIMPRO_DBGMSG_TYPE_MASK) | \ 73 ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \ 74 ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \ 75 ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \ 76 ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \ 77 ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \ 78 ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK)) 79 80 #define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28) 81 82 /* 83 * Encode for upper address for block data 84 */ 85 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000 86 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \ 87 & 0x40000000)) 88 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \ 89 & 0x3FF00000)) 90 #define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF) 91 92 #define SLIMPRO_IIC_MSG_DWORD_COUNT 3 93 94 /* PCC related defines */ 95 #define PCC_SIGNATURE 0x50424300 96 #define PCC_STS_CMD_COMPLETE BIT(0) 97 #define PCC_STS_SCI_DOORBELL BIT(1) 98 #define PCC_STS_ERR BIT(2) 99 #define PCC_STS_PLAT_NOTIFY BIT(3) 100 #define PCC_CMD_GENERATE_DB_INT BIT(15) 101 102 struct slimpro_i2c_dev { 103 struct i2c_adapter adapter; 104 struct device *dev; 105 struct mbox_chan *mbox_chan; 106 struct mbox_client mbox_client; 107 int mbox_idx; 108 struct completion rd_complete; 109 u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */ 110 u32 *resp_msg; 111 phys_addr_t comm_base_addr; 112 void *pcc_comm_addr; 113 }; 114 115 #define to_slimpro_i2c_dev(cl) \ 116 container_of(cl, struct slimpro_i2c_dev, mbox_client) 117 118 enum slimpro_i2c_version { 119 XGENE_SLIMPRO_I2C_V1 = 0, 120 XGENE_SLIMPRO_I2C_V2 = 1, 121 }; 122 123 /* 124 * This function tests and clears a bitmask then returns its old value 125 */ 126 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) 127 { 128 u16 ret, val; 129 130 val = le16_to_cpu(READ_ONCE(*addr)); 131 ret = val & mask; 132 val &= ~mask; 133 WRITE_ONCE(*addr, cpu_to_le16(val)); 134 135 return ret; 136 } 137 138 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg) 139 { 140 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 141 142 /* 143 * Response message format: 144 * mssg[0] is the return code of the operation 145 * mssg[1] is the first data word 146 * mssg[2] is NOT used 147 */ 148 if (ctx->resp_msg) 149 *ctx->resp_msg = ((u32 *)mssg)[1]; 150 151 if (ctx->mbox_client.tx_block) 152 complete(&ctx->rd_complete); 153 } 154 155 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg) 156 { 157 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); 158 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 159 160 /* Check if platform sends interrupt */ 161 if (!xgene_word_tst_and_clr(&generic_comm_base->status, 162 PCC_STS_SCI_DOORBELL)) 163 return; 164 165 if (xgene_word_tst_and_clr(&generic_comm_base->status, 166 PCC_STS_CMD_COMPLETE)) { 167 msg = generic_comm_base + 1; 168 169 /* Response message msg[1] contains the return value. */ 170 if (ctx->resp_msg) 171 *ctx->resp_msg = ((u32 *)msg)[1]; 172 173 complete(&ctx->rd_complete); 174 } 175 } 176 177 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg) 178 { 179 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; 180 u32 *ptr = (void *)(generic_comm_base + 1); 181 u16 status; 182 int i; 183 184 WRITE_ONCE(generic_comm_base->signature, 185 cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx)); 186 187 WRITE_ONCE(generic_comm_base->command, 188 cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT)); 189 190 status = le16_to_cpu(READ_ONCE(generic_comm_base->status)); 191 status &= ~PCC_STS_CMD_COMPLETE; 192 WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status)); 193 194 /* Copy the message to the PCC comm space */ 195 for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++) 196 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); 197 } 198 199 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx) 200 { 201 if (ctx->mbox_client.tx_block || !acpi_disabled) { 202 if (!wait_for_completion_timeout(&ctx->rd_complete, 203 msecs_to_jiffies(MAILBOX_OP_TIMEOUT))) 204 return -ETIMEDOUT; 205 } 206 207 /* Check of invalid data or no device */ 208 if (*ctx->resp_msg == 0xffffffff) 209 return -ENODEV; 210 211 return 0; 212 } 213 214 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx, 215 u32 *msg, 216 u32 *data) 217 { 218 int rc; 219 220 ctx->resp_msg = data; 221 222 if (!acpi_disabled) { 223 reinit_completion(&ctx->rd_complete); 224 slimpro_i2c_pcc_tx_prepare(ctx, msg); 225 } 226 227 rc = mbox_send_message(ctx->mbox_chan, msg); 228 if (rc < 0) 229 goto err; 230 231 rc = start_i2c_msg_xfer(ctx); 232 233 err: 234 if (!acpi_disabled) 235 mbox_chan_txdone(ctx->mbox_chan, 0); 236 237 ctx->resp_msg = NULL; 238 239 return rc; 240 } 241 242 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip, 243 u32 addr, u32 addrlen, u32 protocol, 244 u32 readlen, u32 *data) 245 { 246 u32 msg[3]; 247 248 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 249 SLIMPRO_IIC_READ, protocol, addrlen, readlen); 250 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 251 msg[2] = 0; 252 253 return slimpro_i2c_send_msg(ctx, msg, data); 254 } 255 256 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip, 257 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 258 u32 data) 259 { 260 u32 msg[3]; 261 262 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, 263 SLIMPRO_IIC_WRITE, protocol, addrlen, writelen); 264 msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr); 265 msg[2] = data; 266 267 return slimpro_i2c_send_msg(ctx, msg, msg); 268 } 269 270 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr, 271 u32 addrlen, u32 protocol, u32 readlen, 272 u32 with_data_len, void *data) 273 { 274 dma_addr_t paddr; 275 u32 msg[3]; 276 int rc; 277 278 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE); 279 if (dma_mapping_error(ctx->dev, paddr)) { 280 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 281 ctx->dma_buffer); 282 return -ENOMEM; 283 } 284 285 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ, 286 protocol, addrlen, readlen); 287 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 288 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) | 289 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 290 SLIMPRO_IIC_ENCODE_ADDR(addr); 291 msg[2] = (u32)paddr; 292 293 rc = slimpro_i2c_send_msg(ctx, msg, msg); 294 295 /* Copy to destination */ 296 memcpy(data, ctx->dma_buffer, readlen); 297 298 dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE); 299 return rc; 300 } 301 302 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip, 303 u32 addr, u32 addrlen, u32 protocol, u32 writelen, 304 void *data) 305 { 306 dma_addr_t paddr; 307 u32 msg[3]; 308 int rc; 309 310 memcpy(ctx->dma_buffer, data, writelen); 311 paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen, 312 DMA_TO_DEVICE); 313 if (dma_mapping_error(ctx->dev, paddr)) { 314 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n", 315 ctx->dma_buffer); 316 return -ENOMEM; 317 } 318 319 msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE, 320 protocol, addrlen, writelen); 321 msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR | 322 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) | 323 SLIMPRO_IIC_ENCODE_ADDR(addr); 324 msg[2] = (u32)paddr; 325 326 if (ctx->mbox_client.tx_block) 327 reinit_completion(&ctx->rd_complete); 328 329 rc = slimpro_i2c_send_msg(ctx, msg, msg); 330 331 dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE); 332 return rc; 333 } 334 335 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr, 336 unsigned short flags, char read_write, 337 u8 command, int size, 338 union i2c_smbus_data *data) 339 { 340 struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap); 341 int ret = -EOPNOTSUPP; 342 u32 val; 343 344 switch (size) { 345 case I2C_SMBUS_BYTE: 346 if (read_write == I2C_SMBUS_READ) { 347 ret = slimpro_i2c_rd(ctx, addr, 0, 0, 348 SLIMPRO_IIC_SMB_PROTOCOL, 349 BYTE_DATA, &val); 350 data->byte = val; 351 } else { 352 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 353 SLIMPRO_IIC_SMB_PROTOCOL, 354 0, 0); 355 } 356 break; 357 case I2C_SMBUS_BYTE_DATA: 358 if (read_write == I2C_SMBUS_READ) { 359 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 360 SLIMPRO_IIC_SMB_PROTOCOL, 361 BYTE_DATA, &val); 362 data->byte = val; 363 } else { 364 val = data->byte; 365 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 366 SLIMPRO_IIC_SMB_PROTOCOL, 367 BYTE_DATA, val); 368 } 369 break; 370 case I2C_SMBUS_WORD_DATA: 371 if (read_write == I2C_SMBUS_READ) { 372 ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN, 373 SLIMPRO_IIC_SMB_PROTOCOL, 374 WORD_DATA, &val); 375 data->word = val; 376 } else { 377 val = data->word; 378 ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN, 379 SLIMPRO_IIC_SMB_PROTOCOL, 380 WORD_DATA, val); 381 } 382 break; 383 case I2C_SMBUS_BLOCK_DATA: 384 if (read_write == I2C_SMBUS_READ) { 385 ret = slimpro_i2c_blkrd(ctx, addr, command, 386 SMBUS_CMD_LEN, 387 SLIMPRO_IIC_SMB_PROTOCOL, 388 I2C_SMBUS_BLOCK_MAX + 1, 389 IIC_SMB_WITH_DATA_LEN, 390 &data->block[0]); 391 392 } else { 393 ret = slimpro_i2c_blkwr(ctx, addr, command, 394 SMBUS_CMD_LEN, 395 SLIMPRO_IIC_SMB_PROTOCOL, 396 data->block[0] + 1, 397 &data->block[0]); 398 } 399 break; 400 case I2C_SMBUS_I2C_BLOCK_DATA: 401 if (read_write == I2C_SMBUS_READ) { 402 ret = slimpro_i2c_blkrd(ctx, addr, 403 command, 404 SMBUS_CMD_LEN, 405 SLIMPRO_IIC_I2C_PROTOCOL, 406 I2C_SMBUS_BLOCK_MAX, 407 IIC_SMB_WITHOUT_DATA_LEN, 408 &data->block[1]); 409 } else { 410 ret = slimpro_i2c_blkwr(ctx, addr, command, 411 SMBUS_CMD_LEN, 412 SLIMPRO_IIC_I2C_PROTOCOL, 413 data->block[0], 414 &data->block[1]); 415 } 416 break; 417 default: 418 break; 419 } 420 return ret; 421 } 422 423 /* 424 * Return list of supported functionality. 425 */ 426 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter) 427 { 428 return I2C_FUNC_SMBUS_BYTE | 429 I2C_FUNC_SMBUS_BYTE_DATA | 430 I2C_FUNC_SMBUS_WORD_DATA | 431 I2C_FUNC_SMBUS_BLOCK_DATA | 432 I2C_FUNC_SMBUS_I2C_BLOCK; 433 } 434 435 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = { 436 .smbus_xfer = xgene_slimpro_i2c_xfer, 437 .functionality = xgene_slimpro_i2c_func, 438 }; 439 440 static int xgene_slimpro_i2c_probe(struct platform_device *pdev) 441 { 442 struct slimpro_i2c_dev *ctx; 443 struct i2c_adapter *adapter; 444 struct mbox_client *cl; 445 int rc; 446 447 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); 448 if (!ctx) 449 return -ENOMEM; 450 451 ctx->dev = &pdev->dev; 452 platform_set_drvdata(pdev, ctx); 453 cl = &ctx->mbox_client; 454 455 /* Request mailbox channel */ 456 cl->dev = &pdev->dev; 457 init_completion(&ctx->rd_complete); 458 cl->tx_tout = MAILBOX_OP_TIMEOUT; 459 cl->knows_txdone = false; 460 if (acpi_disabled) { 461 cl->tx_block = true; 462 cl->rx_callback = slimpro_i2c_rx_cb; 463 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX); 464 if (IS_ERR(ctx->mbox_chan)) { 465 dev_err(&pdev->dev, "i2c mailbox channel request failed\n"); 466 return PTR_ERR(ctx->mbox_chan); 467 } 468 } else { 469 struct acpi_pcct_hw_reduced *cppc_ss; 470 const struct acpi_device_id *acpi_id; 471 int version = XGENE_SLIMPRO_I2C_V1; 472 473 acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table, 474 &pdev->dev); 475 if (!acpi_id) 476 return -EINVAL; 477 478 version = (int)acpi_id->driver_data; 479 480 if (device_property_read_u32(&pdev->dev, "pcc-channel", 481 &ctx->mbox_idx)) 482 ctx->mbox_idx = MAILBOX_I2C_INDEX; 483 484 cl->tx_block = false; 485 cl->rx_callback = slimpro_i2c_pcc_rx_cb; 486 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); 487 if (IS_ERR(ctx->mbox_chan)) { 488 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); 489 return PTR_ERR(ctx->mbox_chan); 490 } 491 492 /* 493 * The PCC mailbox controller driver should 494 * have parsed the PCCT (global table of all 495 * PCC channels) and stored pointers to the 496 * subspace communication region in con_priv. 497 */ 498 cppc_ss = ctx->mbox_chan->con_priv; 499 if (!cppc_ss) { 500 dev_err(&pdev->dev, "PPC subspace not found\n"); 501 rc = -ENOENT; 502 goto mbox_err; 503 } 504 505 if (!ctx->mbox_chan->mbox->txdone_irq) { 506 dev_err(&pdev->dev, "PCC IRQ not supported\n"); 507 rc = -ENOENT; 508 goto mbox_err; 509 } 510 511 /* 512 * This is the shared communication region 513 * for the OS and Platform to communicate over. 514 */ 515 ctx->comm_base_addr = cppc_ss->base_address; 516 if (ctx->comm_base_addr) { 517 if (version == XGENE_SLIMPRO_I2C_V2) 518 ctx->pcc_comm_addr = memremap( 519 ctx->comm_base_addr, 520 cppc_ss->length, 521 MEMREMAP_WT); 522 else 523 ctx->pcc_comm_addr = memremap( 524 ctx->comm_base_addr, 525 cppc_ss->length, 526 MEMREMAP_WB); 527 } else { 528 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); 529 rc = -ENOENT; 530 goto mbox_err; 531 } 532 533 if (!ctx->pcc_comm_addr) { 534 dev_err(&pdev->dev, 535 "Failed to ioremap PCC comm region\n"); 536 rc = -ENOMEM; 537 goto mbox_err; 538 } 539 } 540 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 541 if (rc) 542 dev_warn(&pdev->dev, "Unable to set dma mask\n"); 543 544 /* Setup I2C adapter */ 545 adapter = &ctx->adapter; 546 snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C"); 547 adapter->algo = &xgene_slimpro_i2c_algorithm; 548 adapter->class = I2C_CLASS_HWMON; 549 adapter->dev.parent = &pdev->dev; 550 adapter->dev.of_node = pdev->dev.of_node; 551 ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev)); 552 i2c_set_adapdata(adapter, ctx); 553 rc = i2c_add_adapter(adapter); 554 if (rc) 555 goto mbox_err; 556 557 dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n"); 558 return 0; 559 560 mbox_err: 561 if (acpi_disabled) 562 mbox_free_channel(ctx->mbox_chan); 563 else 564 pcc_mbox_free_channel(ctx->mbox_chan); 565 566 return rc; 567 } 568 569 static int xgene_slimpro_i2c_remove(struct platform_device *pdev) 570 { 571 struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev); 572 573 i2c_del_adapter(&ctx->adapter); 574 575 if (acpi_disabled) 576 mbox_free_channel(ctx->mbox_chan); 577 else 578 pcc_mbox_free_channel(ctx->mbox_chan); 579 580 return 0; 581 } 582 583 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = { 584 {.compatible = "apm,xgene-slimpro-i2c" }, 585 {}, 586 }; 587 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids); 588 589 #ifdef CONFIG_ACPI 590 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = { 591 {"APMC0D40", XGENE_SLIMPRO_I2C_V1}, 592 {"APMC0D8B", XGENE_SLIMPRO_I2C_V2}, 593 {} 594 }; 595 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids); 596 #endif 597 598 static struct platform_driver xgene_slimpro_i2c_driver = { 599 .probe = xgene_slimpro_i2c_probe, 600 .remove = xgene_slimpro_i2c_remove, 601 .driver = { 602 .name = "xgene-slimpro-i2c", 603 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids), 604 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids) 605 }, 606 }; 607 608 module_platform_driver(xgene_slimpro_i2c_driver); 609 610 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver"); 611 MODULE_AUTHOR("Feng Kan <fkan@apm.com>"); 612 MODULE_AUTHOR("Hieu Le <hnle@apm.com>"); 613 MODULE_LICENSE("GPL"); 614