1 /* 2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/clk.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/io.h> 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 22 #define UNIPHIER_I2C_DTRM 0x00 /* TX register */ 23 #define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */ 24 #define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */ 25 #define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */ 26 #define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */ 27 #define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */ 28 #define UNIPHIER_I2C_DREC 0x04 /* RX register */ 29 #define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */ 30 #define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */ 31 #define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */ 32 #define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */ 33 #define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */ 34 #define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */ 35 #define UNIPHIER_I2C_MYAD 0x08 /* slave address */ 36 #define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */ 37 #define UNIPHIER_I2C_BRST 0x10 /* bus reset */ 38 #define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */ 39 #define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */ 40 #define UNIPHIER_I2C_HOLD 0x14 /* hold time control */ 41 #define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */ 42 #define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */ 43 #define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */ 44 #define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */ 45 #define UNIPHIER_I2C_SETUP 0x20 /* setup time control */ 46 47 #define UNIPHIER_I2C_DEFAULT_SPEED 100000 48 #define UNIPHIER_I2C_MAX_SPEED 400000 49 50 struct uniphier_i2c_priv { 51 struct completion comp; 52 struct i2c_adapter adap; 53 void __iomem *membase; 54 struct clk *clk; 55 unsigned int busy_cnt; 56 }; 57 58 static irqreturn_t uniphier_i2c_interrupt(int irq, void *dev_id) 59 { 60 struct uniphier_i2c_priv *priv = dev_id; 61 62 /* 63 * This hardware uses edge triggered interrupt. Do not touch the 64 * hardware registers in this handler to make sure to catch the next 65 * interrupt edge. Just send a complete signal and return. 66 */ 67 complete(&priv->comp); 68 69 return IRQ_HANDLED; 70 } 71 72 static int uniphier_i2c_xfer_byte(struct i2c_adapter *adap, u32 txdata, 73 u32 *rxdatap) 74 { 75 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); 76 unsigned long time_left; 77 u32 rxdata; 78 79 reinit_completion(&priv->comp); 80 81 txdata |= UNIPHIER_I2C_DTRM_IRQEN; 82 dev_dbg(&adap->dev, "write data: 0x%04x\n", txdata); 83 writel(txdata, priv->membase + UNIPHIER_I2C_DTRM); 84 85 time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); 86 if (unlikely(!time_left)) { 87 dev_err(&adap->dev, "transaction timeout\n"); 88 return -ETIMEDOUT; 89 } 90 91 rxdata = readl(priv->membase + UNIPHIER_I2C_DREC); 92 dev_dbg(&adap->dev, "read data: 0x%04x\n", rxdata); 93 94 if (rxdatap) 95 *rxdatap = rxdata; 96 97 return 0; 98 } 99 100 static int uniphier_i2c_send_byte(struct i2c_adapter *adap, u32 txdata) 101 { 102 u32 rxdata; 103 int ret; 104 105 ret = uniphier_i2c_xfer_byte(adap, txdata, &rxdata); 106 if (ret) 107 return ret; 108 109 if (unlikely(rxdata & UNIPHIER_I2C_DREC_LAB)) { 110 dev_dbg(&adap->dev, "arbitration lost\n"); 111 return -EAGAIN; 112 } 113 if (unlikely(rxdata & UNIPHIER_I2C_DREC_LRB)) { 114 dev_dbg(&adap->dev, "could not get ACK\n"); 115 return -ENXIO; 116 } 117 118 return 0; 119 } 120 121 static int uniphier_i2c_tx(struct i2c_adapter *adap, u16 addr, u16 len, 122 const u8 *buf) 123 { 124 int ret; 125 126 dev_dbg(&adap->dev, "start condition\n"); 127 ret = uniphier_i2c_send_byte(adap, addr << 1 | 128 UNIPHIER_I2C_DTRM_STA | 129 UNIPHIER_I2C_DTRM_NACK); 130 if (ret) 131 return ret; 132 133 while (len--) { 134 ret = uniphier_i2c_send_byte(adap, 135 UNIPHIER_I2C_DTRM_NACK | *buf++); 136 if (ret) 137 return ret; 138 } 139 140 return 0; 141 } 142 143 static int uniphier_i2c_rx(struct i2c_adapter *adap, u16 addr, u16 len, 144 u8 *buf) 145 { 146 int ret; 147 148 dev_dbg(&adap->dev, "start condition\n"); 149 ret = uniphier_i2c_send_byte(adap, addr << 1 | 150 UNIPHIER_I2C_DTRM_STA | 151 UNIPHIER_I2C_DTRM_NACK | 152 UNIPHIER_I2C_DTRM_RD); 153 if (ret) 154 return ret; 155 156 while (len--) { 157 u32 rxdata; 158 159 ret = uniphier_i2c_xfer_byte(adap, 160 len ? 0 : UNIPHIER_I2C_DTRM_NACK, 161 &rxdata); 162 if (ret) 163 return ret; 164 *buf++ = rxdata; 165 } 166 167 return 0; 168 } 169 170 static int uniphier_i2c_stop(struct i2c_adapter *adap) 171 { 172 dev_dbg(&adap->dev, "stop condition\n"); 173 return uniphier_i2c_send_byte(adap, UNIPHIER_I2C_DTRM_STO | 174 UNIPHIER_I2C_DTRM_NACK); 175 } 176 177 static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap, 178 struct i2c_msg *msg, bool stop) 179 { 180 bool is_read = msg->flags & I2C_M_RD; 181 bool recovery = false; 182 int ret; 183 184 dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", 185 is_read ? "receive" : "transmit", msg->addr, msg->len, stop); 186 187 if (is_read) 188 ret = uniphier_i2c_rx(adap, msg->addr, msg->len, msg->buf); 189 else 190 ret = uniphier_i2c_tx(adap, msg->addr, msg->len, msg->buf); 191 192 if (ret == -EAGAIN) /* could not acquire bus. bail out without STOP */ 193 return ret; 194 195 if (ret == -ETIMEDOUT) { 196 /* This error is fatal. Needs recovery. */ 197 stop = false; 198 recovery = true; 199 } 200 201 if (stop) { 202 int ret2 = uniphier_i2c_stop(adap); 203 204 if (ret2) { 205 /* Failed to issue STOP. The bus needs recovery. */ 206 recovery = true; 207 ret = ret ?: ret2; 208 } 209 } 210 211 if (recovery) 212 i2c_recover_bus(adap); 213 214 return ret; 215 } 216 217 static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap) 218 { 219 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); 220 221 if (!(readl(priv->membase + UNIPHIER_I2C_DREC) & 222 UNIPHIER_I2C_DREC_BBN)) { 223 if (priv->busy_cnt++ > 3) { 224 /* 225 * If bus busy continues too long, it is probably 226 * in a wrong state. Try bus recovery. 227 */ 228 i2c_recover_bus(adap); 229 priv->busy_cnt = 0; 230 } 231 232 return -EAGAIN; 233 } 234 235 priv->busy_cnt = 0; 236 return 0; 237 } 238 239 static int uniphier_i2c_master_xfer(struct i2c_adapter *adap, 240 struct i2c_msg *msgs, int num) 241 { 242 struct i2c_msg *msg, *emsg = msgs + num; 243 int ret; 244 245 ret = uniphier_i2c_check_bus_busy(adap); 246 if (ret) 247 return ret; 248 249 for (msg = msgs; msg < emsg; msg++) { 250 /* If next message is read, skip the stop condition */ 251 bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD); 252 /* but, force it if I2C_M_STOP is set */ 253 if (msg->flags & I2C_M_STOP) 254 stop = true; 255 256 ret = uniphier_i2c_master_xfer_one(adap, msg, stop); 257 if (ret) 258 return ret; 259 } 260 261 return num; 262 } 263 264 static u32 uniphier_i2c_functionality(struct i2c_adapter *adap) 265 { 266 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 267 } 268 269 static const struct i2c_algorithm uniphier_i2c_algo = { 270 .master_xfer = uniphier_i2c_master_xfer, 271 .functionality = uniphier_i2c_functionality, 272 }; 273 274 static void uniphier_i2c_reset(struct uniphier_i2c_priv *priv, bool reset_on) 275 { 276 u32 val = UNIPHIER_I2C_BRST_RSCL; 277 278 val |= reset_on ? 0 : UNIPHIER_I2C_BRST_FOEN; 279 writel(val, priv->membase + UNIPHIER_I2C_BRST); 280 } 281 282 static int uniphier_i2c_get_scl(struct i2c_adapter *adap) 283 { 284 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); 285 286 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & 287 UNIPHIER_I2C_BSTS_SCL); 288 } 289 290 static void uniphier_i2c_set_scl(struct i2c_adapter *adap, int val) 291 { 292 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); 293 294 writel(val ? UNIPHIER_I2C_BRST_RSCL : 0, 295 priv->membase + UNIPHIER_I2C_BRST); 296 } 297 298 static int uniphier_i2c_get_sda(struct i2c_adapter *adap) 299 { 300 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); 301 302 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & 303 UNIPHIER_I2C_BSTS_SDA); 304 } 305 306 static void uniphier_i2c_unprepare_recovery(struct i2c_adapter *adap) 307 { 308 uniphier_i2c_reset(i2c_get_adapdata(adap), false); 309 } 310 311 static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info = { 312 .recover_bus = i2c_generic_scl_recovery, 313 .get_scl = uniphier_i2c_get_scl, 314 .set_scl = uniphier_i2c_set_scl, 315 .get_sda = uniphier_i2c_get_sda, 316 .unprepare_recovery = uniphier_i2c_unprepare_recovery, 317 }; 318 319 static void uniphier_i2c_hw_init(struct uniphier_i2c_priv *priv, 320 u32 bus_speed, unsigned long clk_rate) 321 { 322 uniphier_i2c_reset(priv, true); 323 324 writel((clk_rate / bus_speed / 2 << 16) | (clk_rate / bus_speed), 325 priv->membase + UNIPHIER_I2C_CLK); 326 327 uniphier_i2c_reset(priv, false); 328 } 329 330 static int uniphier_i2c_probe(struct platform_device *pdev) 331 { 332 struct device *dev = &pdev->dev; 333 struct uniphier_i2c_priv *priv; 334 struct resource *regs; 335 u32 bus_speed; 336 unsigned long clk_rate; 337 int irq, ret; 338 339 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 340 if (!priv) 341 return -ENOMEM; 342 343 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 344 priv->membase = devm_ioremap_resource(dev, regs); 345 if (IS_ERR(priv->membase)) 346 return PTR_ERR(priv->membase); 347 348 irq = platform_get_irq(pdev, 0); 349 if (irq < 0) { 350 dev_err(dev, "failed to get IRQ number\n"); 351 return irq; 352 } 353 354 if (of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed)) 355 bus_speed = UNIPHIER_I2C_DEFAULT_SPEED; 356 357 if (!bus_speed || bus_speed > UNIPHIER_I2C_MAX_SPEED) { 358 dev_err(dev, "invalid clock-frequency %d\n", bus_speed); 359 return -EINVAL; 360 } 361 362 priv->clk = devm_clk_get(dev, NULL); 363 if (IS_ERR(priv->clk)) { 364 dev_err(dev, "failed to get clock\n"); 365 return PTR_ERR(priv->clk); 366 } 367 368 ret = clk_prepare_enable(priv->clk); 369 if (ret) 370 return ret; 371 372 clk_rate = clk_get_rate(priv->clk); 373 if (!clk_rate) { 374 dev_err(dev, "input clock rate should not be zero\n"); 375 ret = -EINVAL; 376 goto err; 377 } 378 379 init_completion(&priv->comp); 380 priv->adap.owner = THIS_MODULE; 381 priv->adap.algo = &uniphier_i2c_algo; 382 priv->adap.dev.parent = dev; 383 priv->adap.dev.of_node = dev->of_node; 384 strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name)); 385 priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info; 386 i2c_set_adapdata(&priv->adap, priv); 387 platform_set_drvdata(pdev, priv); 388 389 uniphier_i2c_hw_init(priv, bus_speed, clk_rate); 390 391 ret = devm_request_irq(dev, irq, uniphier_i2c_interrupt, 0, pdev->name, 392 priv); 393 if (ret) { 394 dev_err(dev, "failed to request irq %d\n", irq); 395 goto err; 396 } 397 398 ret = i2c_add_adapter(&priv->adap); 399 err: 400 if (ret) 401 clk_disable_unprepare(priv->clk); 402 403 return ret; 404 } 405 406 static int uniphier_i2c_remove(struct platform_device *pdev) 407 { 408 struct uniphier_i2c_priv *priv = platform_get_drvdata(pdev); 409 410 i2c_del_adapter(&priv->adap); 411 clk_disable_unprepare(priv->clk); 412 413 return 0; 414 } 415 416 static const struct of_device_id uniphier_i2c_match[] = { 417 { .compatible = "socionext,uniphier-i2c" }, 418 { /* sentinel */ } 419 }; 420 MODULE_DEVICE_TABLE(of, uniphier_i2c_match); 421 422 static struct platform_driver uniphier_i2c_drv = { 423 .probe = uniphier_i2c_probe, 424 .remove = uniphier_i2c_remove, 425 .driver = { 426 .name = "uniphier-i2c", 427 .of_match_table = uniphier_i2c_match, 428 }, 429 }; 430 module_platform_driver(uniphier_i2c_drv); 431 432 MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); 433 MODULE_DESCRIPTION("UniPhier I2C bus driver"); 434 MODULE_LICENSE("GPL"); 435