1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/i2c.h>
8 #include <linux/interrupt.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 
13 #define UNIPHIER_I2C_DTRM	0x00	/* TX register */
14 #define     UNIPHIER_I2C_DTRM_IRQEN	BIT(11)	/* enable interrupt */
15 #define     UNIPHIER_I2C_DTRM_STA	BIT(10)	/* start condition */
16 #define     UNIPHIER_I2C_DTRM_STO	BIT(9)	/* stop condition */
17 #define     UNIPHIER_I2C_DTRM_NACK	BIT(8)	/* do not return ACK */
18 #define     UNIPHIER_I2C_DTRM_RD	BIT(0)	/* read transaction */
19 #define UNIPHIER_I2C_DREC	0x04	/* RX register */
20 #define     UNIPHIER_I2C_DREC_MST	BIT(14)	/* 1 = master, 0 = slave */
21 #define     UNIPHIER_I2C_DREC_TX	BIT(13)	/* 1 = transmit, 0 = receive */
22 #define     UNIPHIER_I2C_DREC_STS	BIT(12)	/* stop condition detected */
23 #define     UNIPHIER_I2C_DREC_LRB	BIT(11)	/* no ACK */
24 #define     UNIPHIER_I2C_DREC_LAB	BIT(9)	/* arbitration lost */
25 #define     UNIPHIER_I2C_DREC_BBN	BIT(8)	/* bus not busy */
26 #define UNIPHIER_I2C_MYAD	0x08	/* slave address */
27 #define UNIPHIER_I2C_CLK	0x0c	/* clock frequency control */
28 #define UNIPHIER_I2C_BRST	0x10	/* bus reset */
29 #define     UNIPHIER_I2C_BRST_FOEN	BIT(1)	/* normal operation */
30 #define     UNIPHIER_I2C_BRST_RSCL	BIT(0)	/* release SCL */
31 #define UNIPHIER_I2C_HOLD	0x14	/* hold time control */
32 #define UNIPHIER_I2C_BSTS	0x18	/* bus status monitor */
33 #define     UNIPHIER_I2C_BSTS_SDA	BIT(1)	/* readback of SDA line */
34 #define     UNIPHIER_I2C_BSTS_SCL	BIT(0)	/* readback of SCL line */
35 #define UNIPHIER_I2C_NOISE	0x1c	/* noise filter control */
36 #define UNIPHIER_I2C_SETUP	0x20	/* setup time control */
37 
38 #define UNIPHIER_I2C_DEFAULT_SPEED	100000
39 #define UNIPHIER_I2C_MAX_SPEED		400000
40 
41 struct uniphier_i2c_priv {
42 	struct completion comp;
43 	struct i2c_adapter adap;
44 	void __iomem *membase;
45 	struct clk *clk;
46 	unsigned int busy_cnt;
47 	unsigned int clk_cycle;
48 };
49 
50 static irqreturn_t uniphier_i2c_interrupt(int irq, void *dev_id)
51 {
52 	struct uniphier_i2c_priv *priv = dev_id;
53 
54 	/*
55 	 * This hardware uses edge triggered interrupt.  Do not touch the
56 	 * hardware registers in this handler to make sure to catch the next
57 	 * interrupt edge.  Just send a complete signal and return.
58 	 */
59 	complete(&priv->comp);
60 
61 	return IRQ_HANDLED;
62 }
63 
64 static int uniphier_i2c_xfer_byte(struct i2c_adapter *adap, u32 txdata,
65 				  u32 *rxdatap)
66 {
67 	struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
68 	unsigned long time_left;
69 	u32 rxdata;
70 
71 	reinit_completion(&priv->comp);
72 
73 	txdata |= UNIPHIER_I2C_DTRM_IRQEN;
74 	dev_dbg(&adap->dev, "write data: 0x%04x\n", txdata);
75 	writel(txdata, priv->membase + UNIPHIER_I2C_DTRM);
76 
77 	time_left = wait_for_completion_timeout(&priv->comp, adap->timeout);
78 	if (unlikely(!time_left)) {
79 		dev_err(&adap->dev, "transaction timeout\n");
80 		return -ETIMEDOUT;
81 	}
82 
83 	rxdata = readl(priv->membase + UNIPHIER_I2C_DREC);
84 	dev_dbg(&adap->dev, "read data: 0x%04x\n", rxdata);
85 
86 	if (rxdatap)
87 		*rxdatap = rxdata;
88 
89 	return 0;
90 }
91 
92 static int uniphier_i2c_send_byte(struct i2c_adapter *adap, u32 txdata)
93 {
94 	u32 rxdata;
95 	int ret;
96 
97 	ret = uniphier_i2c_xfer_byte(adap, txdata, &rxdata);
98 	if (ret)
99 		return ret;
100 
101 	if (unlikely(rxdata & UNIPHIER_I2C_DREC_LAB)) {
102 		dev_dbg(&adap->dev, "arbitration lost\n");
103 		return -EAGAIN;
104 	}
105 	if (unlikely(rxdata & UNIPHIER_I2C_DREC_LRB)) {
106 		dev_dbg(&adap->dev, "could not get ACK\n");
107 		return -ENXIO;
108 	}
109 
110 	return 0;
111 }
112 
113 static int uniphier_i2c_tx(struct i2c_adapter *adap, u16 addr, u16 len,
114 			   const u8 *buf)
115 {
116 	int ret;
117 
118 	dev_dbg(&adap->dev, "start condition\n");
119 	ret = uniphier_i2c_send_byte(adap, addr << 1 |
120 				     UNIPHIER_I2C_DTRM_STA |
121 				     UNIPHIER_I2C_DTRM_NACK);
122 	if (ret)
123 		return ret;
124 
125 	while (len--) {
126 		ret = uniphier_i2c_send_byte(adap,
127 					     UNIPHIER_I2C_DTRM_NACK | *buf++);
128 		if (ret)
129 			return ret;
130 	}
131 
132 	return 0;
133 }
134 
135 static int uniphier_i2c_rx(struct i2c_adapter *adap, u16 addr, u16 len,
136 			   u8 *buf)
137 {
138 	int ret;
139 
140 	dev_dbg(&adap->dev, "start condition\n");
141 	ret = uniphier_i2c_send_byte(adap, addr << 1 |
142 				     UNIPHIER_I2C_DTRM_STA |
143 				     UNIPHIER_I2C_DTRM_NACK |
144 				     UNIPHIER_I2C_DTRM_RD);
145 	if (ret)
146 		return ret;
147 
148 	while (len--) {
149 		u32 rxdata;
150 
151 		ret = uniphier_i2c_xfer_byte(adap,
152 					     len ? 0 : UNIPHIER_I2C_DTRM_NACK,
153 					     &rxdata);
154 		if (ret)
155 			return ret;
156 		*buf++ = rxdata;
157 	}
158 
159 	return 0;
160 }
161 
162 static int uniphier_i2c_stop(struct i2c_adapter *adap)
163 {
164 	dev_dbg(&adap->dev, "stop condition\n");
165 	return uniphier_i2c_send_byte(adap, UNIPHIER_I2C_DTRM_STO |
166 				      UNIPHIER_I2C_DTRM_NACK);
167 }
168 
169 static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap,
170 					struct i2c_msg *msg, bool stop)
171 {
172 	bool is_read = msg->flags & I2C_M_RD;
173 	bool recovery = false;
174 	int ret;
175 
176 	dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n",
177 		is_read ? "receive" : "transmit", msg->addr, msg->len, stop);
178 
179 	if (is_read)
180 		ret = uniphier_i2c_rx(adap, msg->addr, msg->len, msg->buf);
181 	else
182 		ret = uniphier_i2c_tx(adap, msg->addr, msg->len, msg->buf);
183 
184 	if (ret == -EAGAIN) /* could not acquire bus. bail out without STOP */
185 		return ret;
186 
187 	if (ret == -ETIMEDOUT) {
188 		/* This error is fatal.  Needs recovery. */
189 		stop = false;
190 		recovery = true;
191 	}
192 
193 	if (stop) {
194 		int ret2 = uniphier_i2c_stop(adap);
195 
196 		if (ret2) {
197 			/* Failed to issue STOP.  The bus needs recovery. */
198 			recovery = true;
199 			ret = ret ?: ret2;
200 		}
201 	}
202 
203 	if (recovery)
204 		i2c_recover_bus(adap);
205 
206 	return ret;
207 }
208 
209 static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap)
210 {
211 	struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
212 
213 	if (!(readl(priv->membase + UNIPHIER_I2C_DREC) &
214 						UNIPHIER_I2C_DREC_BBN)) {
215 		if (priv->busy_cnt++ > 3) {
216 			/*
217 			 * If bus busy continues too long, it is probably
218 			 * in a wrong state.  Try bus recovery.
219 			 */
220 			i2c_recover_bus(adap);
221 			priv->busy_cnt = 0;
222 		}
223 
224 		return -EAGAIN;
225 	}
226 
227 	priv->busy_cnt = 0;
228 	return 0;
229 }
230 
231 static int uniphier_i2c_master_xfer(struct i2c_adapter *adap,
232 				    struct i2c_msg *msgs, int num)
233 {
234 	struct i2c_msg *msg, *emsg = msgs + num;
235 	int ret;
236 
237 	ret = uniphier_i2c_check_bus_busy(adap);
238 	if (ret)
239 		return ret;
240 
241 	for (msg = msgs; msg < emsg; msg++) {
242 		/* Emit STOP if it is the last message or I2C_M_STOP is set. */
243 		bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
244 
245 		ret = uniphier_i2c_master_xfer_one(adap, msg, stop);
246 		if (ret)
247 			return ret;
248 	}
249 
250 	return num;
251 }
252 
253 static u32 uniphier_i2c_functionality(struct i2c_adapter *adap)
254 {
255 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
256 }
257 
258 static const struct i2c_algorithm uniphier_i2c_algo = {
259 	.master_xfer = uniphier_i2c_master_xfer,
260 	.functionality = uniphier_i2c_functionality,
261 };
262 
263 static void uniphier_i2c_reset(struct uniphier_i2c_priv *priv, bool reset_on)
264 {
265 	u32 val = UNIPHIER_I2C_BRST_RSCL;
266 
267 	val |= reset_on ? 0 : UNIPHIER_I2C_BRST_FOEN;
268 	writel(val, priv->membase + UNIPHIER_I2C_BRST);
269 }
270 
271 static int uniphier_i2c_get_scl(struct i2c_adapter *adap)
272 {
273 	struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
274 
275 	return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
276 							UNIPHIER_I2C_BSTS_SCL);
277 }
278 
279 static void uniphier_i2c_set_scl(struct i2c_adapter *adap, int val)
280 {
281 	struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
282 
283 	writel(val ? UNIPHIER_I2C_BRST_RSCL : 0,
284 	       priv->membase + UNIPHIER_I2C_BRST);
285 }
286 
287 static int uniphier_i2c_get_sda(struct i2c_adapter *adap)
288 {
289 	struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
290 
291 	return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
292 							UNIPHIER_I2C_BSTS_SDA);
293 }
294 
295 static void uniphier_i2c_unprepare_recovery(struct i2c_adapter *adap)
296 {
297 	uniphier_i2c_reset(i2c_get_adapdata(adap), false);
298 }
299 
300 static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info = {
301 	.recover_bus = i2c_generic_scl_recovery,
302 	.get_scl = uniphier_i2c_get_scl,
303 	.set_scl = uniphier_i2c_set_scl,
304 	.get_sda = uniphier_i2c_get_sda,
305 	.unprepare_recovery = uniphier_i2c_unprepare_recovery,
306 };
307 
308 static void uniphier_i2c_hw_init(struct uniphier_i2c_priv *priv)
309 {
310 	unsigned int cyc = priv->clk_cycle;
311 
312 	uniphier_i2c_reset(priv, true);
313 
314 	/*
315 	 * Bit30-16: clock cycles of tLOW.
316 	 *  Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us
317 	 *  Fast-mode:     tLOW = 1.3 us, tHIGH = 0.6 us
318 	 * "tLow/tHIGH = 5/4" meets both.
319 	 */
320 	writel((cyc * 5 / 9 << 16) | cyc, priv->membase + UNIPHIER_I2C_CLK);
321 
322 	uniphier_i2c_reset(priv, false);
323 }
324 
325 static int uniphier_i2c_probe(struct platform_device *pdev)
326 {
327 	struct device *dev = &pdev->dev;
328 	struct uniphier_i2c_priv *priv;
329 	struct resource *regs;
330 	u32 bus_speed;
331 	unsigned long clk_rate;
332 	int irq, ret;
333 
334 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
335 	if (!priv)
336 		return -ENOMEM;
337 
338 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
339 	priv->membase = devm_ioremap_resource(dev, regs);
340 	if (IS_ERR(priv->membase))
341 		return PTR_ERR(priv->membase);
342 
343 	irq = platform_get_irq(pdev, 0);
344 	if (irq < 0) {
345 		dev_err(dev, "failed to get IRQ number\n");
346 		return irq;
347 	}
348 
349 	if (of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed))
350 		bus_speed = UNIPHIER_I2C_DEFAULT_SPEED;
351 
352 	if (!bus_speed || bus_speed > UNIPHIER_I2C_MAX_SPEED) {
353 		dev_err(dev, "invalid clock-frequency %d\n", bus_speed);
354 		return -EINVAL;
355 	}
356 
357 	priv->clk = devm_clk_get(dev, NULL);
358 	if (IS_ERR(priv->clk)) {
359 		dev_err(dev, "failed to get clock\n");
360 		return PTR_ERR(priv->clk);
361 	}
362 
363 	ret = clk_prepare_enable(priv->clk);
364 	if (ret)
365 		return ret;
366 
367 	clk_rate = clk_get_rate(priv->clk);
368 	if (!clk_rate) {
369 		dev_err(dev, "input clock rate should not be zero\n");
370 		ret = -EINVAL;
371 		goto disable_clk;
372 	}
373 
374 	priv->clk_cycle = clk_rate / bus_speed;
375 	init_completion(&priv->comp);
376 	priv->adap.owner = THIS_MODULE;
377 	priv->adap.algo = &uniphier_i2c_algo;
378 	priv->adap.dev.parent = dev;
379 	priv->adap.dev.of_node = dev->of_node;
380 	strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name));
381 	priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info;
382 	i2c_set_adapdata(&priv->adap, priv);
383 	platform_set_drvdata(pdev, priv);
384 
385 	uniphier_i2c_hw_init(priv);
386 
387 	ret = devm_request_irq(dev, irq, uniphier_i2c_interrupt, 0, pdev->name,
388 			       priv);
389 	if (ret) {
390 		dev_err(dev, "failed to request irq %d\n", irq);
391 		goto disable_clk;
392 	}
393 
394 	ret = i2c_add_adapter(&priv->adap);
395 disable_clk:
396 	if (ret)
397 		clk_disable_unprepare(priv->clk);
398 
399 	return ret;
400 }
401 
402 static int uniphier_i2c_remove(struct platform_device *pdev)
403 {
404 	struct uniphier_i2c_priv *priv = platform_get_drvdata(pdev);
405 
406 	i2c_del_adapter(&priv->adap);
407 	clk_disable_unprepare(priv->clk);
408 
409 	return 0;
410 }
411 
412 static int __maybe_unused uniphier_i2c_suspend(struct device *dev)
413 {
414 	struct uniphier_i2c_priv *priv = dev_get_drvdata(dev);
415 
416 	clk_disable_unprepare(priv->clk);
417 
418 	return 0;
419 }
420 
421 static int __maybe_unused uniphier_i2c_resume(struct device *dev)
422 {
423 	struct uniphier_i2c_priv *priv = dev_get_drvdata(dev);
424 	int ret;
425 
426 	ret = clk_prepare_enable(priv->clk);
427 	if (ret)
428 		return ret;
429 
430 	uniphier_i2c_hw_init(priv);
431 
432 	return 0;
433 }
434 
435 static const struct dev_pm_ops uniphier_i2c_pm_ops = {
436 	SET_SYSTEM_SLEEP_PM_OPS(uniphier_i2c_suspend, uniphier_i2c_resume)
437 };
438 
439 static const struct of_device_id uniphier_i2c_match[] = {
440 	{ .compatible = "socionext,uniphier-i2c" },
441 	{ /* sentinel */ }
442 };
443 MODULE_DEVICE_TABLE(of, uniphier_i2c_match);
444 
445 static struct platform_driver uniphier_i2c_drv = {
446 	.probe  = uniphier_i2c_probe,
447 	.remove = uniphier_i2c_remove,
448 	.driver = {
449 		.name  = "uniphier-i2c",
450 		.of_match_table = uniphier_i2c_match,
451 		.pm = &uniphier_i2c_pm_ops,
452 	},
453 };
454 module_platform_driver(uniphier_i2c_drv);
455 
456 MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
457 MODULE_DESCRIPTION("UniPhier I2C bus driver");
458 MODULE_LICENSE("GPL");
459