1 /* 2 * Cavium ThunderX i2c driver. 3 * 4 * Copyright (C) 2015,2016 Cavium Inc. 5 * Authors: Fred Martin <fmartin@caviumnetworks.com> 6 * Jan Glauber <jglauber@cavium.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13 #include <linux/acpi.h> 14 #include <linux/clk.h> 15 #include <linux/delay.h> 16 #include <linux/i2c.h> 17 #include <linux/i2c-smbus.h> 18 #include <linux/interrupt.h> 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/of_irq.h> 22 #include <linux/pci.h> 23 24 #include "i2c-octeon-core.h" 25 26 #define DRV_NAME "i2c-thunderx" 27 28 #define PCI_DEVICE_ID_THUNDER_TWSI 0xa012 29 30 #define SYS_FREQ_DEFAULT 700000000 31 32 #define TWSI_INT_ENA_W1C 0x1028 33 #define TWSI_INT_ENA_W1S 0x1030 34 35 /* 36 * Enable the CORE interrupt. 37 * The interrupt will be asserted when there is non-STAT_IDLE state in the 38 * SW_TWSI_EOP_TWSI_STAT register. 39 */ 40 static void thunder_i2c_int_enable(struct octeon_i2c *i2c) 41 { 42 octeon_i2c_writeq_flush(TWSI_INT_CORE_INT, 43 i2c->twsi_base + TWSI_INT_ENA_W1S); 44 } 45 46 /* 47 * Disable the CORE interrupt. 48 */ 49 static void thunder_i2c_int_disable(struct octeon_i2c *i2c) 50 { 51 octeon_i2c_writeq_flush(TWSI_INT_CORE_INT, 52 i2c->twsi_base + TWSI_INT_ENA_W1C); 53 } 54 55 static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c) 56 { 57 octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT, 58 i2c->twsi_base + TWSI_INT_ENA_W1S); 59 } 60 61 static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c) 62 { 63 octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT, 64 i2c->twsi_base + TWSI_INT_ENA_W1C); 65 } 66 67 static u32 thunderx_i2c_functionality(struct i2c_adapter *adap) 68 { 69 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) | 70 I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_SMBUS_BLOCK_PROC_CALL; 71 } 72 73 static const struct i2c_algorithm thunderx_i2c_algo = { 74 .master_xfer = octeon_i2c_xfer, 75 .functionality = thunderx_i2c_functionality, 76 }; 77 78 static const struct i2c_adapter thunderx_i2c_ops = { 79 .owner = THIS_MODULE, 80 .name = "ThunderX adapter", 81 .algo = &thunderx_i2c_algo, 82 }; 83 84 static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c) 85 { 86 int ret; 87 88 if (acpi_disabled) { 89 /* DT */ 90 i2c->clk = clk_get(dev, NULL); 91 if (IS_ERR(i2c->clk)) { 92 i2c->clk = NULL; 93 goto skip; 94 } 95 96 ret = clk_prepare_enable(i2c->clk); 97 if (ret) 98 goto skip; 99 i2c->sys_freq = clk_get_rate(i2c->clk); 100 } else { 101 /* ACPI */ 102 device_property_read_u32(dev, "sclk", &i2c->sys_freq); 103 } 104 105 skip: 106 if (!i2c->sys_freq) 107 i2c->sys_freq = SYS_FREQ_DEFAULT; 108 } 109 110 static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk) 111 { 112 if (!clk) 113 return; 114 clk_disable_unprepare(clk); 115 clk_put(clk); 116 } 117 118 static int thunder_i2c_smbus_setup_of(struct octeon_i2c *i2c, 119 struct device_node *node) 120 { 121 u32 type; 122 123 if (!node) 124 return -EINVAL; 125 126 i2c->alert_data.irq = irq_of_parse_and_map(node, 0); 127 if (!i2c->alert_data.irq) 128 return -EINVAL; 129 130 type = irqd_get_trigger_type(irq_get_irq_data(i2c->alert_data.irq)); 131 i2c->alert_data.alert_edge_triggered = 132 (type & IRQ_TYPE_LEVEL_MASK) ? 1 : 0; 133 134 i2c->ara = i2c_setup_smbus_alert(&i2c->adap, &i2c->alert_data); 135 if (!i2c->ara) 136 return -ENODEV; 137 return 0; 138 } 139 140 static int thunder_i2c_smbus_setup(struct octeon_i2c *i2c, 141 struct device_node *node) 142 { 143 /* TODO: ACPI support */ 144 if (!acpi_disabled) 145 return -EOPNOTSUPP; 146 147 return thunder_i2c_smbus_setup_of(i2c, node); 148 } 149 150 static void thunder_i2c_smbus_remove(struct octeon_i2c *i2c) 151 { 152 if (i2c->ara) 153 i2c_unregister_device(i2c->ara); 154 } 155 156 static int thunder_i2c_probe_pci(struct pci_dev *pdev, 157 const struct pci_device_id *ent) 158 { 159 struct device *dev = &pdev->dev; 160 struct octeon_i2c *i2c; 161 int ret; 162 163 i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL); 164 if (!i2c) 165 return -ENOMEM; 166 167 i2c->roff.sw_twsi = 0x1000; 168 i2c->roff.twsi_int = 0x1010; 169 i2c->roff.sw_twsi_ext = 0x1018; 170 171 i2c->dev = dev; 172 pci_set_drvdata(pdev, i2c); 173 ret = pcim_enable_device(pdev); 174 if (ret) 175 return ret; 176 177 ret = pci_request_regions(pdev, DRV_NAME); 178 if (ret) 179 return ret; 180 181 i2c->twsi_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0)); 182 if (!i2c->twsi_base) 183 return -EINVAL; 184 185 thunder_i2c_clock_enable(dev, i2c); 186 ret = device_property_read_u32(dev, "clock-frequency", &i2c->twsi_freq); 187 if (ret) 188 i2c->twsi_freq = 100000; 189 190 init_waitqueue_head(&i2c->queue); 191 192 i2c->int_enable = thunder_i2c_int_enable; 193 i2c->int_disable = thunder_i2c_int_disable; 194 i2c->hlc_int_enable = thunder_i2c_hlc_int_enable; 195 i2c->hlc_int_disable = thunder_i2c_hlc_int_disable; 196 197 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX); 198 if (ret < 0) 199 goto error; 200 201 ret = devm_request_irq(dev, pci_irq_vector(pdev, 0), octeon_i2c_isr, 0, 202 DRV_NAME, i2c); 203 if (ret) 204 goto error; 205 206 ret = octeon_i2c_init_lowlevel(i2c); 207 if (ret) 208 goto error; 209 210 octeon_i2c_set_clock(i2c); 211 212 i2c->adap = thunderx_i2c_ops; 213 i2c->adap.retries = 5; 214 i2c->adap.class = I2C_CLASS_HWMON; 215 i2c->adap.bus_recovery_info = &octeon_i2c_recovery_info; 216 i2c->adap.dev.parent = dev; 217 i2c->adap.dev.of_node = pdev->dev.of_node; 218 snprintf(i2c->adap.name, sizeof(i2c->adap.name), 219 "Cavium ThunderX i2c adapter at %s", dev_name(dev)); 220 i2c_set_adapdata(&i2c->adap, i2c); 221 222 ret = i2c_add_adapter(&i2c->adap); 223 if (ret) 224 goto error; 225 226 dev_info(i2c->dev, "Probed. Set system clock to %u\n", i2c->sys_freq); 227 228 ret = thunder_i2c_smbus_setup(i2c, pdev->dev.of_node); 229 if (ret) 230 dev_info(dev, "SMBUS alert not active on this bus\n"); 231 232 return 0; 233 234 error: 235 thunder_i2c_clock_disable(dev, i2c->clk); 236 return ret; 237 } 238 239 static void thunder_i2c_remove_pci(struct pci_dev *pdev) 240 { 241 struct octeon_i2c *i2c = pci_get_drvdata(pdev); 242 243 thunder_i2c_smbus_remove(i2c); 244 thunder_i2c_clock_disable(&pdev->dev, i2c->clk); 245 i2c_del_adapter(&i2c->adap); 246 } 247 248 static const struct pci_device_id thunder_i2c_pci_id_table[] = { 249 { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_TWSI) }, 250 { 0, } 251 }; 252 253 MODULE_DEVICE_TABLE(pci, thunder_i2c_pci_id_table); 254 255 static struct pci_driver thunder_i2c_pci_driver = { 256 .name = DRV_NAME, 257 .id_table = thunder_i2c_pci_id_table, 258 .probe = thunder_i2c_probe_pci, 259 .remove = thunder_i2c_remove_pci, 260 }; 261 262 module_pci_driver(thunder_i2c_pci_driver); 263 264 MODULE_LICENSE("GPL"); 265 MODULE_AUTHOR("Fred Martin <fmartin@caviumnetworks.com>"); 266 MODULE_DESCRIPTION("I2C-Bus adapter for Cavium ThunderX SOC"); 267