1 /* 2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com> 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 /* 23 This module must be considered BETA unless and until 24 the chipset manufacturer releases a datasheet. 25 The register definitions are based on the SiS630. 26 27 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c) 28 for just about every machine for which users have reported. 29 If this module isn't detecting your 96x south bridge, have a 30 look there. 31 32 We assume there can only be one SiS96x with one SMBus interface. 33 */ 34 35 #include <linux/module.h> 36 #include <linux/pci.h> 37 #include <linux/kernel.h> 38 #include <linux/delay.h> 39 #include <linux/stddef.h> 40 #include <linux/ioport.h> 41 #include <linux/i2c.h> 42 #include <linux/init.h> 43 #include <asm/io.h> 44 45 /* base address register in PCI config space */ 46 #define SIS96x_BAR 0x04 47 48 /* SiS96x SMBus registers */ 49 #define SMB_STS 0x00 50 #define SMB_EN 0x01 51 #define SMB_CNT 0x02 52 #define SMB_HOST_CNT 0x03 53 #define SMB_ADDR 0x04 54 #define SMB_CMD 0x05 55 #define SMB_PCOUNT 0x06 56 #define SMB_COUNT 0x07 57 #define SMB_BYTE 0x08 58 #define SMB_DEV_ADDR 0x10 59 #define SMB_DB0 0x11 60 #define SMB_DB1 0x12 61 #define SMB_SAA 0x13 62 63 /* register count for request_region */ 64 #define SMB_IOSIZE 0x20 65 66 /* Other settings */ 67 #define MAX_TIMEOUT 500 68 69 /* SiS96x SMBus constants */ 70 #define SIS96x_QUICK 0x00 71 #define SIS96x_BYTE 0x01 72 #define SIS96x_BYTE_DATA 0x02 73 #define SIS96x_WORD_DATA 0x03 74 #define SIS96x_PROC_CALL 0x04 75 #define SIS96x_BLOCK_DATA 0x05 76 77 static struct pci_driver sis96x_driver; 78 static struct i2c_adapter sis96x_adapter; 79 static u16 sis96x_smbus_base; 80 81 static inline u8 sis96x_read(u8 reg) 82 { 83 return inb(sis96x_smbus_base + reg) ; 84 } 85 86 static inline void sis96x_write(u8 reg, u8 data) 87 { 88 outb(data, sis96x_smbus_base + reg) ; 89 } 90 91 /* Execute a SMBus transaction. 92 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA 93 */ 94 static int sis96x_transaction(int size) 95 { 96 int temp; 97 int result = 0; 98 int timeout = 0; 99 100 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size); 101 102 /* Make sure the SMBus host is ready to start transmitting */ 103 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 104 105 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). " 106 "Resetting...\n", temp); 107 108 /* kill the transaction */ 109 sis96x_write(SMB_HOST_CNT, 0x20); 110 111 /* check it again */ 112 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 113 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); 114 return -EBUSY; 115 } else { 116 dev_dbg(&sis96x_adapter.dev, "Successful\n"); 117 } 118 } 119 120 /* Turn off timeout interrupts, set fast host clock */ 121 sis96x_write(SMB_CNT, 0x20); 122 123 /* clear all (sticky) status flags */ 124 temp = sis96x_read(SMB_STS); 125 sis96x_write(SMB_STS, temp & 0x1e); 126 127 /* start the transaction by setting bit 4 and size bits */ 128 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07)); 129 130 /* We will always wait for a fraction of a second! */ 131 do { 132 msleep(1); 133 temp = sis96x_read(SMB_STS); 134 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 135 136 /* If the SMBus is still busy, we give up */ 137 if (timeout >= MAX_TIMEOUT) { 138 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); 139 result = -ETIMEDOUT; 140 } 141 142 /* device error - probably missing ACK */ 143 if (temp & 0x02) { 144 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n"); 145 result = -ENXIO; 146 } 147 148 /* bus collision */ 149 if (temp & 0x04) { 150 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n"); 151 result = -EIO; 152 } 153 154 /* Finish up by resetting the bus */ 155 sis96x_write(SMB_STS, temp); 156 if ((temp = sis96x_read(SMB_STS))) { 157 dev_dbg(&sis96x_adapter.dev, "Failed reset at " 158 "end of transaction! (0x%02x)\n", temp); 159 } 160 161 return result; 162 } 163 164 /* Return negative errno on error. */ 165 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr, 166 unsigned short flags, char read_write, 167 u8 command, int size, union i2c_smbus_data * data) 168 { 169 int status; 170 171 switch (size) { 172 case I2C_SMBUS_QUICK: 173 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 174 size = SIS96x_QUICK; 175 break; 176 177 case I2C_SMBUS_BYTE: 178 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 179 if (read_write == I2C_SMBUS_WRITE) 180 sis96x_write(SMB_CMD, command); 181 size = SIS96x_BYTE; 182 break; 183 184 case I2C_SMBUS_BYTE_DATA: 185 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 186 sis96x_write(SMB_CMD, command); 187 if (read_write == I2C_SMBUS_WRITE) 188 sis96x_write(SMB_BYTE, data->byte); 189 size = SIS96x_BYTE_DATA; 190 break; 191 192 case I2C_SMBUS_PROC_CALL: 193 case I2C_SMBUS_WORD_DATA: 194 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 195 sis96x_write(SMB_CMD, command); 196 if (read_write == I2C_SMBUS_WRITE) { 197 sis96x_write(SMB_BYTE, data->word & 0xff); 198 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); 199 } 200 size = (size == I2C_SMBUS_PROC_CALL ? 201 SIS96x_PROC_CALL : SIS96x_WORD_DATA); 202 break; 203 204 case I2C_SMBUS_BLOCK_DATA: 205 /* TO DO: */ 206 dev_info(&adap->dev, "SMBus block not implemented!\n"); 207 return -EOPNOTSUPP; 208 break; 209 210 default: 211 dev_info(&adap->dev, "Unsupported SMBus operation\n"); 212 return -EOPNOTSUPP; 213 } 214 215 status = sis96x_transaction(size); 216 if (status) 217 return status; 218 219 if ((size != SIS96x_PROC_CALL) && 220 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK))) 221 return 0; 222 223 switch (size) { 224 case SIS96x_BYTE: 225 case SIS96x_BYTE_DATA: 226 data->byte = sis96x_read(SMB_BYTE); 227 break; 228 229 case SIS96x_WORD_DATA: 230 case SIS96x_PROC_CALL: 231 data->word = sis96x_read(SMB_BYTE) + 232 (sis96x_read(SMB_BYTE + 1) << 8); 233 break; 234 } 235 return 0; 236 } 237 238 static u32 sis96x_func(struct i2c_adapter *adapter) 239 { 240 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 241 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 242 I2C_FUNC_SMBUS_PROC_CALL; 243 } 244 245 static const struct i2c_algorithm smbus_algorithm = { 246 .smbus_xfer = sis96x_access, 247 .functionality = sis96x_func, 248 }; 249 250 static struct i2c_adapter sis96x_adapter = { 251 .owner = THIS_MODULE, 252 .id = I2C_HW_SMBUS_SIS96X, 253 .class = I2C_CLASS_HWMON, 254 .algo = &smbus_algorithm, 255 }; 256 257 static struct pci_device_id sis96x_ids[] = { 258 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, 259 { 0, } 260 }; 261 262 MODULE_DEVICE_TABLE (pci, sis96x_ids); 263 264 static int __devinit sis96x_probe(struct pci_dev *dev, 265 const struct pci_device_id *id) 266 { 267 u16 ww = 0; 268 int retval; 269 270 if (sis96x_smbus_base) { 271 dev_err(&dev->dev, "Only one device supported.\n"); 272 return -EBUSY; 273 } 274 275 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww); 276 if (PCI_CLASS_SERIAL_SMBUS != ww) { 277 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww); 278 return -ENODEV; 279 } 280 281 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR); 282 if (!sis96x_smbus_base) { 283 dev_err(&dev->dev, "SiS96x SMBus base address " 284 "not initialized!\n"); 285 return -EINVAL; 286 } 287 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n", 288 sis96x_smbus_base); 289 290 /* Everything is happy, let's grab the memory and set things up. */ 291 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, 292 sis96x_driver.name)) { 293 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x " 294 "already in use!\n", sis96x_smbus_base, 295 sis96x_smbus_base + SMB_IOSIZE - 1); 296 297 sis96x_smbus_base = 0; 298 return -EINVAL; 299 } 300 301 /* set up the sysfs linkage to our parent device */ 302 sis96x_adapter.dev.parent = &dev->dev; 303 304 snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name), 305 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base); 306 307 if ((retval = i2c_add_adapter(&sis96x_adapter))) { 308 dev_err(&dev->dev, "Couldn't register adapter!\n"); 309 release_region(sis96x_smbus_base, SMB_IOSIZE); 310 sis96x_smbus_base = 0; 311 } 312 313 return retval; 314 } 315 316 static void __devexit sis96x_remove(struct pci_dev *dev) 317 { 318 if (sis96x_smbus_base) { 319 i2c_del_adapter(&sis96x_adapter); 320 release_region(sis96x_smbus_base, SMB_IOSIZE); 321 sis96x_smbus_base = 0; 322 } 323 } 324 325 static struct pci_driver sis96x_driver = { 326 .name = "sis96x_smbus", 327 .id_table = sis96x_ids, 328 .probe = sis96x_probe, 329 .remove = __devexit_p(sis96x_remove), 330 }; 331 332 static int __init i2c_sis96x_init(void) 333 { 334 return pci_register_driver(&sis96x_driver); 335 } 336 337 static void __exit i2c_sis96x_exit(void) 338 { 339 pci_unregister_driver(&sis96x_driver); 340 } 341 342 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>"); 343 MODULE_DESCRIPTION("SiS96x SMBus driver"); 344 MODULE_LICENSE("GPL"); 345 346 /* Register initialization functions using helper macros */ 347 module_init(i2c_sis96x_init); 348 module_exit(i2c_sis96x_exit); 349 350