1 /* 2 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com> 3 4 This program is free software; you can redistribute it and/or modify 5 it under the terms of the GNU General Public License as published by 6 the Free Software Foundation; either version 2 of the License, or 7 (at your option) any later version. 8 9 This program is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 GNU General Public License for more details. 13 14 You should have received a copy of the GNU General Public License 15 along with this program; if not, write to the Free Software 16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* 20 This module must be considered BETA unless and until 21 the chipset manufacturer releases a datasheet. 22 The register definitions are based on the SiS630. 23 24 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c) 25 for just about every machine for which users have reported. 26 If this module isn't detecting your 96x south bridge, have a 27 look there. 28 29 We assume there can only be one SiS96x with one SMBus interface. 30 */ 31 32 #include <linux/module.h> 33 #include <linux/pci.h> 34 #include <linux/kernel.h> 35 #include <linux/delay.h> 36 #include <linux/stddef.h> 37 #include <linux/ioport.h> 38 #include <linux/i2c.h> 39 #include <linux/acpi.h> 40 #include <linux/io.h> 41 42 /* base address register in PCI config space */ 43 #define SIS96x_BAR 0x04 44 45 /* SiS96x SMBus registers */ 46 #define SMB_STS 0x00 47 #define SMB_EN 0x01 48 #define SMB_CNT 0x02 49 #define SMB_HOST_CNT 0x03 50 #define SMB_ADDR 0x04 51 #define SMB_CMD 0x05 52 #define SMB_PCOUNT 0x06 53 #define SMB_COUNT 0x07 54 #define SMB_BYTE 0x08 55 #define SMB_DEV_ADDR 0x10 56 #define SMB_DB0 0x11 57 #define SMB_DB1 0x12 58 #define SMB_SAA 0x13 59 60 /* register count for request_region */ 61 #define SMB_IOSIZE 0x20 62 63 /* Other settings */ 64 #define MAX_TIMEOUT 500 65 66 /* SiS96x SMBus constants */ 67 #define SIS96x_QUICK 0x00 68 #define SIS96x_BYTE 0x01 69 #define SIS96x_BYTE_DATA 0x02 70 #define SIS96x_WORD_DATA 0x03 71 #define SIS96x_PROC_CALL 0x04 72 #define SIS96x_BLOCK_DATA 0x05 73 74 static struct pci_driver sis96x_driver; 75 static struct i2c_adapter sis96x_adapter; 76 static u16 sis96x_smbus_base; 77 78 static inline u8 sis96x_read(u8 reg) 79 { 80 return inb(sis96x_smbus_base + reg) ; 81 } 82 83 static inline void sis96x_write(u8 reg, u8 data) 84 { 85 outb(data, sis96x_smbus_base + reg) ; 86 } 87 88 /* Execute a SMBus transaction. 89 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA 90 */ 91 static int sis96x_transaction(int size) 92 { 93 int temp; 94 int result = 0; 95 int timeout = 0; 96 97 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size); 98 99 /* Make sure the SMBus host is ready to start transmitting */ 100 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 101 102 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). " 103 "Resetting...\n", temp); 104 105 /* kill the transaction */ 106 sis96x_write(SMB_HOST_CNT, 0x20); 107 108 /* check it again */ 109 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) { 110 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp); 111 return -EBUSY; 112 } else { 113 dev_dbg(&sis96x_adapter.dev, "Successful\n"); 114 } 115 } 116 117 /* Turn off timeout interrupts, set fast host clock */ 118 sis96x_write(SMB_CNT, 0x20); 119 120 /* clear all (sticky) status flags */ 121 temp = sis96x_read(SMB_STS); 122 sis96x_write(SMB_STS, temp & 0x1e); 123 124 /* start the transaction by setting bit 4 and size bits */ 125 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07)); 126 127 /* We will always wait for a fraction of a second! */ 128 do { 129 msleep(1); 130 temp = sis96x_read(SMB_STS); 131 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 132 133 /* If the SMBus is still busy, we give up */ 134 if (timeout > MAX_TIMEOUT) { 135 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp); 136 result = -ETIMEDOUT; 137 } 138 139 /* device error - probably missing ACK */ 140 if (temp & 0x02) { 141 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n"); 142 result = -ENXIO; 143 } 144 145 /* bus collision */ 146 if (temp & 0x04) { 147 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n"); 148 result = -EIO; 149 } 150 151 /* Finish up by resetting the bus */ 152 sis96x_write(SMB_STS, temp); 153 if ((temp = sis96x_read(SMB_STS))) { 154 dev_dbg(&sis96x_adapter.dev, "Failed reset at " 155 "end of transaction! (0x%02x)\n", temp); 156 } 157 158 return result; 159 } 160 161 /* Return negative errno on error. */ 162 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr, 163 unsigned short flags, char read_write, 164 u8 command, int size, union i2c_smbus_data * data) 165 { 166 int status; 167 168 switch (size) { 169 case I2C_SMBUS_QUICK: 170 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 171 size = SIS96x_QUICK; 172 break; 173 174 case I2C_SMBUS_BYTE: 175 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 176 if (read_write == I2C_SMBUS_WRITE) 177 sis96x_write(SMB_CMD, command); 178 size = SIS96x_BYTE; 179 break; 180 181 case I2C_SMBUS_BYTE_DATA: 182 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 183 sis96x_write(SMB_CMD, command); 184 if (read_write == I2C_SMBUS_WRITE) 185 sis96x_write(SMB_BYTE, data->byte); 186 size = SIS96x_BYTE_DATA; 187 break; 188 189 case I2C_SMBUS_PROC_CALL: 190 case I2C_SMBUS_WORD_DATA: 191 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01)); 192 sis96x_write(SMB_CMD, command); 193 if (read_write == I2C_SMBUS_WRITE) { 194 sis96x_write(SMB_BYTE, data->word & 0xff); 195 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); 196 } 197 size = (size == I2C_SMBUS_PROC_CALL ? 198 SIS96x_PROC_CALL : SIS96x_WORD_DATA); 199 break; 200 201 default: 202 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 203 return -EOPNOTSUPP; 204 } 205 206 status = sis96x_transaction(size); 207 if (status) 208 return status; 209 210 if ((size != SIS96x_PROC_CALL) && 211 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK))) 212 return 0; 213 214 switch (size) { 215 case SIS96x_BYTE: 216 case SIS96x_BYTE_DATA: 217 data->byte = sis96x_read(SMB_BYTE); 218 break; 219 220 case SIS96x_WORD_DATA: 221 case SIS96x_PROC_CALL: 222 data->word = sis96x_read(SMB_BYTE) + 223 (sis96x_read(SMB_BYTE + 1) << 8); 224 break; 225 } 226 return 0; 227 } 228 229 static u32 sis96x_func(struct i2c_adapter *adapter) 230 { 231 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 232 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 233 I2C_FUNC_SMBUS_PROC_CALL; 234 } 235 236 static const struct i2c_algorithm smbus_algorithm = { 237 .smbus_xfer = sis96x_access, 238 .functionality = sis96x_func, 239 }; 240 241 static struct i2c_adapter sis96x_adapter = { 242 .owner = THIS_MODULE, 243 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, 244 .algo = &smbus_algorithm, 245 }; 246 247 static const struct pci_device_id sis96x_ids[] = { 248 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, 249 { 0, } 250 }; 251 252 MODULE_DEVICE_TABLE (pci, sis96x_ids); 253 254 static int sis96x_probe(struct pci_dev *dev, 255 const struct pci_device_id *id) 256 { 257 u16 ww = 0; 258 int retval; 259 260 if (sis96x_smbus_base) { 261 dev_err(&dev->dev, "Only one device supported.\n"); 262 return -EBUSY; 263 } 264 265 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww); 266 if (PCI_CLASS_SERIAL_SMBUS != ww) { 267 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww); 268 return -ENODEV; 269 } 270 271 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR); 272 if (!sis96x_smbus_base) { 273 dev_err(&dev->dev, "SiS96x SMBus base address " 274 "not initialized!\n"); 275 return -EINVAL; 276 } 277 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n", 278 sis96x_smbus_base); 279 280 retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]); 281 if (retval) 282 return -ENODEV; 283 284 /* Everything is happy, let's grab the memory and set things up. */ 285 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, 286 sis96x_driver.name)) { 287 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x " 288 "already in use!\n", sis96x_smbus_base, 289 sis96x_smbus_base + SMB_IOSIZE - 1); 290 291 sis96x_smbus_base = 0; 292 return -EINVAL; 293 } 294 295 /* set up the sysfs linkage to our parent device */ 296 sis96x_adapter.dev.parent = &dev->dev; 297 298 snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name), 299 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base); 300 301 if ((retval = i2c_add_adapter(&sis96x_adapter))) { 302 dev_err(&dev->dev, "Couldn't register adapter!\n"); 303 release_region(sis96x_smbus_base, SMB_IOSIZE); 304 sis96x_smbus_base = 0; 305 } 306 307 return retval; 308 } 309 310 static void sis96x_remove(struct pci_dev *dev) 311 { 312 if (sis96x_smbus_base) { 313 i2c_del_adapter(&sis96x_adapter); 314 release_region(sis96x_smbus_base, SMB_IOSIZE); 315 sis96x_smbus_base = 0; 316 } 317 } 318 319 static struct pci_driver sis96x_driver = { 320 .name = "sis96x_smbus", 321 .id_table = sis96x_ids, 322 .probe = sis96x_probe, 323 .remove = sis96x_remove, 324 }; 325 326 module_pci_driver(sis96x_driver); 327 328 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>"); 329 MODULE_DESCRIPTION("SiS96x SMBus driver"); 330 MODULE_LICENSE("GPL"); 331