1 /* 2 Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de> 3 4 This program is free software; you can redistribute it and/or modify 5 it under the terms of the GNU General Public License as published by 6 the Free Software Foundation; either version 2 of the License, or 7 (at your option) any later version. 8 9 This program is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 GNU General Public License for more details. 13 14 You should have received a copy of the GNU General Public License 15 along with this program; if not, write to the Free Software 16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* 20 Status: beta 21 22 Supports: 23 SIS 630 24 SIS 730 25 SIS 964 26 27 Notable differences between chips: 28 +------------------------+--------------------+-------------------+ 29 | | SIS630/730 | SIS964 | 30 +------------------------+--------------------+-------------------+ 31 | Clock | 14kHz/56kHz | 55.56kHz/27.78kHz | 32 | SMBus registers offset | 0x80 | 0xE0 | 33 | SMB_CNT | Bit 1 = Slave Busy | Bit 1 = Bus probe | 34 | (not used yet) | Bit 3 is reserved | Bit 3 = Last byte | 35 | SMB_PCOUNT | Offset + 0x06 | Offset + 0x14 | 36 | SMB_COUNT | 4:0 bits | 5:0 bits | 37 +------------------------+--------------------+-------------------+ 38 (Other differences don't affect the functions provided by the driver) 39 40 Note: we assume there can only be one device, with one SMBus interface. 41 */ 42 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/delay.h> 46 #include <linux/pci.h> 47 #include <linux/ioport.h> 48 #include <linux/init.h> 49 #include <linux/i2c.h> 50 #include <linux/acpi.h> 51 #include <linux/io.h> 52 53 /* SIS964 id is defined here as we are the only file using it */ 54 #define PCI_DEVICE_ID_SI_964 0x0964 55 56 /* SIS630/730/964 SMBus registers */ 57 #define SMB_STS 0x00 /* status */ 58 #define SMB_CNT 0x02 /* control */ 59 #define SMBHOST_CNT 0x03 /* host control */ 60 #define SMB_ADDR 0x04 /* address */ 61 #define SMB_CMD 0x05 /* command */ 62 #define SMB_COUNT 0x07 /* byte count */ 63 #define SMB_BYTE 0x08 /* ~0x8F data byte field */ 64 65 /* SMB_STS register */ 66 #define BYTE_DONE_STS 0x10 /* Byte Done Status / Block Array */ 67 #define SMBCOL_STS 0x04 /* Collision */ 68 #define SMBERR_STS 0x02 /* Device error */ 69 70 /* SMB_CNT register */ 71 #define MSTO_EN 0x40 /* Host Master Timeout Enable */ 72 #define SMBCLK_SEL 0x20 /* Host master clock selection */ 73 #define SMB_PROBE 0x02 /* Bus Probe/Slave busy */ 74 #define SMB_HOSTBUSY 0x01 /* Host Busy */ 75 76 /* SMBHOST_CNT register */ 77 #define SMB_KILL 0x20 /* Kill */ 78 #define SMB_START 0x10 /* Start */ 79 80 /* register count for request_region 81 * As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964 82 */ 83 #define SIS630_SMB_IOREGION 20 84 85 /* PCI address constants */ 86 /* acpi base address register */ 87 #define SIS630_ACPI_BASE_REG 0x74 88 /* bios control register */ 89 #define SIS630_BIOS_CTL_REG 0x40 90 91 /* Other settings */ 92 #define MAX_TIMEOUT 500 93 94 /* SIS630 constants */ 95 #define SIS630_QUICK 0x00 96 #define SIS630_BYTE 0x01 97 #define SIS630_BYTE_DATA 0x02 98 #define SIS630_WORD_DATA 0x03 99 #define SIS630_PCALL 0x04 100 #define SIS630_BLOCK_DATA 0x05 101 102 static struct pci_driver sis630_driver; 103 104 /* insmod parameters */ 105 static bool high_clock; 106 static bool force; 107 module_param(high_clock, bool, 0); 108 MODULE_PARM_DESC(high_clock, 109 "Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only)."); 110 module_param(force, bool, 0); 111 MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!"); 112 113 /* SMBus base adress */ 114 static unsigned short smbus_base; 115 116 /* supported chips */ 117 static int supported[] = { 118 PCI_DEVICE_ID_SI_630, 119 PCI_DEVICE_ID_SI_730, 120 PCI_DEVICE_ID_SI_760, 121 0 /* terminates the list */ 122 }; 123 124 static inline u8 sis630_read(u8 reg) 125 { 126 return inb(smbus_base + reg); 127 } 128 129 static inline void sis630_write(u8 reg, u8 data) 130 { 131 outb(data, smbus_base + reg); 132 } 133 134 static int sis630_transaction_start(struct i2c_adapter *adap, int size, 135 u8 *oldclock) 136 { 137 int temp; 138 139 /* Make sure the SMBus host is ready to start transmitting. */ 140 temp = sis630_read(SMB_CNT); 141 if ((temp & (SMB_PROBE | SMB_HOSTBUSY)) != 0x00) { 142 dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp); 143 /* kill smbus transaction */ 144 sis630_write(SMBHOST_CNT, SMB_KILL); 145 146 temp = sis630_read(SMB_CNT); 147 if (temp & (SMB_PROBE | SMB_HOSTBUSY)) { 148 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); 149 return -EBUSY; 150 } else { 151 dev_dbg(&adap->dev, "Successful!\n"); 152 } 153 } 154 155 /* save old clock, so we can prevent machine for hung */ 156 *oldclock = sis630_read(SMB_CNT); 157 158 dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock); 159 160 /* disable timeout interrupt, 161 * set Host Master Clock to 56KHz if requested */ 162 if (high_clock) 163 sis630_write(SMB_CNT, SMBCLK_SEL); 164 else 165 sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN)); 166 167 /* clear all sticky bits */ 168 temp = sis630_read(SMB_STS); 169 sis630_write(SMB_STS, temp & 0x1e); 170 171 /* start the transaction by setting bit 4 and size */ 172 sis630_write(SMBHOST_CNT, SMB_START | (size & 0x07)); 173 174 return 0; 175 } 176 177 static int sis630_transaction_wait(struct i2c_adapter *adap, int size) 178 { 179 int temp, result = 0, timeout = 0; 180 181 /* We will always wait for a fraction of a second! */ 182 do { 183 msleep(1); 184 temp = sis630_read(SMB_STS); 185 /* check if block transmitted */ 186 if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS)) 187 break; 188 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT)); 189 190 /* If the SMBus is still busy, we give up */ 191 if (timeout > MAX_TIMEOUT) { 192 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 193 result = -ETIMEDOUT; 194 } 195 196 if (temp & SMBERR_STS) { 197 dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); 198 result = -ENXIO; 199 } 200 201 if (temp & SMBCOL_STS) { 202 dev_err(&adap->dev, "Bus collision!\n"); 203 result = -EAGAIN; 204 } 205 206 return result; 207 } 208 209 static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock) 210 { 211 /* clear all status "sticky" bits */ 212 sis630_write(SMB_STS, 0xFF); 213 214 dev_dbg(&adap->dev, 215 "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT)); 216 217 /* 218 * restore old Host Master Clock if high_clock is set 219 * and oldclock was not 56KHz 220 */ 221 if (high_clock && !(oldclock & SMBCLK_SEL)) 222 sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL); 223 224 dev_dbg(&adap->dev, 225 "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT)); 226 } 227 228 static int sis630_transaction(struct i2c_adapter *adap, int size) 229 { 230 int result = 0; 231 u8 oldclock = 0; 232 233 result = sis630_transaction_start(adap, size, &oldclock); 234 if (!result) { 235 result = sis630_transaction_wait(adap, size); 236 sis630_transaction_end(adap, oldclock); 237 } 238 239 return result; 240 } 241 242 static int sis630_block_data(struct i2c_adapter *adap, 243 union i2c_smbus_data *data, int read_write) 244 { 245 int i, len = 0, rc = 0; 246 u8 oldclock = 0; 247 248 if (read_write == I2C_SMBUS_WRITE) { 249 len = data->block[0]; 250 if (len < 0) 251 len = 0; 252 else if (len > 32) 253 len = 32; 254 sis630_write(SMB_COUNT, len); 255 for (i = 1; i <= len; i++) { 256 dev_dbg(&adap->dev, 257 "set data 0x%02x\n", data->block[i]); 258 /* set data */ 259 sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]); 260 if (i == 8 || (len < 8 && i == len)) { 261 dev_dbg(&adap->dev, 262 "start trans len=%d i=%d\n", len, i); 263 /* first transaction */ 264 rc = sis630_transaction_start(adap, 265 SIS630_BLOCK_DATA, &oldclock); 266 if (rc) 267 return rc; 268 } else if ((i - 1) % 8 == 7 || i == len) { 269 dev_dbg(&adap->dev, 270 "trans_wait len=%d i=%d\n", len, i); 271 if (i > 8) { 272 dev_dbg(&adap->dev, 273 "clear smbary_sts" 274 " len=%d i=%d\n", len, i); 275 /* 276 If this is not first transaction, 277 we must clear sticky bit. 278 clear SMBARY_STS 279 */ 280 sis630_write(SMB_STS, BYTE_DONE_STS); 281 } 282 rc = sis630_transaction_wait(adap, 283 SIS630_BLOCK_DATA); 284 if (rc) { 285 dev_dbg(&adap->dev, 286 "trans_wait failed\n"); 287 break; 288 } 289 } 290 } 291 } else { 292 /* read request */ 293 data->block[0] = len = 0; 294 rc = sis630_transaction_start(adap, 295 SIS630_BLOCK_DATA, &oldclock); 296 if (rc) 297 return rc; 298 do { 299 rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA); 300 if (rc) { 301 dev_dbg(&adap->dev, "trans_wait failed\n"); 302 break; 303 } 304 /* if this first transaction then read byte count */ 305 if (len == 0) 306 data->block[0] = sis630_read(SMB_COUNT); 307 308 /* just to be sure */ 309 if (data->block[0] > 32) 310 data->block[0] = 32; 311 312 dev_dbg(&adap->dev, 313 "block data read len=0x%x\n", data->block[0]); 314 315 for (i = 0; i < 8 && len < data->block[0]; i++, len++) { 316 dev_dbg(&adap->dev, 317 "read i=%d len=%d\n", i, len); 318 data->block[len + 1] = sis630_read(SMB_BYTE + 319 i); 320 } 321 322 dev_dbg(&adap->dev, 323 "clear smbary_sts len=%d i=%d\n", len, i); 324 325 /* clear SMBARY_STS */ 326 sis630_write(SMB_STS, BYTE_DONE_STS); 327 } while (len < data->block[0]); 328 } 329 330 sis630_transaction_end(adap, oldclock); 331 332 return rc; 333 } 334 335 /* Return negative errno on error. */ 336 static s32 sis630_access(struct i2c_adapter *adap, u16 addr, 337 unsigned short flags, char read_write, 338 u8 command, int size, union i2c_smbus_data *data) 339 { 340 int status; 341 342 switch (size) { 343 case I2C_SMBUS_QUICK: 344 sis630_write(SMB_ADDR, 345 ((addr & 0x7f) << 1) | (read_write & 0x01)); 346 size = SIS630_QUICK; 347 break; 348 case I2C_SMBUS_BYTE: 349 sis630_write(SMB_ADDR, 350 ((addr & 0x7f) << 1) | (read_write & 0x01)); 351 if (read_write == I2C_SMBUS_WRITE) 352 sis630_write(SMB_CMD, command); 353 size = SIS630_BYTE; 354 break; 355 case I2C_SMBUS_BYTE_DATA: 356 sis630_write(SMB_ADDR, 357 ((addr & 0x7f) << 1) | (read_write & 0x01)); 358 sis630_write(SMB_CMD, command); 359 if (read_write == I2C_SMBUS_WRITE) 360 sis630_write(SMB_BYTE, data->byte); 361 size = SIS630_BYTE_DATA; 362 break; 363 case I2C_SMBUS_PROC_CALL: 364 case I2C_SMBUS_WORD_DATA: 365 sis630_write(SMB_ADDR, 366 ((addr & 0x7f) << 1) | (read_write & 0x01)); 367 sis630_write(SMB_CMD, command); 368 if (read_write == I2C_SMBUS_WRITE) { 369 sis630_write(SMB_BYTE, data->word & 0xff); 370 sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8); 371 } 372 size = (size == I2C_SMBUS_PROC_CALL ? 373 SIS630_PCALL : SIS630_WORD_DATA); 374 break; 375 case I2C_SMBUS_BLOCK_DATA: 376 sis630_write(SMB_ADDR, 377 ((addr & 0x7f) << 1) | (read_write & 0x01)); 378 sis630_write(SMB_CMD, command); 379 size = SIS630_BLOCK_DATA; 380 return sis630_block_data(adap, data, read_write); 381 default: 382 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 383 return -EOPNOTSUPP; 384 } 385 386 status = sis630_transaction(adap, size); 387 if (status) 388 return status; 389 390 if ((size != SIS630_PCALL) && 391 ((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) { 392 return 0; 393 } 394 395 switch (size) { 396 case SIS630_BYTE: 397 case SIS630_BYTE_DATA: 398 data->byte = sis630_read(SMB_BYTE); 399 break; 400 case SIS630_PCALL: 401 case SIS630_WORD_DATA: 402 data->word = sis630_read(SMB_BYTE) + 403 (sis630_read(SMB_BYTE + 1) << 8); 404 break; 405 } 406 407 return 0; 408 } 409 410 static u32 sis630_func(struct i2c_adapter *adapter) 411 { 412 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 413 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 414 I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA; 415 } 416 417 static int sis630_setup(struct pci_dev *sis630_dev) 418 { 419 unsigned char b; 420 struct pci_dev *dummy = NULL; 421 int retval, i; 422 /* acpi base address */ 423 unsigned short acpi_base; 424 425 /* check for supported SiS devices */ 426 for (i = 0; supported[i] > 0; i++) { 427 dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy); 428 if (dummy) 429 break; /* found */ 430 } 431 432 if (dummy) { 433 pci_dev_put(dummy); 434 } else if (force) { 435 dev_err(&sis630_dev->dev, 436 "WARNING: Can't detect SIS630 compatible device, but " 437 "loading because of force option enabled\n"); 438 } else { 439 return -ENODEV; 440 } 441 442 /* 443 Enable ACPI first , so we can accsess reg 74-75 444 in acpi io space and read acpi base addr 445 */ 446 if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) { 447 dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n"); 448 retval = -ENODEV; 449 goto exit; 450 } 451 /* if ACPI already enabled , do nothing */ 452 if (!(b & 0x80) && 453 pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b | 0x80)) { 454 dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n"); 455 retval = -ENODEV; 456 goto exit; 457 } 458 459 /* Determine the ACPI base address */ 460 if (pci_read_config_word(sis630_dev, 461 SIS630_ACPI_BASE_REG, &acpi_base)) { 462 dev_err(&sis630_dev->dev, 463 "Error: Can't determine ACPI base address\n"); 464 retval = -ENODEV; 465 goto exit; 466 } 467 468 dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base); 469 470 if (supported[i] == PCI_DEVICE_ID_SI_760) 471 smbus_base = acpi_base + 0xE0; 472 else 473 smbus_base = acpi_base + 0x80; 474 475 dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base); 476 477 retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION, 478 sis630_driver.name); 479 if (retval) 480 goto exit; 481 482 /* Everything is happy, let's grab the memory and set things up. */ 483 if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION, 484 sis630_driver.name)) { 485 dev_err(&sis630_dev->dev, 486 "I/O Region 0x%04hx-0x%04hx for SMBus already in use.\n", 487 smbus_base + SMB_STS, 488 smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1); 489 retval = -EBUSY; 490 goto exit; 491 } 492 493 retval = 0; 494 495 exit: 496 if (retval) 497 smbus_base = 0; 498 return retval; 499 } 500 501 502 static const struct i2c_algorithm smbus_algorithm = { 503 .smbus_xfer = sis630_access, 504 .functionality = sis630_func, 505 }; 506 507 static struct i2c_adapter sis630_adapter = { 508 .owner = THIS_MODULE, 509 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, 510 .algo = &smbus_algorithm, 511 .retries = 3 512 }; 513 514 static DEFINE_PCI_DEVICE_TABLE(sis630_ids) = { 515 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 516 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) }, 517 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) }, 518 { 0, } 519 }; 520 521 MODULE_DEVICE_TABLE(pci, sis630_ids); 522 523 static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id) 524 { 525 if (sis630_setup(dev)) { 526 dev_err(&dev->dev, 527 "SIS630 compatible bus not detected, " 528 "module not inserted.\n"); 529 return -ENODEV; 530 } 531 532 /* set up the sysfs linkage to our parent device */ 533 sis630_adapter.dev.parent = &dev->dev; 534 535 snprintf(sis630_adapter.name, sizeof(sis630_adapter.name), 536 "SMBus SIS630 adapter at %04hx", smbus_base + SMB_STS); 537 538 return i2c_add_adapter(&sis630_adapter); 539 } 540 541 static void sis630_remove(struct pci_dev *dev) 542 { 543 if (smbus_base) { 544 i2c_del_adapter(&sis630_adapter); 545 release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION); 546 smbus_base = 0; 547 } 548 } 549 550 551 static struct pci_driver sis630_driver = { 552 .name = "sis630_smbus", 553 .id_table = sis630_ids, 554 .probe = sis630_probe, 555 .remove = sis630_remove, 556 }; 557 558 module_pci_driver(sis630_driver); 559 560 MODULE_LICENSE("GPL"); 561 MODULE_AUTHOR("Alexander Malysh <amalysh@web.de>"); 562 MODULE_DESCRIPTION("SIS630 SMBus driver"); 563