1 /* linux/drivers/i2c/busses/i2c-s3c2410.c 2 * 3 * Copyright (C) 2004,2005 Simtec Electronics 4 * Ben Dooks <ben@simtec.co.uk> 5 * 6 * S3C2410 I2C Controller 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23 #include <linux/config.h> 24 #include <linux/kernel.h> 25 #include <linux/module.h> 26 27 #include <linux/i2c.h> 28 #include <linux/i2c-id.h> 29 #include <linux/init.h> 30 #include <linux/time.h> 31 #include <linux/interrupt.h> 32 #include <linux/sched.h> 33 #include <linux/delay.h> 34 #include <linux/errno.h> 35 #include <linux/err.h> 36 #include <linux/platform_device.h> 37 #include <linux/clk.h> 38 39 #include <asm/hardware.h> 40 #include <asm/irq.h> 41 #include <asm/io.h> 42 43 #include <asm/arch/regs-gpio.h> 44 #include <asm/arch/regs-iic.h> 45 #include <asm/arch/iic.h> 46 47 /* i2c controller state */ 48 49 enum s3c24xx_i2c_state { 50 STATE_IDLE, 51 STATE_START, 52 STATE_READ, 53 STATE_WRITE, 54 STATE_STOP 55 }; 56 57 struct s3c24xx_i2c { 58 spinlock_t lock; 59 wait_queue_head_t wait; 60 61 struct i2c_msg *msg; 62 unsigned int msg_num; 63 unsigned int msg_idx; 64 unsigned int msg_ptr; 65 66 enum s3c24xx_i2c_state state; 67 68 void __iomem *regs; 69 struct clk *clk; 70 struct device *dev; 71 struct resource *irq; 72 struct resource *ioarea; 73 struct i2c_adapter adap; 74 }; 75 76 /* default platform data to use if not supplied in the platform_device 77 */ 78 79 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = { 80 .flags = 0, 81 .slave_addr = 0x10, 82 .bus_freq = 100*1000, 83 .max_freq = 400*1000, 84 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, 85 }; 86 87 /* s3c24xx_i2c_is2440() 88 * 89 * return true is this is an s3c2440 90 */ 91 92 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c) 93 { 94 struct platform_device *pdev = to_platform_device(i2c->dev); 95 96 return !strcmp(pdev->name, "s3c2440-i2c"); 97 } 98 99 100 /* s3c24xx_i2c_get_platformdata 101 * 102 * get the platform data associated with the given device, or return 103 * the default if there is none 104 */ 105 106 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev) 107 { 108 if (dev->platform_data != NULL) 109 return (struct s3c2410_platform_i2c *)dev->platform_data; 110 111 return &s3c24xx_i2c_default_platform; 112 } 113 114 /* s3c24xx_i2c_master_complete 115 * 116 * complete the message and wake up the caller, using the given return code, 117 * or zero to mean ok. 118 */ 119 120 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret) 121 { 122 dev_dbg(i2c->dev, "master_complete %d\n", ret); 123 124 i2c->msg_ptr = 0; 125 i2c->msg = NULL; 126 i2c->msg_idx ++; 127 i2c->msg_num = 0; 128 if (ret) 129 i2c->msg_idx = ret; 130 131 wake_up(&i2c->wait); 132 } 133 134 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) 135 { 136 unsigned long tmp; 137 138 tmp = readl(i2c->regs + S3C2410_IICCON); 139 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); 140 141 } 142 143 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) 144 { 145 unsigned long tmp; 146 147 tmp = readl(i2c->regs + S3C2410_IICCON); 148 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); 149 150 } 151 152 /* irq enable/disable functions */ 153 154 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) 155 { 156 unsigned long tmp; 157 158 tmp = readl(i2c->regs + S3C2410_IICCON); 159 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); 160 } 161 162 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) 163 { 164 unsigned long tmp; 165 166 tmp = readl(i2c->regs + S3C2410_IICCON); 167 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); 168 } 169 170 171 /* s3c24xx_i2c_message_start 172 * 173 * put the start of a message onto the bus 174 */ 175 176 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 177 struct i2c_msg *msg) 178 { 179 unsigned int addr = (msg->addr & 0x7f) << 1; 180 unsigned long stat; 181 unsigned long iiccon; 182 183 stat = 0; 184 stat |= S3C2410_IICSTAT_TXRXEN; 185 186 if (msg->flags & I2C_M_RD) { 187 stat |= S3C2410_IICSTAT_MASTER_RX; 188 addr |= 1; 189 } else 190 stat |= S3C2410_IICSTAT_MASTER_TX; 191 192 if (msg->flags & I2C_M_REV_DIR_ADDR) 193 addr ^= 1; 194 195 // todo - check for wether ack wanted or not 196 s3c24xx_i2c_enable_ack(i2c); 197 198 iiccon = readl(i2c->regs + S3C2410_IICCON); 199 writel(stat, i2c->regs + S3C2410_IICSTAT); 200 201 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); 202 writeb(addr, i2c->regs + S3C2410_IICDS); 203 204 // delay a bit and reset iiccon before setting start (per samsung) 205 udelay(1); 206 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); 207 writel(iiccon, i2c->regs + S3C2410_IICCON); 208 209 stat |= S3C2410_IICSTAT_START; 210 writel(stat, i2c->regs + S3C2410_IICSTAT); 211 } 212 213 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret) 214 { 215 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); 216 217 dev_dbg(i2c->dev, "STOP\n"); 218 219 /* stop the transfer */ 220 iicstat &= ~ S3C2410_IICSTAT_START; 221 writel(iicstat, i2c->regs + S3C2410_IICSTAT); 222 223 i2c->state = STATE_STOP; 224 225 s3c24xx_i2c_master_complete(i2c, ret); 226 s3c24xx_i2c_disable_irq(i2c); 227 } 228 229 /* helper functions to determine the current state in the set of 230 * messages we are sending */ 231 232 /* is_lastmsg() 233 * 234 * returns TRUE if the current message is the last in the set 235 */ 236 237 static inline int is_lastmsg(struct s3c24xx_i2c *i2c) 238 { 239 return i2c->msg_idx >= (i2c->msg_num - 1); 240 } 241 242 /* is_msglast 243 * 244 * returns TRUE if we this is the last byte in the current message 245 */ 246 247 static inline int is_msglast(struct s3c24xx_i2c *i2c) 248 { 249 return i2c->msg_ptr == i2c->msg->len-1; 250 } 251 252 /* is_msgend 253 * 254 * returns TRUE if we reached the end of the current message 255 */ 256 257 static inline int is_msgend(struct s3c24xx_i2c *i2c) 258 { 259 return i2c->msg_ptr >= i2c->msg->len; 260 } 261 262 /* i2s_s3c_irq_nextbyte 263 * 264 * process an interrupt and work out what to do 265 */ 266 267 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) 268 { 269 unsigned long tmp; 270 unsigned char byte; 271 int ret = 0; 272 273 switch (i2c->state) { 274 275 case STATE_IDLE: 276 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__); 277 goto out; 278 break; 279 280 case STATE_STOP: 281 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__); 282 s3c24xx_i2c_disable_irq(i2c); 283 goto out_ack; 284 285 case STATE_START: 286 /* last thing we did was send a start condition on the 287 * bus, or started a new i2c message 288 */ 289 290 if (iicstat & S3C2410_IICSTAT_LASTBIT && 291 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { 292 /* ack was not received... */ 293 294 dev_dbg(i2c->dev, "ack was not received\n"); 295 s3c24xx_i2c_stop(i2c, -EREMOTEIO); 296 goto out_ack; 297 } 298 299 if (i2c->msg->flags & I2C_M_RD) 300 i2c->state = STATE_READ; 301 else 302 i2c->state = STATE_WRITE; 303 304 /* terminate the transfer if there is nothing to do 305 * (used by the i2c probe to find devices */ 306 307 if (is_lastmsg(i2c) && i2c->msg->len == 0) { 308 s3c24xx_i2c_stop(i2c, 0); 309 goto out_ack; 310 } 311 312 if (i2c->state == STATE_READ) 313 goto prepare_read; 314 315 /* fall through to the write state, as we will need to 316 * send a byte as well */ 317 318 case STATE_WRITE: 319 /* we are writing data to the device... check for the 320 * end of the message, and if so, work out what to do 321 */ 322 323 retry_write: 324 if (!is_msgend(i2c)) { 325 byte = i2c->msg->buf[i2c->msg_ptr++]; 326 writeb(byte, i2c->regs + S3C2410_IICDS); 327 328 } else if (!is_lastmsg(i2c)) { 329 /* we need to go to the next i2c message */ 330 331 dev_dbg(i2c->dev, "WRITE: Next Message\n"); 332 333 i2c->msg_ptr = 0; 334 i2c->msg_idx ++; 335 i2c->msg++; 336 337 /* check to see if we need to do another message */ 338 if (i2c->msg->flags & I2C_M_NOSTART) { 339 340 if (i2c->msg->flags & I2C_M_RD) { 341 /* cannot do this, the controller 342 * forces us to send a new START 343 * when we change direction */ 344 345 s3c24xx_i2c_stop(i2c, -EINVAL); 346 } 347 348 goto retry_write; 349 } else { 350 351 /* send the new start */ 352 s3c24xx_i2c_message_start(i2c, i2c->msg); 353 i2c->state = STATE_START; 354 } 355 356 } else { 357 /* send stop */ 358 359 s3c24xx_i2c_stop(i2c, 0); 360 } 361 break; 362 363 case STATE_READ: 364 /* we have a byte of data in the data register, do 365 * something with it, and then work out wether we are 366 * going to do any more read/write 367 */ 368 369 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) && 370 !(is_msglast(i2c) && is_lastmsg(i2c))) { 371 372 if (iicstat & S3C2410_IICSTAT_LASTBIT) { 373 dev_dbg(i2c->dev, "READ: No Ack\n"); 374 375 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); 376 goto out_ack; 377 } 378 } 379 380 byte = readb(i2c->regs + S3C2410_IICDS); 381 i2c->msg->buf[i2c->msg_ptr++] = byte; 382 383 prepare_read: 384 if (is_msglast(i2c)) { 385 /* last byte of buffer */ 386 387 if (is_lastmsg(i2c)) 388 s3c24xx_i2c_disable_ack(i2c); 389 390 } else if (is_msgend(i2c)) { 391 /* ok, we've read the entire buffer, see if there 392 * is anything else we need to do */ 393 394 if (is_lastmsg(i2c)) { 395 /* last message, send stop and complete */ 396 dev_dbg(i2c->dev, "READ: Send Stop\n"); 397 398 s3c24xx_i2c_stop(i2c, 0); 399 } else { 400 /* go to the next transfer */ 401 dev_dbg(i2c->dev, "READ: Next Transfer\n"); 402 403 i2c->msg_ptr = 0; 404 i2c->msg_idx++; 405 i2c->msg++; 406 } 407 } 408 409 break; 410 } 411 412 /* acknowlegde the IRQ and get back on with the work */ 413 414 out_ack: 415 tmp = readl(i2c->regs + S3C2410_IICCON); 416 tmp &= ~S3C2410_IICCON_IRQPEND; 417 writel(tmp, i2c->regs + S3C2410_IICCON); 418 out: 419 return ret; 420 } 421 422 /* s3c24xx_i2c_irq 423 * 424 * top level IRQ servicing routine 425 */ 426 427 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id, 428 struct pt_regs *regs) 429 { 430 struct s3c24xx_i2c *i2c = dev_id; 431 unsigned long status; 432 unsigned long tmp; 433 434 status = readl(i2c->regs + S3C2410_IICSTAT); 435 436 if (status & S3C2410_IICSTAT_ARBITR) { 437 // deal with arbitration loss 438 dev_err(i2c->dev, "deal with arbitration loss\n"); 439 } 440 441 if (i2c->state == STATE_IDLE) { 442 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); 443 444 tmp = readl(i2c->regs + S3C2410_IICCON); 445 tmp &= ~S3C2410_IICCON_IRQPEND; 446 writel(tmp, i2c->regs + S3C2410_IICCON); 447 goto out; 448 } 449 450 /* pretty much this leaves us with the fact that we've 451 * transmitted or received whatever byte we last sent */ 452 453 i2s_s3c_irq_nextbyte(i2c, status); 454 455 out: 456 return IRQ_HANDLED; 457 } 458 459 460 /* s3c24xx_i2c_set_master 461 * 462 * get the i2c bus for a master transaction 463 */ 464 465 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) 466 { 467 unsigned long iicstat; 468 int timeout = 400; 469 470 while (timeout-- > 0) { 471 iicstat = readl(i2c->regs + S3C2410_IICSTAT); 472 473 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY)) 474 return 0; 475 476 msleep(1); 477 } 478 479 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n", 480 __raw_readl(S3C2410_GPEDAT)); 481 482 return -ETIMEDOUT; 483 } 484 485 /* s3c24xx_i2c_doxfer 486 * 487 * this starts an i2c transfer 488 */ 489 490 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num) 491 { 492 unsigned long timeout; 493 int ret; 494 495 ret = s3c24xx_i2c_set_master(i2c); 496 if (ret != 0) { 497 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); 498 ret = -EAGAIN; 499 goto out; 500 } 501 502 spin_lock_irq(&i2c->lock); 503 504 i2c->msg = msgs; 505 i2c->msg_num = num; 506 i2c->msg_ptr = 0; 507 i2c->msg_idx = 0; 508 i2c->state = STATE_START; 509 510 s3c24xx_i2c_enable_irq(i2c); 511 s3c24xx_i2c_message_start(i2c, msgs); 512 spin_unlock_irq(&i2c->lock); 513 514 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); 515 516 ret = i2c->msg_idx; 517 518 /* having these next two as dev_err() makes life very 519 * noisy when doing an i2cdetect */ 520 521 if (timeout == 0) 522 dev_dbg(i2c->dev, "timeout\n"); 523 else if (ret != num) 524 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); 525 526 /* ensure the stop has been through the bus */ 527 528 msleep(1); 529 530 out: 531 return ret; 532 } 533 534 /* s3c24xx_i2c_xfer 535 * 536 * first port of call from the i2c bus code when an message needs 537 * transferring across the i2c bus. 538 */ 539 540 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap, 541 struct i2c_msg *msgs, int num) 542 { 543 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; 544 int retry; 545 int ret; 546 547 for (retry = 0; retry < adap->retries; retry++) { 548 549 ret = s3c24xx_i2c_doxfer(i2c, msgs, num); 550 551 if (ret != -EAGAIN) 552 return ret; 553 554 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); 555 556 udelay(100); 557 } 558 559 return -EREMOTEIO; 560 } 561 562 /* declare our i2c functionality */ 563 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap) 564 { 565 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING; 566 } 567 568 /* i2c bus registration info */ 569 570 static struct i2c_algorithm s3c24xx_i2c_algorithm = { 571 .master_xfer = s3c24xx_i2c_xfer, 572 .functionality = s3c24xx_i2c_func, 573 }; 574 575 static struct s3c24xx_i2c s3c24xx_i2c = { 576 .lock = SPIN_LOCK_UNLOCKED, 577 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait), 578 .adap = { 579 .name = "s3c2410-i2c", 580 .owner = THIS_MODULE, 581 .algo = &s3c24xx_i2c_algorithm, 582 .retries = 2, 583 .class = I2C_CLASS_HWMON, 584 }, 585 }; 586 587 /* s3c24xx_i2c_calcdivisor 588 * 589 * return the divisor settings for a given frequency 590 */ 591 592 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted, 593 unsigned int *div1, unsigned int *divs) 594 { 595 unsigned int calc_divs = clkin / wanted; 596 unsigned int calc_div1; 597 598 if (calc_divs > (16*16)) 599 calc_div1 = 512; 600 else 601 calc_div1 = 16; 602 603 calc_divs += calc_div1-1; 604 calc_divs /= calc_div1; 605 606 if (calc_divs == 0) 607 calc_divs = 1; 608 if (calc_divs > 17) 609 calc_divs = 17; 610 611 *divs = calc_divs; 612 *div1 = calc_div1; 613 614 return clkin / (calc_divs * calc_div1); 615 } 616 617 /* freq_acceptable 618 * 619 * test wether a frequency is within the acceptable range of error 620 */ 621 622 static inline int freq_acceptable(unsigned int freq, unsigned int wanted) 623 { 624 int diff = freq - wanted; 625 626 return (diff >= -2 && diff <= 2); 627 } 628 629 /* s3c24xx_i2c_getdivisor 630 * 631 * work out a divisor for the user requested frequency setting, 632 * either by the requested frequency, or scanning the acceptable 633 * range of frequencies until something is found 634 */ 635 636 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c, 637 struct s3c2410_platform_i2c *pdata, 638 unsigned long *iicon, 639 unsigned int *got) 640 { 641 unsigned long clkin = clk_get_rate(i2c->clk); 642 643 unsigned int divs, div1; 644 int freq; 645 int start, end; 646 647 clkin /= 1000; /* clkin now in KHz */ 648 649 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n", 650 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq); 651 652 if (pdata->bus_freq != 0) { 653 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000, 654 &div1, &divs); 655 if (freq_acceptable(freq, pdata->bus_freq/1000)) 656 goto found; 657 } 658 659 /* ok, we may have to search for something suitable... */ 660 661 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq; 662 end = pdata->min_freq; 663 664 start /= 1000; 665 end /= 1000; 666 667 /* search loop... */ 668 669 for (; start > end; start--) { 670 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs); 671 if (freq_acceptable(freq, start)) 672 goto found; 673 } 674 675 /* cannot find frequency spec */ 676 677 return -EINVAL; 678 679 found: 680 *got = freq; 681 *iicon |= (divs-1); 682 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0; 683 return 0; 684 } 685 686 /* s3c24xx_i2c_init 687 * 688 * initialise the controller, set the IO lines and frequency 689 */ 690 691 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) 692 { 693 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN; 694 struct s3c2410_platform_i2c *pdata; 695 unsigned int freq; 696 697 /* get the plafrom data */ 698 699 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent); 700 701 /* inititalise the gpio */ 702 703 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA); 704 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL); 705 706 /* write slave address */ 707 708 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); 709 710 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); 711 712 /* we need to work out the divisors for the clock... */ 713 714 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) { 715 dev_err(i2c->dev, "cannot meet bus frequency required\n"); 716 return -EINVAL; 717 } 718 719 /* todo - check that the i2c lines aren't being dragged anywhere */ 720 721 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); 722 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon); 723 724 writel(iicon, i2c->regs + S3C2410_IICCON); 725 726 /* check for s3c2440 i2c controller */ 727 728 if (s3c24xx_i2c_is2440(i2c)) { 729 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay); 730 731 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC); 732 } 733 734 return 0; 735 } 736 737 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c) 738 { 739 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) { 740 clk_disable(i2c->clk); 741 clk_put(i2c->clk); 742 i2c->clk = NULL; 743 } 744 745 if (i2c->regs != NULL) { 746 iounmap(i2c->regs); 747 i2c->regs = NULL; 748 } 749 750 if (i2c->ioarea != NULL) { 751 release_resource(i2c->ioarea); 752 kfree(i2c->ioarea); 753 i2c->ioarea = NULL; 754 } 755 } 756 757 /* s3c24xx_i2c_probe 758 * 759 * called by the bus driver when a suitable device is found 760 */ 761 762 static int s3c24xx_i2c_probe(struct platform_device *pdev) 763 { 764 struct s3c24xx_i2c *i2c = &s3c24xx_i2c; 765 struct resource *res; 766 int ret; 767 768 /* find the clock and enable it */ 769 770 i2c->dev = &pdev->dev; 771 i2c->clk = clk_get(&pdev->dev, "i2c"); 772 if (IS_ERR(i2c->clk)) { 773 dev_err(&pdev->dev, "cannot get clock\n"); 774 ret = -ENOENT; 775 goto out; 776 } 777 778 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); 779 780 clk_enable(i2c->clk); 781 782 /* map the registers */ 783 784 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 785 if (res == NULL) { 786 dev_err(&pdev->dev, "cannot find IO resource\n"); 787 ret = -ENOENT; 788 goto out; 789 } 790 791 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1, 792 pdev->name); 793 794 if (i2c->ioarea == NULL) { 795 dev_err(&pdev->dev, "cannot request IO\n"); 796 ret = -ENXIO; 797 goto out; 798 } 799 800 i2c->regs = ioremap(res->start, (res->end-res->start)+1); 801 802 if (i2c->regs == NULL) { 803 dev_err(&pdev->dev, "cannot map IO\n"); 804 ret = -ENXIO; 805 goto out; 806 } 807 808 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res); 809 810 /* setup info block for the i2c core */ 811 812 i2c->adap.algo_data = i2c; 813 i2c->adap.dev.parent = &pdev->dev; 814 815 /* initialise the i2c controller */ 816 817 ret = s3c24xx_i2c_init(i2c); 818 if (ret != 0) 819 goto out; 820 821 /* find the IRQ for this unit (note, this relies on the init call to 822 * ensure no current IRQs pending 823 */ 824 825 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 826 if (res == NULL) { 827 dev_err(&pdev->dev, "cannot find IRQ\n"); 828 ret = -ENOENT; 829 goto out; 830 } 831 832 ret = request_irq(res->start, s3c24xx_i2c_irq, SA_INTERRUPT, 833 pdev->name, i2c); 834 835 if (ret != 0) { 836 dev_err(&pdev->dev, "cannot claim IRQ\n"); 837 goto out; 838 } 839 840 i2c->irq = res; 841 842 dev_dbg(&pdev->dev, "irq resource %p (%ld)\n", res, res->start); 843 844 ret = i2c_add_adapter(&i2c->adap); 845 if (ret < 0) { 846 dev_err(&pdev->dev, "failed to add bus to i2c core\n"); 847 goto out; 848 } 849 850 platform_set_drvdata(pdev, i2c); 851 852 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id); 853 854 out: 855 if (ret < 0) 856 s3c24xx_i2c_free(i2c); 857 858 return ret; 859 } 860 861 /* s3c24xx_i2c_remove 862 * 863 * called when device is removed from the bus 864 */ 865 866 static int s3c24xx_i2c_remove(struct platform_device *pdev) 867 { 868 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); 869 870 if (i2c != NULL) { 871 s3c24xx_i2c_free(i2c); 872 platform_set_drvdata(pdev, NULL); 873 } 874 875 return 0; 876 } 877 878 #ifdef CONFIG_PM 879 static int s3c24xx_i2c_resume(struct platform_device *dev) 880 { 881 struct s3c24xx_i2c *i2c = platform_get_drvdata(dev); 882 883 if (i2c != NULL) 884 s3c24xx_i2c_init(i2c); 885 886 return 0; 887 } 888 889 #else 890 #define s3c24xx_i2c_resume NULL 891 #endif 892 893 /* device driver for platform bus bits */ 894 895 static struct platform_driver s3c2410_i2c_driver = { 896 .probe = s3c24xx_i2c_probe, 897 .remove = s3c24xx_i2c_remove, 898 .resume = s3c24xx_i2c_resume, 899 .driver = { 900 .owner = THIS_MODULE, 901 .name = "s3c2410-i2c", 902 }, 903 }; 904 905 static struct platform_driver s3c2440_i2c_driver = { 906 .probe = s3c24xx_i2c_probe, 907 .remove = s3c24xx_i2c_remove, 908 .resume = s3c24xx_i2c_resume, 909 .driver = { 910 .owner = THIS_MODULE, 911 .name = "s3c2440-i2c", 912 }, 913 }; 914 915 static int __init i2c_adap_s3c_init(void) 916 { 917 int ret; 918 919 ret = platform_driver_register(&s3c2410_i2c_driver); 920 if (ret == 0) { 921 ret = platform_driver_register(&s3c2440_i2c_driver); 922 if (ret) 923 platform_driver_unregister(&s3c2410_i2c_driver); 924 } 925 926 return ret; 927 } 928 929 static void __exit i2c_adap_s3c_exit(void) 930 { 931 platform_driver_unregister(&s3c2410_i2c_driver); 932 platform_driver_unregister(&s3c2440_i2c_driver); 933 } 934 935 module_init(i2c_adap_s3c_init); 936 module_exit(i2c_adap_s3c_exit); 937 938 MODULE_DESCRIPTION("S3C24XX I2C Bus driver"); 939 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); 940 MODULE_LICENSE("GPL"); 941