1 /* 2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and 3 Philip Edelbrock <phil@netroedge.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 */ 15 16 /* 17 Supports: 18 Intel PIIX4, 440MX 19 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 20 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800 21 AMD Hudson-2, ML, CZ 22 SMSC Victory66 23 24 Note: we assume there can only be one device, with one or more 25 SMBus interfaces. 26 The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS). 27 For devices supporting multiple ports the i2c_adapter should provide 28 an i2c_algorithm to access them. 29 */ 30 31 #include <linux/module.h> 32 #include <linux/moduleparam.h> 33 #include <linux/pci.h> 34 #include <linux/kernel.h> 35 #include <linux/delay.h> 36 #include <linux/stddef.h> 37 #include <linux/ioport.h> 38 #include <linux/i2c.h> 39 #include <linux/slab.h> 40 #include <linux/dmi.h> 41 #include <linux/acpi.h> 42 #include <linux/io.h> 43 #include <linux/mutex.h> 44 45 46 /* PIIX4 SMBus address offsets */ 47 #define SMBHSTSTS (0 + piix4_smba) 48 #define SMBHSLVSTS (1 + piix4_smba) 49 #define SMBHSTCNT (2 + piix4_smba) 50 #define SMBHSTCMD (3 + piix4_smba) 51 #define SMBHSTADD (4 + piix4_smba) 52 #define SMBHSTDAT0 (5 + piix4_smba) 53 #define SMBHSTDAT1 (6 + piix4_smba) 54 #define SMBBLKDAT (7 + piix4_smba) 55 #define SMBSLVCNT (8 + piix4_smba) 56 #define SMBSHDWCMD (9 + piix4_smba) 57 #define SMBSLVEVT (0xA + piix4_smba) 58 #define SMBSLVDAT (0xC + piix4_smba) 59 60 /* count for request_region */ 61 #define SMBIOSIZE 8 62 63 /* PCI Address Constants */ 64 #define SMBBA 0x090 65 #define SMBHSTCFG 0x0D2 66 #define SMBSLVC 0x0D3 67 #define SMBSHDW1 0x0D4 68 #define SMBSHDW2 0x0D5 69 #define SMBREV 0x0D6 70 71 /* Other settings */ 72 #define MAX_TIMEOUT 500 73 #define ENABLE_INT9 0 74 75 /* PIIX4 constants */ 76 #define PIIX4_QUICK 0x00 77 #define PIIX4_BYTE 0x04 78 #define PIIX4_BYTE_DATA 0x08 79 #define PIIX4_WORD_DATA 0x0C 80 #define PIIX4_BLOCK_DATA 0x14 81 82 /* Multi-port constants */ 83 #define PIIX4_MAX_ADAPTERS 4 84 85 /* SB800 constants */ 86 #define SB800_PIIX4_SMB_IDX 0xcd6 87 88 /* SB800 port is selected by bits 2:1 of the smb_en register (0x2c) */ 89 #define SB800_PIIX4_PORT_IDX 0x2c 90 #define SB800_PIIX4_PORT_IDX_MASK 0x06 91 92 /* insmod parameters */ 93 94 /* If force is set to anything different from 0, we forcibly enable the 95 PIIX4. DANGEROUS! */ 96 static int force; 97 module_param (force, int, 0); 98 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!"); 99 100 /* If force_addr is set to anything different from 0, we forcibly enable 101 the PIIX4 at the given address. VERY DANGEROUS! */ 102 static int force_addr; 103 module_param (force_addr, int, 0); 104 MODULE_PARM_DESC(force_addr, 105 "Forcibly enable the PIIX4 at the given address. " 106 "EXTREMELY DANGEROUS!"); 107 108 static int srvrworks_csb5_delay; 109 static struct pci_driver piix4_driver; 110 111 static const struct dmi_system_id piix4_dmi_blacklist[] = { 112 { 113 .ident = "Sapphire AM2RD790", 114 .matches = { 115 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."), 116 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"), 117 }, 118 }, 119 { 120 .ident = "DFI Lanparty UT 790FX", 121 .matches = { 122 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."), 123 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"), 124 }, 125 }, 126 { } 127 }; 128 129 /* The IBM entry is in a separate table because we only check it 130 on Intel-based systems */ 131 static const struct dmi_system_id piix4_dmi_ibm[] = { 132 { 133 .ident = "IBM", 134 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), }, 135 }, 136 { }, 137 }; 138 139 /* SB800 globals */ 140 static DEFINE_MUTEX(piix4_mutex_sb800); 141 static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = { 142 " port 0", " port 2", " port 3", " port 4" 143 }; 144 static const char *piix4_aux_port_name_sb800 = " port 1"; 145 146 struct i2c_piix4_adapdata { 147 unsigned short smba; 148 149 /* SB800 */ 150 bool sb800_main; 151 unsigned short port; 152 }; 153 154 static int piix4_setup(struct pci_dev *PIIX4_dev, 155 const struct pci_device_id *id) 156 { 157 unsigned char temp; 158 unsigned short piix4_smba; 159 160 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && 161 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5)) 162 srvrworks_csb5_delay = 1; 163 164 /* On some motherboards, it was reported that accessing the SMBus 165 caused severe hardware problems */ 166 if (dmi_check_system(piix4_dmi_blacklist)) { 167 dev_err(&PIIX4_dev->dev, 168 "Accessing the SMBus on this system is unsafe!\n"); 169 return -EPERM; 170 } 171 172 /* Don't access SMBus on IBM systems which get corrupted eeproms */ 173 if (dmi_check_system(piix4_dmi_ibm) && 174 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) { 175 dev_err(&PIIX4_dev->dev, "IBM system detected; this module " 176 "may corrupt your serial eeprom! Refusing to load " 177 "module!\n"); 178 return -EPERM; 179 } 180 181 /* Determine the address of the SMBus areas */ 182 if (force_addr) { 183 piix4_smba = force_addr & 0xfff0; 184 force = 0; 185 } else { 186 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba); 187 piix4_smba &= 0xfff0; 188 if(piix4_smba == 0) { 189 dev_err(&PIIX4_dev->dev, "SMBus base address " 190 "uninitialized - upgrade BIOS or use " 191 "force_addr=0xaddr\n"); 192 return -ENODEV; 193 } 194 } 195 196 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 197 return -ENODEV; 198 199 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 200 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", 201 piix4_smba); 202 return -EBUSY; 203 } 204 205 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 206 207 /* If force_addr is set, we program the new address here. Just to make 208 sure, we disable the PIIX4 first. */ 209 if (force_addr) { 210 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe); 211 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba); 212 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01); 213 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to " 214 "new address %04x!\n", piix4_smba); 215 } else if ((temp & 1) == 0) { 216 if (force) { 217 /* This should never need to be done, but has been 218 * noted that many Dell machines have the SMBus 219 * interface on the PIIX4 disabled!? NOTE: This assumes 220 * I/O space and other allocations WERE done by the 221 * Bios! Don't complain if your hardware does weird 222 * things after enabling this. :') Check for Bios 223 * updates before resorting to this. 224 */ 225 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, 226 temp | 1); 227 dev_notice(&PIIX4_dev->dev, 228 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n"); 229 } else { 230 dev_err(&PIIX4_dev->dev, 231 "SMBus Host Controller not enabled!\n"); 232 release_region(piix4_smba, SMBIOSIZE); 233 return -ENODEV; 234 } 235 } 236 237 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2)) 238 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n"); 239 else if ((temp & 0x0E) == 0) 240 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n"); 241 else 242 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration " 243 "(or code out of date)!\n"); 244 245 pci_read_config_byte(PIIX4_dev, SMBREV, &temp); 246 dev_info(&PIIX4_dev->dev, 247 "SMBus Host Controller at 0x%x, revision %d\n", 248 piix4_smba, temp); 249 250 return piix4_smba; 251 } 252 253 static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, 254 const struct pci_device_id *id, u8 aux) 255 { 256 unsigned short piix4_smba; 257 u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status; 258 u8 i2ccfg, i2ccfg_offset = 0x10; 259 260 /* SB800 and later SMBus does not support forcing address */ 261 if (force || force_addr) { 262 dev_err(&PIIX4_dev->dev, "SMBus does not support " 263 "forcing address!\n"); 264 return -EINVAL; 265 } 266 267 /* Determine the address of the SMBus areas */ 268 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && 269 PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && 270 PIIX4_dev->revision >= 0x41) || 271 (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && 272 PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS && 273 PIIX4_dev->revision >= 0x49)) 274 smb_en = 0x00; 275 else 276 smb_en = (aux) ? 0x28 : 0x2c; 277 278 mutex_lock(&piix4_mutex_sb800); 279 outb_p(smb_en, SB800_PIIX4_SMB_IDX); 280 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); 281 outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); 282 smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); 283 mutex_unlock(&piix4_mutex_sb800); 284 285 if (!smb_en) { 286 smb_en_status = smba_en_lo & 0x10; 287 piix4_smba = smba_en_hi << 8; 288 if (aux) 289 piix4_smba |= 0x20; 290 } else { 291 smb_en_status = smba_en_lo & 0x01; 292 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; 293 } 294 295 if (!smb_en_status) { 296 dev_err(&PIIX4_dev->dev, 297 "SMBus Host Controller not enabled!\n"); 298 return -ENODEV; 299 } 300 301 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 302 return -ENODEV; 303 304 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 305 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", 306 piix4_smba); 307 return -EBUSY; 308 } 309 310 /* Aux SMBus does not support IRQ information */ 311 if (aux) { 312 dev_info(&PIIX4_dev->dev, 313 "Auxiliary SMBus Host Controller at 0x%x\n", 314 piix4_smba); 315 return piix4_smba; 316 } 317 318 /* Request the SMBus I2C bus config region */ 319 if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) { 320 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region " 321 "0x%x already in use!\n", piix4_smba + i2ccfg_offset); 322 release_region(piix4_smba, SMBIOSIZE); 323 return -EBUSY; 324 } 325 i2ccfg = inb_p(piix4_smba + i2ccfg_offset); 326 release_region(piix4_smba + i2ccfg_offset, 1); 327 328 if (i2ccfg & 1) 329 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n"); 330 else 331 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n"); 332 333 dev_info(&PIIX4_dev->dev, 334 "SMBus Host Controller at 0x%x, revision %d\n", 335 piix4_smba, i2ccfg >> 4); 336 337 return piix4_smba; 338 } 339 340 static int piix4_setup_aux(struct pci_dev *PIIX4_dev, 341 const struct pci_device_id *id, 342 unsigned short base_reg_addr) 343 { 344 /* Set up auxiliary SMBus controllers found on some 345 * AMD chipsets e.g. SP5100 (SB700 derivative) */ 346 347 unsigned short piix4_smba; 348 349 /* Read address of auxiliary SMBus controller */ 350 pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba); 351 if ((piix4_smba & 1) == 0) { 352 dev_dbg(&PIIX4_dev->dev, 353 "Auxiliary SMBus controller not enabled\n"); 354 return -ENODEV; 355 } 356 357 piix4_smba &= 0xfff0; 358 if (piix4_smba == 0) { 359 dev_dbg(&PIIX4_dev->dev, 360 "Auxiliary SMBus base address uninitialized\n"); 361 return -ENODEV; 362 } 363 364 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 365 return -ENODEV; 366 367 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 368 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x " 369 "already in use!\n", piix4_smba); 370 return -EBUSY; 371 } 372 373 dev_info(&PIIX4_dev->dev, 374 "Auxiliary SMBus Host Controller at 0x%x\n", 375 piix4_smba); 376 377 return piix4_smba; 378 } 379 380 static int piix4_transaction(struct i2c_adapter *piix4_adapter) 381 { 382 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter); 383 unsigned short piix4_smba = adapdata->smba; 384 int temp; 385 int result = 0; 386 int timeout = 0; 387 388 dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, " 389 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 390 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 391 inb_p(SMBHSTDAT1)); 392 393 /* Make sure the SMBus host is ready to start transmitting */ 394 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 395 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). " 396 "Resetting...\n", temp); 397 outb_p(temp, SMBHSTSTS); 398 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 399 dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp); 400 return -EBUSY; 401 } else { 402 dev_dbg(&piix4_adapter->dev, "Successful!\n"); 403 } 404 } 405 406 /* start the transaction by setting bit 6 */ 407 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT); 408 409 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */ 410 if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */ 411 msleep(2); 412 else 413 msleep(1); 414 415 while ((++timeout < MAX_TIMEOUT) && 416 ((temp = inb_p(SMBHSTSTS)) & 0x01)) 417 msleep(1); 418 419 /* If the SMBus is still busy, we give up */ 420 if (timeout == MAX_TIMEOUT) { 421 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n"); 422 result = -ETIMEDOUT; 423 } 424 425 if (temp & 0x10) { 426 result = -EIO; 427 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n"); 428 } 429 430 if (temp & 0x08) { 431 result = -EIO; 432 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be " 433 "locked until next hard reset. (sorry!)\n"); 434 /* Clock stops and slave is stuck in mid-transmission */ 435 } 436 437 if (temp & 0x04) { 438 result = -ENXIO; 439 dev_dbg(&piix4_adapter->dev, "Error: no response!\n"); 440 } 441 442 if (inb_p(SMBHSTSTS) != 0x00) 443 outb_p(inb(SMBHSTSTS), SMBHSTSTS); 444 445 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 446 dev_err(&piix4_adapter->dev, "Failed reset at end of " 447 "transaction (%02x)\n", temp); 448 } 449 dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, " 450 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 451 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 452 inb_p(SMBHSTDAT1)); 453 return result; 454 } 455 456 /* Return negative errno on error. */ 457 static s32 piix4_access(struct i2c_adapter * adap, u16 addr, 458 unsigned short flags, char read_write, 459 u8 command, int size, union i2c_smbus_data * data) 460 { 461 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 462 unsigned short piix4_smba = adapdata->smba; 463 int i, len; 464 int status; 465 466 switch (size) { 467 case I2C_SMBUS_QUICK: 468 outb_p((addr << 1) | read_write, 469 SMBHSTADD); 470 size = PIIX4_QUICK; 471 break; 472 case I2C_SMBUS_BYTE: 473 outb_p((addr << 1) | read_write, 474 SMBHSTADD); 475 if (read_write == I2C_SMBUS_WRITE) 476 outb_p(command, SMBHSTCMD); 477 size = PIIX4_BYTE; 478 break; 479 case I2C_SMBUS_BYTE_DATA: 480 outb_p((addr << 1) | read_write, 481 SMBHSTADD); 482 outb_p(command, SMBHSTCMD); 483 if (read_write == I2C_SMBUS_WRITE) 484 outb_p(data->byte, SMBHSTDAT0); 485 size = PIIX4_BYTE_DATA; 486 break; 487 case I2C_SMBUS_WORD_DATA: 488 outb_p((addr << 1) | read_write, 489 SMBHSTADD); 490 outb_p(command, SMBHSTCMD); 491 if (read_write == I2C_SMBUS_WRITE) { 492 outb_p(data->word & 0xff, SMBHSTDAT0); 493 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); 494 } 495 size = PIIX4_WORD_DATA; 496 break; 497 case I2C_SMBUS_BLOCK_DATA: 498 outb_p((addr << 1) | read_write, 499 SMBHSTADD); 500 outb_p(command, SMBHSTCMD); 501 if (read_write == I2C_SMBUS_WRITE) { 502 len = data->block[0]; 503 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) 504 return -EINVAL; 505 outb_p(len, SMBHSTDAT0); 506 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 507 for (i = 1; i <= len; i++) 508 outb_p(data->block[i], SMBBLKDAT); 509 } 510 size = PIIX4_BLOCK_DATA; 511 break; 512 default: 513 dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 514 return -EOPNOTSUPP; 515 } 516 517 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT); 518 519 status = piix4_transaction(adap); 520 if (status) 521 return status; 522 523 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK)) 524 return 0; 525 526 527 switch (size) { 528 case PIIX4_BYTE: 529 case PIIX4_BYTE_DATA: 530 data->byte = inb_p(SMBHSTDAT0); 531 break; 532 case PIIX4_WORD_DATA: 533 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); 534 break; 535 case PIIX4_BLOCK_DATA: 536 data->block[0] = inb_p(SMBHSTDAT0); 537 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) 538 return -EPROTO; 539 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 540 for (i = 1; i <= data->block[0]; i++) 541 data->block[i] = inb_p(SMBBLKDAT); 542 break; 543 } 544 return 0; 545 } 546 547 /* 548 * Handles access to multiple SMBus ports on the SB800. 549 * The port is selected by bits 2:1 of the smb_en register (0x2c). 550 * Returns negative errno on error. 551 * 552 * Note: The selected port must be returned to the initial selection to avoid 553 * problems on certain systems. 554 */ 555 static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, 556 unsigned short flags, char read_write, 557 u8 command, int size, union i2c_smbus_data *data) 558 { 559 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 560 u8 smba_en_lo; 561 u8 port; 562 int retval; 563 564 mutex_lock(&piix4_mutex_sb800); 565 566 outb_p(SB800_PIIX4_PORT_IDX, SB800_PIIX4_SMB_IDX); 567 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); 568 569 port = adapdata->port; 570 if ((smba_en_lo & SB800_PIIX4_PORT_IDX_MASK) != (port << 1)) 571 outb_p((smba_en_lo & ~SB800_PIIX4_PORT_IDX_MASK) | (port << 1), 572 SB800_PIIX4_SMB_IDX + 1); 573 574 retval = piix4_access(adap, addr, flags, read_write, 575 command, size, data); 576 577 outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1); 578 579 mutex_unlock(&piix4_mutex_sb800); 580 581 return retval; 582 } 583 584 static u32 piix4_func(struct i2c_adapter *adapter) 585 { 586 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 587 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 588 I2C_FUNC_SMBUS_BLOCK_DATA; 589 } 590 591 static const struct i2c_algorithm smbus_algorithm = { 592 .smbus_xfer = piix4_access, 593 .functionality = piix4_func, 594 }; 595 596 static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = { 597 .smbus_xfer = piix4_access_sb800, 598 .functionality = piix4_func, 599 }; 600 601 static const struct pci_device_id piix4_ids[] = { 602 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) }, 603 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) }, 604 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) }, 605 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) }, 606 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, 607 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, 608 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, 609 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) }, 610 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) }, 611 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 612 PCI_DEVICE_ID_SERVERWORKS_OSB4) }, 613 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 614 PCI_DEVICE_ID_SERVERWORKS_CSB5) }, 615 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 616 PCI_DEVICE_ID_SERVERWORKS_CSB6) }, 617 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 618 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) }, 619 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 620 PCI_DEVICE_ID_SERVERWORKS_HT1100LD) }, 621 { 0, } 622 }; 623 624 MODULE_DEVICE_TABLE (pci, piix4_ids); 625 626 static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS]; 627 static struct i2c_adapter *piix4_aux_adapter; 628 629 static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, 630 bool sb800_main, unsigned short port, 631 const char *name, struct i2c_adapter **padap) 632 { 633 struct i2c_adapter *adap; 634 struct i2c_piix4_adapdata *adapdata; 635 int retval; 636 637 adap = kzalloc(sizeof(*adap), GFP_KERNEL); 638 if (adap == NULL) { 639 release_region(smba, SMBIOSIZE); 640 return -ENOMEM; 641 } 642 643 adap->owner = THIS_MODULE; 644 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 645 adap->algo = sb800_main ? &piix4_smbus_algorithm_sb800 646 : &smbus_algorithm; 647 648 adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL); 649 if (adapdata == NULL) { 650 kfree(adap); 651 release_region(smba, SMBIOSIZE); 652 return -ENOMEM; 653 } 654 655 adapdata->smba = smba; 656 adapdata->sb800_main = sb800_main; 657 adapdata->port = port; 658 659 /* set up the sysfs linkage to our parent device */ 660 adap->dev.parent = &dev->dev; 661 662 snprintf(adap->name, sizeof(adap->name), 663 "SMBus PIIX4 adapter%s at %04x", name, smba); 664 665 i2c_set_adapdata(adap, adapdata); 666 667 retval = i2c_add_adapter(adap); 668 if (retval) { 669 dev_err(&dev->dev, "Couldn't register adapter!\n"); 670 kfree(adapdata); 671 kfree(adap); 672 release_region(smba, SMBIOSIZE); 673 return retval; 674 } 675 676 *padap = adap; 677 return 0; 678 } 679 680 static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba) 681 { 682 struct i2c_piix4_adapdata *adapdata; 683 int port; 684 int retval; 685 686 for (port = 0; port < PIIX4_MAX_ADAPTERS; port++) { 687 retval = piix4_add_adapter(dev, smba, true, port, 688 piix4_main_port_names_sb800[port], 689 &piix4_main_adapters[port]); 690 if (retval < 0) 691 goto error; 692 } 693 694 return retval; 695 696 error: 697 dev_err(&dev->dev, 698 "Error setting up SB800 adapters. Unregistering!\n"); 699 while (--port >= 0) { 700 adapdata = i2c_get_adapdata(piix4_main_adapters[port]); 701 if (adapdata->smba) { 702 i2c_del_adapter(piix4_main_adapters[port]); 703 kfree(adapdata); 704 kfree(piix4_main_adapters[port]); 705 piix4_main_adapters[port] = NULL; 706 } 707 } 708 709 return retval; 710 } 711 712 static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) 713 { 714 int retval; 715 bool is_sb800 = false; 716 717 if ((dev->vendor == PCI_VENDOR_ID_ATI && 718 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && 719 dev->revision >= 0x40) || 720 dev->vendor == PCI_VENDOR_ID_AMD) { 721 is_sb800 = true; 722 723 if (!request_region(SB800_PIIX4_SMB_IDX, 2, "smba_idx")) { 724 dev_err(&dev->dev, 725 "SMBus base address index region 0x%x already in use!\n", 726 SB800_PIIX4_SMB_IDX); 727 return -EBUSY; 728 } 729 730 /* base address location etc changed in SB800 */ 731 retval = piix4_setup_sb800(dev, id, 0); 732 if (retval < 0) { 733 release_region(SB800_PIIX4_SMB_IDX, 2); 734 return retval; 735 } 736 737 /* 738 * Try to register multiplexed main SMBus adapter, 739 * give up if we can't 740 */ 741 retval = piix4_add_adapters_sb800(dev, retval); 742 if (retval < 0) { 743 release_region(SB800_PIIX4_SMB_IDX, 2); 744 return retval; 745 } 746 } else { 747 retval = piix4_setup(dev, id); 748 if (retval < 0) 749 return retval; 750 751 /* Try to register main SMBus adapter, give up if we can't */ 752 retval = piix4_add_adapter(dev, retval, false, 0, "", 753 &piix4_main_adapters[0]); 754 if (retval < 0) 755 return retval; 756 } 757 758 /* Check for auxiliary SMBus on some AMD chipsets */ 759 retval = -ENODEV; 760 761 if (dev->vendor == PCI_VENDOR_ID_ATI && 762 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) { 763 if (dev->revision < 0x40) { 764 retval = piix4_setup_aux(dev, id, 0x58); 765 } else { 766 /* SB800 added aux bus too */ 767 retval = piix4_setup_sb800(dev, id, 1); 768 } 769 } 770 771 if (dev->vendor == PCI_VENDOR_ID_AMD && 772 dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) { 773 retval = piix4_setup_sb800(dev, id, 1); 774 } 775 776 if (retval > 0) { 777 /* Try to add the aux adapter if it exists, 778 * piix4_add_adapter will clean up if this fails */ 779 piix4_add_adapter(dev, retval, false, 0, 780 is_sb800 ? piix4_aux_port_name_sb800 : "", 781 &piix4_aux_adapter); 782 } 783 784 return 0; 785 } 786 787 static void piix4_adap_remove(struct i2c_adapter *adap) 788 { 789 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 790 791 if (adapdata->smba) { 792 i2c_del_adapter(adap); 793 if (adapdata->port == 0) { 794 release_region(adapdata->smba, SMBIOSIZE); 795 if (adapdata->sb800_main) 796 release_region(SB800_PIIX4_SMB_IDX, 2); 797 } 798 kfree(adapdata); 799 kfree(adap); 800 } 801 } 802 803 static void piix4_remove(struct pci_dev *dev) 804 { 805 int port = PIIX4_MAX_ADAPTERS; 806 807 while (--port >= 0) { 808 if (piix4_main_adapters[port]) { 809 piix4_adap_remove(piix4_main_adapters[port]); 810 piix4_main_adapters[port] = NULL; 811 } 812 } 813 814 if (piix4_aux_adapter) { 815 piix4_adap_remove(piix4_aux_adapter); 816 piix4_aux_adapter = NULL; 817 } 818 } 819 820 static struct pci_driver piix4_driver = { 821 .name = "piix4_smbus", 822 .id_table = piix4_ids, 823 .probe = piix4_probe, 824 .remove = piix4_remove, 825 }; 826 827 module_pci_driver(piix4_driver); 828 829 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and " 830 "Philip Edelbrock <phil@netroedge.com>"); 831 MODULE_DESCRIPTION("PIIX4 SMBus driver"); 832 MODULE_LICENSE("GPL"); 833