1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and 41da177e4SLinus Torvalds Philip Edelbrock <phil@netroedge.com> 51da177e4SLinus Torvalds 61da177e4SLinus Torvalds */ 71da177e4SLinus Torvalds 81da177e4SLinus Torvalds /* 91da177e4SLinus Torvalds Supports: 101da177e4SLinus Torvalds Intel PIIX4, 440MX 11506a8b6cSFlavio Leitner Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 122a2f7404SAndrew Armenia ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800 13032f708bSShane Huang AMD Hudson-2, ML, CZ 1424beb83aSPu Wen Hygon CZ 151da177e4SLinus Torvalds SMSC Victory66 161da177e4SLinus Torvalds 172a2f7404SAndrew Armenia Note: we assume there can only be one device, with one or more 182a2f7404SAndrew Armenia SMBus interfaces. 192fee61d2SChristian Fetzer The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS). 202fee61d2SChristian Fetzer For devices supporting multiple ports the i2c_adapter should provide 212fee61d2SChristian Fetzer an i2c_algorithm to access them. 221da177e4SLinus Torvalds */ 231da177e4SLinus Torvalds 241da177e4SLinus Torvalds #include <linux/module.h> 251da177e4SLinus Torvalds #include <linux/moduleparam.h> 261da177e4SLinus Torvalds #include <linux/pci.h> 271da177e4SLinus Torvalds #include <linux/kernel.h> 281da177e4SLinus Torvalds #include <linux/delay.h> 291da177e4SLinus Torvalds #include <linux/stddef.h> 301da177e4SLinus Torvalds #include <linux/ioport.h> 311da177e4SLinus Torvalds #include <linux/i2c.h> 32c415b303SDaniel J Blueman #include <linux/slab.h> 331da177e4SLinus Torvalds #include <linux/dmi.h> 3454fb4a05SJean Delvare #include <linux/acpi.h> 3521782180SH Hartley Sweeten #include <linux/io.h> 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds /* PIIX4 SMBus address offsets */ 391da177e4SLinus Torvalds #define SMBHSTSTS (0 + piix4_smba) 401da177e4SLinus Torvalds #define SMBHSLVSTS (1 + piix4_smba) 411da177e4SLinus Torvalds #define SMBHSTCNT (2 + piix4_smba) 421da177e4SLinus Torvalds #define SMBHSTCMD (3 + piix4_smba) 431da177e4SLinus Torvalds #define SMBHSTADD (4 + piix4_smba) 441da177e4SLinus Torvalds #define SMBHSTDAT0 (5 + piix4_smba) 451da177e4SLinus Torvalds #define SMBHSTDAT1 (6 + piix4_smba) 461da177e4SLinus Torvalds #define SMBBLKDAT (7 + piix4_smba) 471da177e4SLinus Torvalds #define SMBSLVCNT (8 + piix4_smba) 481da177e4SLinus Torvalds #define SMBSHDWCMD (9 + piix4_smba) 491da177e4SLinus Torvalds #define SMBSLVEVT (0xA + piix4_smba) 501da177e4SLinus Torvalds #define SMBSLVDAT (0xC + piix4_smba) 511da177e4SLinus Torvalds 521da177e4SLinus Torvalds /* count for request_region */ 53f43128c7SRicardo Ribalda #define SMBIOSIZE 9 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds /* PCI Address Constants */ 561da177e4SLinus Torvalds #define SMBBA 0x090 571da177e4SLinus Torvalds #define SMBHSTCFG 0x0D2 581da177e4SLinus Torvalds #define SMBSLVC 0x0D3 591da177e4SLinus Torvalds #define SMBSHDW1 0x0D4 601da177e4SLinus Torvalds #define SMBSHDW2 0x0D5 611da177e4SLinus Torvalds #define SMBREV 0x0D6 621da177e4SLinus Torvalds 631da177e4SLinus Torvalds /* Other settings */ 641da177e4SLinus Torvalds #define MAX_TIMEOUT 500 651da177e4SLinus Torvalds #define ENABLE_INT9 0 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds /* PIIX4 constants */ 681da177e4SLinus Torvalds #define PIIX4_QUICK 0x00 691da177e4SLinus Torvalds #define PIIX4_BYTE 0x04 701da177e4SLinus Torvalds #define PIIX4_BYTE_DATA 0x08 711da177e4SLinus Torvalds #define PIIX4_WORD_DATA 0x0C 721da177e4SLinus Torvalds #define PIIX4_BLOCK_DATA 0x14 731da177e4SLinus Torvalds 74ca2061e1SChristian Fetzer /* Multi-port constants */ 75ca2061e1SChristian Fetzer #define PIIX4_MAX_ADAPTERS 4 76528d53a1SJean Delvare #define HUDSON2_MAIN_PORTS 2 /* HUDSON2, KERNCZ reserves ports 3, 4 */ 77ca2061e1SChristian Fetzer 782fee61d2SChristian Fetzer /* SB800 constants */ 792fee61d2SChristian Fetzer #define SB800_PIIX4_SMB_IDX 0xcd6 805166f933STerry Bowman #define SB800_PIIX4_SMB_MAP_SIZE 2 812fee61d2SChristian Fetzer 8288fa2dfbSRicardo Ribalda Delgado #define KERNCZ_IMC_IDX 0x3e 8388fa2dfbSRicardo Ribalda Delgado #define KERNCZ_IMC_DATA 0x3f 8488fa2dfbSRicardo Ribalda Delgado 856befa3fdSJean Delvare /* 866befa3fdSJean Delvare * SB800 port is selected by bits 2:1 of the smb_en register (0x2c) 876befa3fdSJean Delvare * or the smb_sel register (0x2e), depending on bit 0 of register 0x2f. 886befa3fdSJean Delvare * Hudson-2/Bolton port is always selected by bits 2:1 of register 0x2f. 896befa3fdSJean Delvare */ 902fee61d2SChristian Fetzer #define SB800_PIIX4_PORT_IDX 0x2c 916befa3fdSJean Delvare #define SB800_PIIX4_PORT_IDX_ALT 0x2e 926befa3fdSJean Delvare #define SB800_PIIX4_PORT_IDX_SEL 0x2f 932fee61d2SChristian Fetzer #define SB800_PIIX4_PORT_IDX_MASK 0x06 940fe16195SGuenter Roeck #define SB800_PIIX4_PORT_IDX_SHIFT 1 950fe16195SGuenter Roeck 96c7c06a15SAndrew Cooks /* On kerncz and Hudson2, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */ 970fe16195SGuenter Roeck #define SB800_PIIX4_PORT_IDX_KERNCZ 0x02 980fe16195SGuenter Roeck #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18 990fe16195SGuenter Roeck #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3 1002fee61d2SChristian Fetzer 1014b965566STerry Bowman #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 1024b965566STerry Bowman #define SB800_PIIX4_FCH_PM_SIZE 8 1034b965566STerry Bowman 1041da177e4SLinus Torvalds /* insmod parameters */ 1051da177e4SLinus Torvalds 1061da177e4SLinus Torvalds /* If force is set to anything different from 0, we forcibly enable the 1071da177e4SLinus Torvalds PIIX4. DANGEROUS! */ 10860507095SJean Delvare static int force; 1091da177e4SLinus Torvalds module_param (force, int, 0); 1101da177e4SLinus Torvalds MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!"); 1111da177e4SLinus Torvalds 1121da177e4SLinus Torvalds /* If force_addr is set to anything different from 0, we forcibly enable 1131da177e4SLinus Torvalds the PIIX4 at the given address. VERY DANGEROUS! */ 11460507095SJean Delvare static int force_addr; 115c78babccSDavid Howells module_param_hw(force_addr, int, ioport, 0); 1161da177e4SLinus Torvalds MODULE_PARM_DESC(force_addr, 1171da177e4SLinus Torvalds "Forcibly enable the PIIX4 at the given address. " 1181da177e4SLinus Torvalds "EXTREMELY DANGEROUS!"); 1191da177e4SLinus Torvalds 120b1c1759cSDavid Milburn static int srvrworks_csb5_delay; 121d6072f84SJean Delvare static struct pci_driver piix4_driver; 1221da177e4SLinus Torvalds 1230b255e92SBill Pemberton static const struct dmi_system_id piix4_dmi_blacklist[] = { 124c2fc54fcSJean Delvare { 125c2fc54fcSJean Delvare .ident = "Sapphire AM2RD790", 126c2fc54fcSJean Delvare .matches = { 127c2fc54fcSJean Delvare DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."), 128c2fc54fcSJean Delvare DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"), 129c2fc54fcSJean Delvare }, 130c2fc54fcSJean Delvare }, 131c2fc54fcSJean Delvare { 132c2fc54fcSJean Delvare .ident = "DFI Lanparty UT 790FX", 133c2fc54fcSJean Delvare .matches = { 134c2fc54fcSJean Delvare DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."), 135c2fc54fcSJean Delvare DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"), 136c2fc54fcSJean Delvare }, 137c2fc54fcSJean Delvare }, 138c2fc54fcSJean Delvare { } 139c2fc54fcSJean Delvare }; 140c2fc54fcSJean Delvare 141c2fc54fcSJean Delvare /* The IBM entry is in a separate table because we only check it 142c2fc54fcSJean Delvare on Intel-based systems */ 1430b255e92SBill Pemberton static const struct dmi_system_id piix4_dmi_ibm[] = { 1441da177e4SLinus Torvalds { 1451da177e4SLinus Torvalds .ident = "IBM", 1461da177e4SLinus Torvalds .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), }, 1471da177e4SLinus Torvalds }, 1481da177e4SLinus Torvalds { }, 1491da177e4SLinus Torvalds }; 1501da177e4SLinus Torvalds 1516befa3fdSJean Delvare /* 1526befa3fdSJean Delvare * SB800 globals 1536befa3fdSJean Delvare */ 1546befa3fdSJean Delvare static u8 piix4_port_sel_sb800; 1550fe16195SGuenter Roeck static u8 piix4_port_mask_sb800; 1560fe16195SGuenter Roeck static u8 piix4_port_shift_sb800; 157725d2e3fSChristian Fetzer static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = { 15852795f6fSJean Delvare " port 0", " port 2", " port 3", " port 4" 159725d2e3fSChristian Fetzer }; 16052795f6fSJean Delvare static const char *piix4_aux_port_name_sb800 = " port 1"; 161725d2e3fSChristian Fetzer 1624b965566STerry Bowman struct sb800_mmio_cfg { 1634b965566STerry Bowman void __iomem *addr; 1644b965566STerry Bowman struct resource *res; 1654b965566STerry Bowman bool use_mmio; 1664b965566STerry Bowman }; 1674b965566STerry Bowman 16814a8086dSAndrew Armenia struct i2c_piix4_adapdata { 16914a8086dSAndrew Armenia unsigned short smba; 1702fee61d2SChristian Fetzer 1712fee61d2SChristian Fetzer /* SB800 */ 1722fee61d2SChristian Fetzer bool sb800_main; 17388fa2dfbSRicardo Ribalda Delgado bool notify_imc; 17433f5ccc3SJean Delvare u8 port; /* Port number, shifted */ 1754b965566STerry Bowman struct sb800_mmio_cfg mmio_cfg; 17614a8086dSAndrew Armenia }; 17714a8086dSAndrew Armenia 1784b965566STerry Bowman static int piix4_sb800_region_request(struct device *dev, 1794b965566STerry Bowman struct sb800_mmio_cfg *mmio_cfg) 180bdf9bed7STerry Bowman { 1814b965566STerry Bowman if (mmio_cfg->use_mmio) { 1824b965566STerry Bowman struct resource *res; 1834b965566STerry Bowman void __iomem *addr; 1844b965566STerry Bowman 1854b965566STerry Bowman res = request_mem_region_muxed(SB800_PIIX4_FCH_PM_ADDR, 1864b965566STerry Bowman SB800_PIIX4_FCH_PM_SIZE, 1874b965566STerry Bowman "sb800_piix4_smb"); 1884b965566STerry Bowman if (!res) { 1894b965566STerry Bowman dev_err(dev, 1904b965566STerry Bowman "SMBus base address memory region 0x%x already in use.\n", 1914b965566STerry Bowman SB800_PIIX4_FCH_PM_ADDR); 1924b965566STerry Bowman return -EBUSY; 1934b965566STerry Bowman } 1944b965566STerry Bowman 1954b965566STerry Bowman addr = ioremap(SB800_PIIX4_FCH_PM_ADDR, 1964b965566STerry Bowman SB800_PIIX4_FCH_PM_SIZE); 1974b965566STerry Bowman if (!addr) { 1984b965566STerry Bowman release_resource(res); 1994b965566STerry Bowman dev_err(dev, "SMBus base address mapping failed.\n"); 2004b965566STerry Bowman return -ENOMEM; 2014b965566STerry Bowman } 2024b965566STerry Bowman 2034b965566STerry Bowman mmio_cfg->res = res; 2044b965566STerry Bowman mmio_cfg->addr = addr; 2054b965566STerry Bowman 2064b965566STerry Bowman return 0; 2074b965566STerry Bowman } 2084b965566STerry Bowman 209bdf9bed7STerry Bowman if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, 210bdf9bed7STerry Bowman "sb800_piix4_smb")) { 211bdf9bed7STerry Bowman dev_err(dev, 212bdf9bed7STerry Bowman "SMBus base address index region 0x%x already in use.\n", 213bdf9bed7STerry Bowman SB800_PIIX4_SMB_IDX); 214bdf9bed7STerry Bowman return -EBUSY; 215bdf9bed7STerry Bowman } 216bdf9bed7STerry Bowman 217bdf9bed7STerry Bowman return 0; 218bdf9bed7STerry Bowman } 219bdf9bed7STerry Bowman 2204b965566STerry Bowman static void piix4_sb800_region_release(struct device *dev, 2214b965566STerry Bowman struct sb800_mmio_cfg *mmio_cfg) 222bdf9bed7STerry Bowman { 2234b965566STerry Bowman if (mmio_cfg->use_mmio) { 2244b965566STerry Bowman iounmap(mmio_cfg->addr); 2254b965566STerry Bowman release_resource(mmio_cfg->res); 2264b965566STerry Bowman return; 2274b965566STerry Bowman } 2284b965566STerry Bowman 229bdf9bed7STerry Bowman release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); 230bdf9bed7STerry Bowman } 231bdf9bed7STerry Bowman 2320b255e92SBill Pemberton static int piix4_setup(struct pci_dev *PIIX4_dev, 2331da177e4SLinus Torvalds const struct pci_device_id *id) 2341da177e4SLinus Torvalds { 2351da177e4SLinus Torvalds unsigned char temp; 23614a8086dSAndrew Armenia unsigned short piix4_smba; 2371da177e4SLinus Torvalds 238b1c1759cSDavid Milburn if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && 239b1c1759cSDavid Milburn (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5)) 240b1c1759cSDavid Milburn srvrworks_csb5_delay = 1; 241b1c1759cSDavid Milburn 242c2fc54fcSJean Delvare /* On some motherboards, it was reported that accessing the SMBus 243c2fc54fcSJean Delvare caused severe hardware problems */ 244c2fc54fcSJean Delvare if (dmi_check_system(piix4_dmi_blacklist)) { 245c2fc54fcSJean Delvare dev_err(&PIIX4_dev->dev, 246c2fc54fcSJean Delvare "Accessing the SMBus on this system is unsafe!\n"); 247c2fc54fcSJean Delvare return -EPERM; 248c2fc54fcSJean Delvare } 249c2fc54fcSJean Delvare 2501da177e4SLinus Torvalds /* Don't access SMBus on IBM systems which get corrupted eeproms */ 251c2fc54fcSJean Delvare if (dmi_check_system(piix4_dmi_ibm) && 2521da177e4SLinus Torvalds PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) { 253f9ba6c04SJean Delvare dev_err(&PIIX4_dev->dev, "IBM system detected; this module " 2541da177e4SLinus Torvalds "may corrupt your serial eeprom! Refusing to load " 2551da177e4SLinus Torvalds "module!\n"); 2561da177e4SLinus Torvalds return -EPERM; 2571da177e4SLinus Torvalds } 2581da177e4SLinus Torvalds 2591da177e4SLinus Torvalds /* Determine the address of the SMBus areas */ 2601da177e4SLinus Torvalds if (force_addr) { 2611da177e4SLinus Torvalds piix4_smba = force_addr & 0xfff0; 2621da177e4SLinus Torvalds force = 0; 2631da177e4SLinus Torvalds } else { 2641da177e4SLinus Torvalds pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba); 2651da177e4SLinus Torvalds piix4_smba &= 0xfff0; 2661da177e4SLinus Torvalds if(piix4_smba == 0) { 267fa63cd56SJean Delvare dev_err(&PIIX4_dev->dev, "SMBus base address " 2681da177e4SLinus Torvalds "uninitialized - upgrade BIOS or use " 2691da177e4SLinus Torvalds "force_addr=0xaddr\n"); 2701da177e4SLinus Torvalds return -ENODEV; 2711da177e4SLinus Torvalds } 2721da177e4SLinus Torvalds } 2731da177e4SLinus Torvalds 27454fb4a05SJean Delvare if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 27518669eabSJean Delvare return -ENODEV; 27654fb4a05SJean Delvare 277d6072f84SJean Delvare if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 278fa63cd56SJean Delvare dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", 2791da177e4SLinus Torvalds piix4_smba); 280fa63cd56SJean Delvare return -EBUSY; 2811da177e4SLinus Torvalds } 2821da177e4SLinus Torvalds 2831da177e4SLinus Torvalds pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 2841da177e4SLinus Torvalds 2851da177e4SLinus Torvalds /* If force_addr is set, we program the new address here. Just to make 2861da177e4SLinus Torvalds sure, we disable the PIIX4 first. */ 2871da177e4SLinus Torvalds if (force_addr) { 2881da177e4SLinus Torvalds pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe); 2891da177e4SLinus Torvalds pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba); 2901da177e4SLinus Torvalds pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01); 2911da177e4SLinus Torvalds dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to " 2921da177e4SLinus Torvalds "new address %04x!\n", piix4_smba); 2931da177e4SLinus Torvalds } else if ((temp & 1) == 0) { 2941da177e4SLinus Torvalds if (force) { 2951da177e4SLinus Torvalds /* This should never need to be done, but has been 2961da177e4SLinus Torvalds * noted that many Dell machines have the SMBus 2971da177e4SLinus Torvalds * interface on the PIIX4 disabled!? NOTE: This assumes 2981da177e4SLinus Torvalds * I/O space and other allocations WERE done by the 2991da177e4SLinus Torvalds * Bios! Don't complain if your hardware does weird 3001da177e4SLinus Torvalds * things after enabling this. :') Check for Bios 3011da177e4SLinus Torvalds * updates before resorting to this. 3021da177e4SLinus Torvalds */ 3031da177e4SLinus Torvalds pci_write_config_byte(PIIX4_dev, SMBHSTCFG, 3041da177e4SLinus Torvalds temp | 1); 3058117e41eSJoe Perches dev_notice(&PIIX4_dev->dev, 3068117e41eSJoe Perches "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n"); 3071da177e4SLinus Torvalds } else { 3081da177e4SLinus Torvalds dev_err(&PIIX4_dev->dev, 30966f8a8ffSJean Delvare "SMBus Host Controller not enabled!\n"); 3101da177e4SLinus Torvalds release_region(piix4_smba, SMBIOSIZE); 3111da177e4SLinus Torvalds return -ENODEV; 3121da177e4SLinus Torvalds } 3131da177e4SLinus Torvalds } 3141da177e4SLinus Torvalds 31554aaa1caSRudolf Marek if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2)) 31666f8a8ffSJean Delvare dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n"); 3171da177e4SLinus Torvalds else if ((temp & 0x0E) == 0) 31866f8a8ffSJean Delvare dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n"); 3191da177e4SLinus Torvalds else 3201da177e4SLinus Torvalds dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration " 3211da177e4SLinus Torvalds "(or code out of date)!\n"); 3221da177e4SLinus Torvalds 3231da177e4SLinus Torvalds pci_read_config_byte(PIIX4_dev, SMBREV, &temp); 324fa63cd56SJean Delvare dev_info(&PIIX4_dev->dev, 325fa63cd56SJean Delvare "SMBus Host Controller at 0x%x, revision %d\n", 326fa63cd56SJean Delvare piix4_smba, temp); 3271da177e4SLinus Torvalds 32814a8086dSAndrew Armenia return piix4_smba; 3291da177e4SLinus Torvalds } 3301da177e4SLinus Torvalds 3319a8119ddSTerry Bowman static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, 3329a8119ddSTerry Bowman u8 smb_en, 3339a8119ddSTerry Bowman u8 aux, 3349a8119ddSTerry Bowman u8 *smb_en_status, 3359a8119ddSTerry Bowman unsigned short *piix4_smba) 3369a8119ddSTerry Bowman { 3374b965566STerry Bowman struct sb800_mmio_cfg mmio_cfg; 3389a8119ddSTerry Bowman u8 smba_en_lo; 3399a8119ddSTerry Bowman u8 smba_en_hi; 3409a8119ddSTerry Bowman int retval; 3419a8119ddSTerry Bowman 3424b965566STerry Bowman mmio_cfg.use_mmio = 0; 3434b965566STerry Bowman retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg); 3449a8119ddSTerry Bowman if (retval) 3459a8119ddSTerry Bowman return retval; 3469a8119ddSTerry Bowman 347c4194b26STerry Bowman if (mmio_cfg.use_mmio) { 348c4194b26STerry Bowman smba_en_lo = ioread8(mmio_cfg.addr); 349c4194b26STerry Bowman smba_en_hi = ioread8(mmio_cfg.addr + 1); 350c4194b26STerry Bowman } else { 3519a8119ddSTerry Bowman outb_p(smb_en, SB800_PIIX4_SMB_IDX); 3529a8119ddSTerry Bowman smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); 3539a8119ddSTerry Bowman outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); 3549a8119ddSTerry Bowman smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); 355c4194b26STerry Bowman } 3569a8119ddSTerry Bowman 3574b965566STerry Bowman piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); 3589a8119ddSTerry Bowman 3599a8119ddSTerry Bowman if (!smb_en) { 3609a8119ddSTerry Bowman *smb_en_status = smba_en_lo & 0x10; 3619a8119ddSTerry Bowman *piix4_smba = smba_en_hi << 8; 3629a8119ddSTerry Bowman if (aux) 3639a8119ddSTerry Bowman *piix4_smba |= 0x20; 3649a8119ddSTerry Bowman } else { 3659a8119ddSTerry Bowman *smb_en_status = smba_en_lo & 0x01; 3669a8119ddSTerry Bowman *piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; 3679a8119ddSTerry Bowman } 3689a8119ddSTerry Bowman 3699a8119ddSTerry Bowman if (!*smb_en_status) { 3709a8119ddSTerry Bowman dev_err(&PIIX4_dev->dev, 3719a8119ddSTerry Bowman "SMBus Host Controller not enabled!\n"); 3729a8119ddSTerry Bowman return -ENODEV; 3739a8119ddSTerry Bowman } 3749a8119ddSTerry Bowman 3759a8119ddSTerry Bowman return 0; 3769a8119ddSTerry Bowman } 3779a8119ddSTerry Bowman 3780b255e92SBill Pemberton static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, 379a94dd00fSRudolf Marek const struct pci_device_id *id, u8 aux) 38087e1960eSShane Huang { 38114a8086dSAndrew Armenia unsigned short piix4_smba; 3829a8119ddSTerry Bowman u8 smb_en, smb_en_status, port_sel; 383032f708bSShane Huang u8 i2ccfg, i2ccfg_offset = 0x10; 3844b965566STerry Bowman struct sb800_mmio_cfg mmio_cfg; 385bdf9bed7STerry Bowman int retval; 38687e1960eSShane Huang 3873806e94bSCrane Cai /* SB800 and later SMBus does not support forcing address */ 38887e1960eSShane Huang if (force || force_addr) { 3893806e94bSCrane Cai dev_err(&PIIX4_dev->dev, "SMBus does not support " 39087e1960eSShane Huang "forcing address!\n"); 39187e1960eSShane Huang return -EINVAL; 39287e1960eSShane Huang } 39387e1960eSShane Huang 39487e1960eSShane Huang /* Determine the address of the SMBus areas */ 395032f708bSShane Huang if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && 396032f708bSShane Huang PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && 397032f708bSShane Huang PIIX4_dev->revision >= 0x41) || 398032f708bSShane Huang (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && 399bcb29994SVincent Wan PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS && 40024beb83aSPu Wen PIIX4_dev->revision >= 0x49) || 40124beb83aSPu Wen (PIIX4_dev->vendor == PCI_VENDOR_ID_HYGON && 40224beb83aSPu Wen PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) 403032f708bSShane Huang smb_en = 0x00; 404032f708bSShane Huang else 405a94dd00fSRudolf Marek smb_en = (aux) ? 0x28 : 0x2c; 406a94dd00fSRudolf Marek 4079a8119ddSTerry Bowman retval = piix4_setup_sb800_smba(PIIX4_dev, smb_en, aux, &smb_en_status, 4089a8119ddSTerry Bowman &piix4_smba); 4099a8119ddSTerry Bowman 410bdf9bed7STerry Bowman if (retval) 411bdf9bed7STerry Bowman return retval; 41204b6fcabSGuenter Roeck 41387e1960eSShane Huang if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 41418669eabSJean Delvare return -ENODEV; 41587e1960eSShane Huang 41687e1960eSShane Huang if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 41787e1960eSShane Huang dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", 41887e1960eSShane Huang piix4_smba); 41987e1960eSShane Huang return -EBUSY; 42087e1960eSShane Huang } 42187e1960eSShane Huang 422a94dd00fSRudolf Marek /* Aux SMBus does not support IRQ information */ 423a94dd00fSRudolf Marek if (aux) { 424a94dd00fSRudolf Marek dev_info(&PIIX4_dev->dev, 42585fd0fe6SShane Huang "Auxiliary SMBus Host Controller at 0x%x\n", 42685fd0fe6SShane Huang piix4_smba); 427a94dd00fSRudolf Marek return piix4_smba; 428a94dd00fSRudolf Marek } 429a94dd00fSRudolf Marek 43087e1960eSShane Huang /* Request the SMBus I2C bus config region */ 43187e1960eSShane Huang if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) { 43287e1960eSShane Huang dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region " 43387e1960eSShane Huang "0x%x already in use!\n", piix4_smba + i2ccfg_offset); 43487e1960eSShane Huang release_region(piix4_smba, SMBIOSIZE); 43587e1960eSShane Huang return -EBUSY; 43687e1960eSShane Huang } 43787e1960eSShane Huang i2ccfg = inb_p(piix4_smba + i2ccfg_offset); 43887e1960eSShane Huang release_region(piix4_smba + i2ccfg_offset, 1); 43987e1960eSShane Huang 44087e1960eSShane Huang if (i2ccfg & 1) 44166f8a8ffSJean Delvare dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n"); 44287e1960eSShane Huang else 44366f8a8ffSJean Delvare dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n"); 44487e1960eSShane Huang 44587e1960eSShane Huang dev_info(&PIIX4_dev->dev, 44687e1960eSShane Huang "SMBus Host Controller at 0x%x, revision %d\n", 44787e1960eSShane Huang piix4_smba, i2ccfg >> 4); 44887e1960eSShane Huang 4496befa3fdSJean Delvare /* Find which register is used for port selection */ 45024beb83aSPu Wen if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD || 45124beb83aSPu Wen PIIX4_dev->vendor == PCI_VENDOR_ID_HYGON) { 452c7c06a15SAndrew Cooks if (PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS || 453c7c06a15SAndrew Cooks (PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && 454c7c06a15SAndrew Cooks PIIX4_dev->revision >= 0x1F)) { 4550fe16195SGuenter Roeck piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ; 4560fe16195SGuenter Roeck piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ; 4570fe16195SGuenter Roeck piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ; 458c7c06a15SAndrew Cooks } else { 4596befa3fdSJean Delvare piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT; 4600fe16195SGuenter Roeck piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; 4610fe16195SGuenter Roeck piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; 4620fe16195SGuenter Roeck } 4636befa3fdSJean Delvare } else { 4644b965566STerry Bowman mmio_cfg.use_mmio = 0; 4654b965566STerry Bowman retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg); 466bdf9bed7STerry Bowman if (retval) { 46704b6fcabSGuenter Roeck release_region(piix4_smba, SMBIOSIZE); 468bdf9bed7STerry Bowman return retval; 46904b6fcabSGuenter Roeck } 47004b6fcabSGuenter Roeck 4716befa3fdSJean Delvare outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX); 4726befa3fdSJean Delvare port_sel = inb_p(SB800_PIIX4_SMB_IDX + 1); 4736befa3fdSJean Delvare piix4_port_sel_sb800 = (port_sel & 0x01) ? 4746befa3fdSJean Delvare SB800_PIIX4_PORT_IDX_ALT : 4756befa3fdSJean Delvare SB800_PIIX4_PORT_IDX; 4760fe16195SGuenter Roeck piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; 4770fe16195SGuenter Roeck piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; 4784b965566STerry Bowman piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); 4796befa3fdSJean Delvare } 4806befa3fdSJean Delvare 4816befa3fdSJean Delvare dev_info(&PIIX4_dev->dev, 4826befa3fdSJean Delvare "Using register 0x%02x for SMBus port selection\n", 4836befa3fdSJean Delvare (unsigned int)piix4_port_sel_sb800); 4846befa3fdSJean Delvare 48514a8086dSAndrew Armenia return piix4_smba; 48687e1960eSShane Huang } 48787e1960eSShane Huang 4880b255e92SBill Pemberton static int piix4_setup_aux(struct pci_dev *PIIX4_dev, 4892a2f7404SAndrew Armenia const struct pci_device_id *id, 4902a2f7404SAndrew Armenia unsigned short base_reg_addr) 4912a2f7404SAndrew Armenia { 4922a2f7404SAndrew Armenia /* Set up auxiliary SMBus controllers found on some 4932a2f7404SAndrew Armenia * AMD chipsets e.g. SP5100 (SB700 derivative) */ 4942a2f7404SAndrew Armenia 4952a2f7404SAndrew Armenia unsigned short piix4_smba; 4962a2f7404SAndrew Armenia 4972a2f7404SAndrew Armenia /* Read address of auxiliary SMBus controller */ 4982a2f7404SAndrew Armenia pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba); 4992a2f7404SAndrew Armenia if ((piix4_smba & 1) == 0) { 5002a2f7404SAndrew Armenia dev_dbg(&PIIX4_dev->dev, 5012a2f7404SAndrew Armenia "Auxiliary SMBus controller not enabled\n"); 5022a2f7404SAndrew Armenia return -ENODEV; 5032a2f7404SAndrew Armenia } 5042a2f7404SAndrew Armenia 5052a2f7404SAndrew Armenia piix4_smba &= 0xfff0; 5062a2f7404SAndrew Armenia if (piix4_smba == 0) { 5072a2f7404SAndrew Armenia dev_dbg(&PIIX4_dev->dev, 5082a2f7404SAndrew Armenia "Auxiliary SMBus base address uninitialized\n"); 5092a2f7404SAndrew Armenia return -ENODEV; 5102a2f7404SAndrew Armenia } 5112a2f7404SAndrew Armenia 5122a2f7404SAndrew Armenia if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) 5132a2f7404SAndrew Armenia return -ENODEV; 5142a2f7404SAndrew Armenia 5152a2f7404SAndrew Armenia if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { 5162a2f7404SAndrew Armenia dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x " 5172a2f7404SAndrew Armenia "already in use!\n", piix4_smba); 5182a2f7404SAndrew Armenia return -EBUSY; 5192a2f7404SAndrew Armenia } 5202a2f7404SAndrew Armenia 5212a2f7404SAndrew Armenia dev_info(&PIIX4_dev->dev, 5222a2f7404SAndrew Armenia "Auxiliary SMBus Host Controller at 0x%x\n", 5232a2f7404SAndrew Armenia piix4_smba); 5242a2f7404SAndrew Armenia 5252a2f7404SAndrew Armenia return piix4_smba; 5262a2f7404SAndrew Armenia } 5272a2f7404SAndrew Armenia 528e154bf6fSAndrew Armenia static int piix4_transaction(struct i2c_adapter *piix4_adapter) 5291da177e4SLinus Torvalds { 530e154bf6fSAndrew Armenia struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter); 531e154bf6fSAndrew Armenia unsigned short piix4_smba = adapdata->smba; 5321da177e4SLinus Torvalds int temp; 5331da177e4SLinus Torvalds int result = 0; 5341da177e4SLinus Torvalds int timeout = 0; 5351da177e4SLinus Torvalds 536e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, " 5371da177e4SLinus Torvalds "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 5381da177e4SLinus Torvalds inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 5391da177e4SLinus Torvalds inb_p(SMBHSTDAT1)); 5401da177e4SLinus Torvalds 5411da177e4SLinus Torvalds /* Make sure the SMBus host is ready to start transmitting */ 5421da177e4SLinus Torvalds if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 543e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). " 5441da177e4SLinus Torvalds "Resetting...\n", temp); 5451da177e4SLinus Torvalds outb_p(temp, SMBHSTSTS); 5461da177e4SLinus Torvalds if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 547e154bf6fSAndrew Armenia dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp); 54897140342SDavid Brownell return -EBUSY; 5491da177e4SLinus Torvalds } else { 550e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "Successful!\n"); 5511da177e4SLinus Torvalds } 5521da177e4SLinus Torvalds } 5531da177e4SLinus Torvalds 5541da177e4SLinus Torvalds /* start the transaction by setting bit 6 */ 5551da177e4SLinus Torvalds outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT); 5561da177e4SLinus Torvalds 5571da177e4SLinus Torvalds /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */ 558b1c1759cSDavid Milburn if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */ 5590e89b2feSGuenter Roeck usleep_range(2000, 2100); 560b1c1759cSDavid Milburn else 5610e89b2feSGuenter Roeck usleep_range(250, 500); 562b1c1759cSDavid Milburn 563b6a31950SRoel Kluin while ((++timeout < MAX_TIMEOUT) && 564b1c1759cSDavid Milburn ((temp = inb_p(SMBHSTSTS)) & 0x01)) 5650e89b2feSGuenter Roeck usleep_range(250, 500); 5661da177e4SLinus Torvalds 5671da177e4SLinus Torvalds /* If the SMBus is still busy, we give up */ 568b6a31950SRoel Kluin if (timeout == MAX_TIMEOUT) { 569e154bf6fSAndrew Armenia dev_err(&piix4_adapter->dev, "SMBus Timeout!\n"); 57097140342SDavid Brownell result = -ETIMEDOUT; 5711da177e4SLinus Torvalds } 5721da177e4SLinus Torvalds 5731da177e4SLinus Torvalds if (temp & 0x10) { 57497140342SDavid Brownell result = -EIO; 575e154bf6fSAndrew Armenia dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n"); 5761da177e4SLinus Torvalds } 5771da177e4SLinus Torvalds 5781da177e4SLinus Torvalds if (temp & 0x08) { 57997140342SDavid Brownell result = -EIO; 580e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be " 5811da177e4SLinus Torvalds "locked until next hard reset. (sorry!)\n"); 5821da177e4SLinus Torvalds /* Clock stops and slave is stuck in mid-transmission */ 5831da177e4SLinus Torvalds } 5841da177e4SLinus Torvalds 5851da177e4SLinus Torvalds if (temp & 0x04) { 58697140342SDavid Brownell result = -ENXIO; 587e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "Error: no response!\n"); 5881da177e4SLinus Torvalds } 5891da177e4SLinus Torvalds 5901da177e4SLinus Torvalds if (inb_p(SMBHSTSTS) != 0x00) 5911da177e4SLinus Torvalds outb_p(inb(SMBHSTSTS), SMBHSTSTS); 5921da177e4SLinus Torvalds 5931da177e4SLinus Torvalds if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 594e154bf6fSAndrew Armenia dev_err(&piix4_adapter->dev, "Failed reset at end of " 5951da177e4SLinus Torvalds "transaction (%02x)\n", temp); 5961da177e4SLinus Torvalds } 597e154bf6fSAndrew Armenia dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, " 5981da177e4SLinus Torvalds "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 5991da177e4SLinus Torvalds inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 6001da177e4SLinus Torvalds inb_p(SMBHSTDAT1)); 6011da177e4SLinus Torvalds return result; 6021da177e4SLinus Torvalds } 6031da177e4SLinus Torvalds 60497140342SDavid Brownell /* Return negative errno on error. */ 6051da177e4SLinus Torvalds static s32 piix4_access(struct i2c_adapter * adap, u16 addr, 6061da177e4SLinus Torvalds unsigned short flags, char read_write, 6071da177e4SLinus Torvalds u8 command, int size, union i2c_smbus_data * data) 6081da177e4SLinus Torvalds { 60914a8086dSAndrew Armenia struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 61014a8086dSAndrew Armenia unsigned short piix4_smba = adapdata->smba; 6111da177e4SLinus Torvalds int i, len; 61297140342SDavid Brownell int status; 6131da177e4SLinus Torvalds 6141da177e4SLinus Torvalds switch (size) { 6151da177e4SLinus Torvalds case I2C_SMBUS_QUICK: 616fa63cd56SJean Delvare outb_p((addr << 1) | read_write, 6171da177e4SLinus Torvalds SMBHSTADD); 6181da177e4SLinus Torvalds size = PIIX4_QUICK; 6191da177e4SLinus Torvalds break; 6201da177e4SLinus Torvalds case I2C_SMBUS_BYTE: 621fa63cd56SJean Delvare outb_p((addr << 1) | read_write, 6221da177e4SLinus Torvalds SMBHSTADD); 6231da177e4SLinus Torvalds if (read_write == I2C_SMBUS_WRITE) 6241da177e4SLinus Torvalds outb_p(command, SMBHSTCMD); 6251da177e4SLinus Torvalds size = PIIX4_BYTE; 6261da177e4SLinus Torvalds break; 6271da177e4SLinus Torvalds case I2C_SMBUS_BYTE_DATA: 628fa63cd56SJean Delvare outb_p((addr << 1) | read_write, 6291da177e4SLinus Torvalds SMBHSTADD); 6301da177e4SLinus Torvalds outb_p(command, SMBHSTCMD); 6311da177e4SLinus Torvalds if (read_write == I2C_SMBUS_WRITE) 6321da177e4SLinus Torvalds outb_p(data->byte, SMBHSTDAT0); 6331da177e4SLinus Torvalds size = PIIX4_BYTE_DATA; 6341da177e4SLinus Torvalds break; 6351da177e4SLinus Torvalds case I2C_SMBUS_WORD_DATA: 636fa63cd56SJean Delvare outb_p((addr << 1) | read_write, 6371da177e4SLinus Torvalds SMBHSTADD); 6381da177e4SLinus Torvalds outb_p(command, SMBHSTCMD); 6391da177e4SLinus Torvalds if (read_write == I2C_SMBUS_WRITE) { 6401da177e4SLinus Torvalds outb_p(data->word & 0xff, SMBHSTDAT0); 6411da177e4SLinus Torvalds outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); 6421da177e4SLinus Torvalds } 6431da177e4SLinus Torvalds size = PIIX4_WORD_DATA; 6441da177e4SLinus Torvalds break; 6451da177e4SLinus Torvalds case I2C_SMBUS_BLOCK_DATA: 646fa63cd56SJean Delvare outb_p((addr << 1) | read_write, 6471da177e4SLinus Torvalds SMBHSTADD); 6481da177e4SLinus Torvalds outb_p(command, SMBHSTCMD); 6491da177e4SLinus Torvalds if (read_write == I2C_SMBUS_WRITE) { 6501da177e4SLinus Torvalds len = data->block[0]; 651fa63cd56SJean Delvare if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) 652fa63cd56SJean Delvare return -EINVAL; 6531da177e4SLinus Torvalds outb_p(len, SMBHSTDAT0); 654d7a4c763SWolfram Sang inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 6551da177e4SLinus Torvalds for (i = 1; i <= len; i++) 6561da177e4SLinus Torvalds outb_p(data->block[i], SMBBLKDAT); 6571da177e4SLinus Torvalds } 6581da177e4SLinus Torvalds size = PIIX4_BLOCK_DATA; 6591da177e4SLinus Torvalds break; 660ac7fc4fbSJean Delvare default: 661ac7fc4fbSJean Delvare dev_warn(&adap->dev, "Unsupported transaction %d\n", size); 662ac7fc4fbSJean Delvare return -EOPNOTSUPP; 6631da177e4SLinus Torvalds } 6641da177e4SLinus Torvalds 6651da177e4SLinus Torvalds outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT); 6661da177e4SLinus Torvalds 667e154bf6fSAndrew Armenia status = piix4_transaction(adap); 66897140342SDavid Brownell if (status) 66997140342SDavid Brownell return status; 6701da177e4SLinus Torvalds 6711da177e4SLinus Torvalds if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK)) 6721da177e4SLinus Torvalds return 0; 6731da177e4SLinus Torvalds 6741da177e4SLinus Torvalds 6751da177e4SLinus Torvalds switch (size) { 6763578a075SJean Delvare case PIIX4_BYTE: 6771da177e4SLinus Torvalds case PIIX4_BYTE_DATA: 6781da177e4SLinus Torvalds data->byte = inb_p(SMBHSTDAT0); 6791da177e4SLinus Torvalds break; 6801da177e4SLinus Torvalds case PIIX4_WORD_DATA: 6811da177e4SLinus Torvalds data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); 6821da177e4SLinus Torvalds break; 6831da177e4SLinus Torvalds case PIIX4_BLOCK_DATA: 6841da177e4SLinus Torvalds data->block[0] = inb_p(SMBHSTDAT0); 685fa63cd56SJean Delvare if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) 686fa63cd56SJean Delvare return -EPROTO; 687d7a4c763SWolfram Sang inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 6881da177e4SLinus Torvalds for (i = 1; i <= data->block[0]; i++) 6891da177e4SLinus Torvalds data->block[i] = inb_p(SMBBLKDAT); 6901da177e4SLinus Torvalds break; 6911da177e4SLinus Torvalds } 6921da177e4SLinus Torvalds return 0; 6931da177e4SLinus Torvalds } 6941da177e4SLinus Torvalds 69588fa2dfbSRicardo Ribalda Delgado static uint8_t piix4_imc_read(uint8_t idx) 69688fa2dfbSRicardo Ribalda Delgado { 69788fa2dfbSRicardo Ribalda Delgado outb_p(idx, KERNCZ_IMC_IDX); 69888fa2dfbSRicardo Ribalda Delgado return inb_p(KERNCZ_IMC_DATA); 69988fa2dfbSRicardo Ribalda Delgado } 70088fa2dfbSRicardo Ribalda Delgado 70188fa2dfbSRicardo Ribalda Delgado static void piix4_imc_write(uint8_t idx, uint8_t value) 70288fa2dfbSRicardo Ribalda Delgado { 70388fa2dfbSRicardo Ribalda Delgado outb_p(idx, KERNCZ_IMC_IDX); 70488fa2dfbSRicardo Ribalda Delgado outb_p(value, KERNCZ_IMC_DATA); 70588fa2dfbSRicardo Ribalda Delgado } 70688fa2dfbSRicardo Ribalda Delgado 70788fa2dfbSRicardo Ribalda Delgado static int piix4_imc_sleep(void) 70888fa2dfbSRicardo Ribalda Delgado { 70988fa2dfbSRicardo Ribalda Delgado int timeout = MAX_TIMEOUT; 71088fa2dfbSRicardo Ribalda Delgado 71188fa2dfbSRicardo Ribalda Delgado if (!request_muxed_region(KERNCZ_IMC_IDX, 2, "smbus_kerncz_imc")) 71288fa2dfbSRicardo Ribalda Delgado return -EBUSY; 71388fa2dfbSRicardo Ribalda Delgado 71488fa2dfbSRicardo Ribalda Delgado /* clear response register */ 71588fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x82, 0x00); 71688fa2dfbSRicardo Ribalda Delgado /* request ownership flag */ 71788fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x83, 0xB4); 71888fa2dfbSRicardo Ribalda Delgado /* kick off IMC Mailbox command 96 */ 71988fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x80, 0x96); 72088fa2dfbSRicardo Ribalda Delgado 72188fa2dfbSRicardo Ribalda Delgado while (timeout--) { 72288fa2dfbSRicardo Ribalda Delgado if (piix4_imc_read(0x82) == 0xfa) { 72388fa2dfbSRicardo Ribalda Delgado release_region(KERNCZ_IMC_IDX, 2); 72488fa2dfbSRicardo Ribalda Delgado return 0; 72588fa2dfbSRicardo Ribalda Delgado } 72688fa2dfbSRicardo Ribalda Delgado usleep_range(1000, 2000); 72788fa2dfbSRicardo Ribalda Delgado } 72888fa2dfbSRicardo Ribalda Delgado 72988fa2dfbSRicardo Ribalda Delgado release_region(KERNCZ_IMC_IDX, 2); 73088fa2dfbSRicardo Ribalda Delgado return -ETIMEDOUT; 73188fa2dfbSRicardo Ribalda Delgado } 73288fa2dfbSRicardo Ribalda Delgado 73388fa2dfbSRicardo Ribalda Delgado static void piix4_imc_wakeup(void) 73488fa2dfbSRicardo Ribalda Delgado { 73588fa2dfbSRicardo Ribalda Delgado int timeout = MAX_TIMEOUT; 73688fa2dfbSRicardo Ribalda Delgado 73788fa2dfbSRicardo Ribalda Delgado if (!request_muxed_region(KERNCZ_IMC_IDX, 2, "smbus_kerncz_imc")) 73888fa2dfbSRicardo Ribalda Delgado return; 73988fa2dfbSRicardo Ribalda Delgado 74088fa2dfbSRicardo Ribalda Delgado /* clear response register */ 74188fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x82, 0x00); 74288fa2dfbSRicardo Ribalda Delgado /* release ownership flag */ 74388fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x83, 0xB5); 74488fa2dfbSRicardo Ribalda Delgado /* kick off IMC Mailbox command 96 */ 74588fa2dfbSRicardo Ribalda Delgado piix4_imc_write(0x80, 0x96); 74688fa2dfbSRicardo Ribalda Delgado 74788fa2dfbSRicardo Ribalda Delgado while (timeout--) { 74888fa2dfbSRicardo Ribalda Delgado if (piix4_imc_read(0x82) == 0xfa) 74988fa2dfbSRicardo Ribalda Delgado break; 75088fa2dfbSRicardo Ribalda Delgado usleep_range(1000, 2000); 75188fa2dfbSRicardo Ribalda Delgado } 75288fa2dfbSRicardo Ribalda Delgado 75388fa2dfbSRicardo Ribalda Delgado release_region(KERNCZ_IMC_IDX, 2); 75488fa2dfbSRicardo Ribalda Delgado } 75588fa2dfbSRicardo Ribalda Delgado 756*d46b4ff3STerry Bowman static int piix4_sb800_port_sel(u8 port, struct sb800_mmio_cfg *mmio_cfg) 75708bc26f2STerry Bowman { 75808bc26f2STerry Bowman u8 smba_en_lo, val; 75908bc26f2STerry Bowman 760*d46b4ff3STerry Bowman if (mmio_cfg->use_mmio) { 761*d46b4ff3STerry Bowman smba_en_lo = ioread8(mmio_cfg->addr + piix4_port_sel_sb800); 762*d46b4ff3STerry Bowman val = (smba_en_lo & ~piix4_port_mask_sb800) | port; 763*d46b4ff3STerry Bowman if (smba_en_lo != val) 764*d46b4ff3STerry Bowman iowrite8(val, mmio_cfg->addr + piix4_port_sel_sb800); 765*d46b4ff3STerry Bowman 766*d46b4ff3STerry Bowman return (smba_en_lo & piix4_port_mask_sb800); 767*d46b4ff3STerry Bowman } 768*d46b4ff3STerry Bowman 76908bc26f2STerry Bowman outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); 77008bc26f2STerry Bowman smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); 77108bc26f2STerry Bowman 77208bc26f2STerry Bowman val = (smba_en_lo & ~piix4_port_mask_sb800) | port; 77308bc26f2STerry Bowman if (smba_en_lo != val) 77408bc26f2STerry Bowman outb_p(val, SB800_PIIX4_SMB_IDX + 1); 77508bc26f2STerry Bowman 77608bc26f2STerry Bowman return (smba_en_lo & piix4_port_mask_sb800); 77708bc26f2STerry Bowman } 77808bc26f2STerry Bowman 7792fee61d2SChristian Fetzer /* 7802fee61d2SChristian Fetzer * Handles access to multiple SMBus ports on the SB800. 7812fee61d2SChristian Fetzer * The port is selected by bits 2:1 of the smb_en register (0x2c). 7822fee61d2SChristian Fetzer * Returns negative errno on error. 7832fee61d2SChristian Fetzer * 7842fee61d2SChristian Fetzer * Note: The selected port must be returned to the initial selection to avoid 7852fee61d2SChristian Fetzer * problems on certain systems. 7862fee61d2SChristian Fetzer */ 7872fee61d2SChristian Fetzer static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, 7882fee61d2SChristian Fetzer unsigned short flags, char read_write, 7892fee61d2SChristian Fetzer u8 command, int size, union i2c_smbus_data *data) 7902fee61d2SChristian Fetzer { 7912fee61d2SChristian Fetzer struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 792701dc207SRicardo Ribalda unsigned short piix4_smba = adapdata->smba; 793701dc207SRicardo Ribalda int retries = MAX_TIMEOUT; 794701dc207SRicardo Ribalda int smbslvcnt; 79508bc26f2STerry Bowman u8 prev_port; 7962fee61d2SChristian Fetzer int retval; 7972fee61d2SChristian Fetzer 7984b965566STerry Bowman retval = piix4_sb800_region_request(&adap->dev, &adapdata->mmio_cfg); 799bdf9bed7STerry Bowman if (retval) 800bdf9bed7STerry Bowman return retval; 801bbb27fc3SRicardo Ribalda 802701dc207SRicardo Ribalda /* Request the SMBUS semaphore, avoid conflicts with the IMC */ 803701dc207SRicardo Ribalda smbslvcnt = inb_p(SMBSLVCNT); 804701dc207SRicardo Ribalda do { 805701dc207SRicardo Ribalda outb_p(smbslvcnt | 0x10, SMBSLVCNT); 806701dc207SRicardo Ribalda 807701dc207SRicardo Ribalda /* Check the semaphore status */ 808701dc207SRicardo Ribalda smbslvcnt = inb_p(SMBSLVCNT); 809701dc207SRicardo Ribalda if (smbslvcnt & 0x10) 810701dc207SRicardo Ribalda break; 811701dc207SRicardo Ribalda 812701dc207SRicardo Ribalda usleep_range(1000, 2000); 813701dc207SRicardo Ribalda } while (--retries); 814701dc207SRicardo Ribalda /* SMBus is still owned by the IMC, we give up */ 815bbb27fc3SRicardo Ribalda if (!retries) { 81604b6fcabSGuenter Roeck retval = -EBUSY; 81704b6fcabSGuenter Roeck goto release; 818bbb27fc3SRicardo Ribalda } 8192fee61d2SChristian Fetzer 82088fa2dfbSRicardo Ribalda Delgado /* 82188fa2dfbSRicardo Ribalda Delgado * Notify the IMC (Integrated Micro Controller) if required. 82288fa2dfbSRicardo Ribalda Delgado * Among other responsibilities, the IMC is in charge of monitoring 82388fa2dfbSRicardo Ribalda Delgado * the System fans and temperature sensors, and act accordingly. 82488fa2dfbSRicardo Ribalda Delgado * All this is done through SMBus and can/will collide 82588fa2dfbSRicardo Ribalda Delgado * with our transactions if they are long (BLOCK_DATA). 82688fa2dfbSRicardo Ribalda Delgado * Therefore we need to request the ownership flag during those 82788fa2dfbSRicardo Ribalda Delgado * transactions. 82888fa2dfbSRicardo Ribalda Delgado */ 82988fa2dfbSRicardo Ribalda Delgado if ((size == I2C_SMBUS_BLOCK_DATA) && adapdata->notify_imc) { 83088fa2dfbSRicardo Ribalda Delgado int ret; 83188fa2dfbSRicardo Ribalda Delgado 83288fa2dfbSRicardo Ribalda Delgado ret = piix4_imc_sleep(); 83388fa2dfbSRicardo Ribalda Delgado switch (ret) { 83488fa2dfbSRicardo Ribalda Delgado case -EBUSY: 83588fa2dfbSRicardo Ribalda Delgado dev_warn(&adap->dev, 83688fa2dfbSRicardo Ribalda Delgado "IMC base address index region 0x%x already in use.\n", 83788fa2dfbSRicardo Ribalda Delgado KERNCZ_IMC_IDX); 83888fa2dfbSRicardo Ribalda Delgado break; 83988fa2dfbSRicardo Ribalda Delgado case -ETIMEDOUT: 84088fa2dfbSRicardo Ribalda Delgado dev_warn(&adap->dev, 84188fa2dfbSRicardo Ribalda Delgado "Failed to communicate with the IMC.\n"); 84288fa2dfbSRicardo Ribalda Delgado break; 84388fa2dfbSRicardo Ribalda Delgado default: 84488fa2dfbSRicardo Ribalda Delgado break; 84588fa2dfbSRicardo Ribalda Delgado } 84688fa2dfbSRicardo Ribalda Delgado 84788fa2dfbSRicardo Ribalda Delgado /* If IMC communication fails do not retry */ 84888fa2dfbSRicardo Ribalda Delgado if (ret) { 84988fa2dfbSRicardo Ribalda Delgado dev_warn(&adap->dev, 85088fa2dfbSRicardo Ribalda Delgado "Continuing without IMC notification.\n"); 85188fa2dfbSRicardo Ribalda Delgado adapdata->notify_imc = false; 85288fa2dfbSRicardo Ribalda Delgado } 85388fa2dfbSRicardo Ribalda Delgado } 85488fa2dfbSRicardo Ribalda Delgado 855*d46b4ff3STerry Bowman prev_port = piix4_sb800_port_sel(adapdata->port, &adapdata->mmio_cfg); 8562fee61d2SChristian Fetzer 8572fee61d2SChristian Fetzer retval = piix4_access(adap, addr, flags, read_write, 8582fee61d2SChristian Fetzer command, size, data); 8592fee61d2SChristian Fetzer 860*d46b4ff3STerry Bowman piix4_sb800_port_sel(prev_port, &adapdata->mmio_cfg); 8612fee61d2SChristian Fetzer 862701dc207SRicardo Ribalda /* Release the semaphore */ 863701dc207SRicardo Ribalda outb_p(smbslvcnt | 0x20, SMBSLVCNT); 864701dc207SRicardo Ribalda 86588fa2dfbSRicardo Ribalda Delgado if ((size == I2C_SMBUS_BLOCK_DATA) && adapdata->notify_imc) 86688fa2dfbSRicardo Ribalda Delgado piix4_imc_wakeup(); 86788fa2dfbSRicardo Ribalda Delgado 86804b6fcabSGuenter Roeck release: 8694b965566STerry Bowman piix4_sb800_region_release(&adap->dev, &adapdata->mmio_cfg); 8702fee61d2SChristian Fetzer return retval; 8712fee61d2SChristian Fetzer } 8722fee61d2SChristian Fetzer 8731da177e4SLinus Torvalds static u32 piix4_func(struct i2c_adapter *adapter) 8741da177e4SLinus Torvalds { 8751da177e4SLinus Torvalds return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 8761da177e4SLinus Torvalds I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 8771da177e4SLinus Torvalds I2C_FUNC_SMBUS_BLOCK_DATA; 8781da177e4SLinus Torvalds } 8791da177e4SLinus Torvalds 8808f9082c5SJean Delvare static const struct i2c_algorithm smbus_algorithm = { 8811da177e4SLinus Torvalds .smbus_xfer = piix4_access, 8821da177e4SLinus Torvalds .functionality = piix4_func, 8831da177e4SLinus Torvalds }; 8841da177e4SLinus Torvalds 8852fee61d2SChristian Fetzer static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = { 8862fee61d2SChristian Fetzer .smbus_xfer = piix4_access_sb800, 8872fee61d2SChristian Fetzer .functionality = piix4_func, 8882fee61d2SChristian Fetzer }; 8892fee61d2SChristian Fetzer 890392debf1SJingoo Han static const struct pci_device_id piix4_ids[] = { 8919b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) }, 8929b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) }, 8939b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) }, 8949b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) }, 8959b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, 8969b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, 8979b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, 8983806e94bSCrane Cai { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) }, 899bcb29994SVincent Wan { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) }, 90024beb83aSPu Wen { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) }, 9019b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 9029b7389c0SJean Delvare PCI_DEVICE_ID_SERVERWORKS_OSB4) }, 9039b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 9049b7389c0SJean Delvare PCI_DEVICE_ID_SERVERWORKS_CSB5) }, 9059b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 9069b7389c0SJean Delvare PCI_DEVICE_ID_SERVERWORKS_CSB6) }, 9079b7389c0SJean Delvare { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 9089b7389c0SJean Delvare PCI_DEVICE_ID_SERVERWORKS_HT1000SB) }, 909506a8b6cSFlavio Leitner { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 910506a8b6cSFlavio Leitner PCI_DEVICE_ID_SERVERWORKS_HT1100LD) }, 9111da177e4SLinus Torvalds { 0, } 9121da177e4SLinus Torvalds }; 9131da177e4SLinus Torvalds 9141da177e4SLinus Torvalds MODULE_DEVICE_TABLE (pci, piix4_ids); 9151da177e4SLinus Torvalds 916ca2061e1SChristian Fetzer static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS]; 9172a2f7404SAndrew Armenia static struct i2c_adapter *piix4_aux_adapter; 918528d53a1SJean Delvare static int piix4_adapter_count; 919e154bf6fSAndrew Armenia 9200b255e92SBill Pemberton static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, 92188fa2dfbSRicardo Ribalda Delgado bool sb800_main, u8 port, bool notify_imc, 9220183eb8bSJean Delvare u8 hw_port_nr, const char *name, 9230183eb8bSJean Delvare struct i2c_adapter **padap) 924e154bf6fSAndrew Armenia { 925e154bf6fSAndrew Armenia struct i2c_adapter *adap; 926e154bf6fSAndrew Armenia struct i2c_piix4_adapdata *adapdata; 927e154bf6fSAndrew Armenia int retval; 928e154bf6fSAndrew Armenia 929e154bf6fSAndrew Armenia adap = kzalloc(sizeof(*adap), GFP_KERNEL); 930e154bf6fSAndrew Armenia if (adap == NULL) { 931e154bf6fSAndrew Armenia release_region(smba, SMBIOSIZE); 932e154bf6fSAndrew Armenia return -ENOMEM; 933e154bf6fSAndrew Armenia } 934e154bf6fSAndrew Armenia 935e154bf6fSAndrew Armenia adap->owner = THIS_MODULE; 936e154bf6fSAndrew Armenia adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 93783c60158SJean Delvare adap->algo = sb800_main ? &piix4_smbus_algorithm_sb800 93883c60158SJean Delvare : &smbus_algorithm; 939e154bf6fSAndrew Armenia 940e154bf6fSAndrew Armenia adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL); 941e154bf6fSAndrew Armenia if (adapdata == NULL) { 942e154bf6fSAndrew Armenia kfree(adap); 943e154bf6fSAndrew Armenia release_region(smba, SMBIOSIZE); 944e154bf6fSAndrew Armenia return -ENOMEM; 945e154bf6fSAndrew Armenia } 946e154bf6fSAndrew Armenia 947e154bf6fSAndrew Armenia adapdata->smba = smba; 94883c60158SJean Delvare adapdata->sb800_main = sb800_main; 9490fe16195SGuenter Roeck adapdata->port = port << piix4_port_shift_sb800; 95088fa2dfbSRicardo Ribalda Delgado adapdata->notify_imc = notify_imc; 951e154bf6fSAndrew Armenia 952e154bf6fSAndrew Armenia /* set up the sysfs linkage to our parent device */ 953e154bf6fSAndrew Armenia adap->dev.parent = &dev->dev; 954e154bf6fSAndrew Armenia 9550183eb8bSJean Delvare if (has_acpi_companion(&dev->dev)) { 9560183eb8bSJean Delvare acpi_preset_companion(&adap->dev, 9570183eb8bSJean Delvare ACPI_COMPANION(&dev->dev), 9580183eb8bSJean Delvare hw_port_nr); 9590183eb8bSJean Delvare } 9600183eb8bSJean Delvare 961e154bf6fSAndrew Armenia snprintf(adap->name, sizeof(adap->name), 962725d2e3fSChristian Fetzer "SMBus PIIX4 adapter%s at %04x", name, smba); 963e154bf6fSAndrew Armenia 964e154bf6fSAndrew Armenia i2c_set_adapdata(adap, adapdata); 965e154bf6fSAndrew Armenia 966e154bf6fSAndrew Armenia retval = i2c_add_adapter(adap); 967e154bf6fSAndrew Armenia if (retval) { 968e154bf6fSAndrew Armenia kfree(adapdata); 969e154bf6fSAndrew Armenia kfree(adap); 970e154bf6fSAndrew Armenia release_region(smba, SMBIOSIZE); 971e154bf6fSAndrew Armenia return retval; 972e154bf6fSAndrew Armenia } 973e154bf6fSAndrew Armenia 974e154bf6fSAndrew Armenia *padap = adap; 975e154bf6fSAndrew Armenia return 0; 976e154bf6fSAndrew Armenia } 977e154bf6fSAndrew Armenia 97888fa2dfbSRicardo Ribalda Delgado static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba, 97988fa2dfbSRicardo Ribalda Delgado bool notify_imc) 9802fee61d2SChristian Fetzer { 9812fee61d2SChristian Fetzer struct i2c_piix4_adapdata *adapdata; 9822fee61d2SChristian Fetzer int port; 9832fee61d2SChristian Fetzer int retval; 9842fee61d2SChristian Fetzer 985528d53a1SJean Delvare if (dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS || 986528d53a1SJean Delvare (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && 987528d53a1SJean Delvare dev->revision >= 0x1F)) { 988528d53a1SJean Delvare piix4_adapter_count = HUDSON2_MAIN_PORTS; 989528d53a1SJean Delvare } else { 990528d53a1SJean Delvare piix4_adapter_count = PIIX4_MAX_ADAPTERS; 991528d53a1SJean Delvare } 992528d53a1SJean Delvare 993528d53a1SJean Delvare for (port = 0; port < piix4_adapter_count; port++) { 9940183eb8bSJean Delvare u8 hw_port_nr = port == 0 ? 0 : port + 1; 9950183eb8bSJean Delvare 99688fa2dfbSRicardo Ribalda Delgado retval = piix4_add_adapter(dev, smba, true, port, notify_imc, 9970183eb8bSJean Delvare hw_port_nr, 998725d2e3fSChristian Fetzer piix4_main_port_names_sb800[port], 9992fee61d2SChristian Fetzer &piix4_main_adapters[port]); 10002fee61d2SChristian Fetzer if (retval < 0) 10012fee61d2SChristian Fetzer goto error; 10022fee61d2SChristian Fetzer } 10032fee61d2SChristian Fetzer 10042fee61d2SChristian Fetzer return retval; 10052fee61d2SChristian Fetzer 10062fee61d2SChristian Fetzer error: 10072fee61d2SChristian Fetzer dev_err(&dev->dev, 10082fee61d2SChristian Fetzer "Error setting up SB800 adapters. Unregistering!\n"); 10092fee61d2SChristian Fetzer while (--port >= 0) { 10102fee61d2SChristian Fetzer adapdata = i2c_get_adapdata(piix4_main_adapters[port]); 10112fee61d2SChristian Fetzer if (adapdata->smba) { 10122fee61d2SChristian Fetzer i2c_del_adapter(piix4_main_adapters[port]); 10132fee61d2SChristian Fetzer kfree(adapdata); 10142fee61d2SChristian Fetzer kfree(piix4_main_adapters[port]); 10152fee61d2SChristian Fetzer piix4_main_adapters[port] = NULL; 10162fee61d2SChristian Fetzer } 10172fee61d2SChristian Fetzer } 10182fee61d2SChristian Fetzer 10192fee61d2SChristian Fetzer return retval; 10202fee61d2SChristian Fetzer } 10212fee61d2SChristian Fetzer 10220b255e92SBill Pemberton static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) 10231da177e4SLinus Torvalds { 10241da177e4SLinus Torvalds int retval; 102552795f6fSJean Delvare bool is_sb800 = false; 10261da177e4SLinus Torvalds 102776b3e28fSCrane Cai if ((dev->vendor == PCI_VENDOR_ID_ATI && 102876b3e28fSCrane Cai dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && 102976b3e28fSCrane Cai dev->revision >= 0x40) || 103024beb83aSPu Wen dev->vendor == PCI_VENDOR_ID_AMD || 103124beb83aSPu Wen dev->vendor == PCI_VENDOR_ID_HYGON) { 103288fa2dfbSRicardo Ribalda Delgado bool notify_imc = false; 103352795f6fSJean Delvare is_sb800 = true; 103452795f6fSJean Delvare 103524beb83aSPu Wen if ((dev->vendor == PCI_VENDOR_ID_AMD || 103624beb83aSPu Wen dev->vendor == PCI_VENDOR_ID_HYGON) && 103788fa2dfbSRicardo Ribalda Delgado dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) { 103888fa2dfbSRicardo Ribalda Delgado u8 imc; 103988fa2dfbSRicardo Ribalda Delgado 104088fa2dfbSRicardo Ribalda Delgado /* 104188fa2dfbSRicardo Ribalda Delgado * Detect if IMC is active or not, this method is 104288fa2dfbSRicardo Ribalda Delgado * described on coreboot's AMD IMC notes 104388fa2dfbSRicardo Ribalda Delgado */ 104488fa2dfbSRicardo Ribalda Delgado pci_bus_read_config_byte(dev->bus, PCI_DEVFN(0x14, 3), 104588fa2dfbSRicardo Ribalda Delgado 0x40, &imc); 104688fa2dfbSRicardo Ribalda Delgado if (imc & 0x80) 104788fa2dfbSRicardo Ribalda Delgado notify_imc = true; 104888fa2dfbSRicardo Ribalda Delgado } 104988fa2dfbSRicardo Ribalda Delgado 105087e1960eSShane Huang /* base address location etc changed in SB800 */ 1051a94dd00fSRudolf Marek retval = piix4_setup_sb800(dev, id, 0); 105204b6fcabSGuenter Roeck if (retval < 0) 10532fee61d2SChristian Fetzer return retval; 105487e1960eSShane Huang 10552fee61d2SChristian Fetzer /* 10562fee61d2SChristian Fetzer * Try to register multiplexed main SMBus adapter, 10572fee61d2SChristian Fetzer * give up if we can't 10582fee61d2SChristian Fetzer */ 105988fa2dfbSRicardo Ribalda Delgado retval = piix4_add_adapters_sb800(dev, retval, notify_imc); 106004b6fcabSGuenter Roeck if (retval < 0) 10612fee61d2SChristian Fetzer return retval; 10622fee61d2SChristian Fetzer } else { 10632fee61d2SChristian Fetzer retval = piix4_setup(dev, id); 106414a8086dSAndrew Armenia if (retval < 0) 10651da177e4SLinus Torvalds return retval; 10661da177e4SLinus Torvalds 10672a2f7404SAndrew Armenia /* Try to register main SMBus adapter, give up if we can't */ 10680183eb8bSJean Delvare retval = piix4_add_adapter(dev, retval, false, 0, false, 0, 10690183eb8bSJean Delvare "", &piix4_main_adapters[0]); 10702a2f7404SAndrew Armenia if (retval < 0) 10712a2f7404SAndrew Armenia return retval; 10722fee61d2SChristian Fetzer } 10732a2f7404SAndrew Armenia 10742a2f7404SAndrew Armenia /* Check for auxiliary SMBus on some AMD chipsets */ 1075a94dd00fSRudolf Marek retval = -ENODEV; 1076a94dd00fSRudolf Marek 10772a2f7404SAndrew Armenia if (dev->vendor == PCI_VENDOR_ID_ATI && 1078a94dd00fSRudolf Marek dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) { 1079a94dd00fSRudolf Marek if (dev->revision < 0x40) { 10802a2f7404SAndrew Armenia retval = piix4_setup_aux(dev, id, 0x58); 1081a94dd00fSRudolf Marek } else { 1082a94dd00fSRudolf Marek /* SB800 added aux bus too */ 1083a94dd00fSRudolf Marek retval = piix4_setup_sb800(dev, id, 1); 1084a94dd00fSRudolf Marek } 1085a94dd00fSRudolf Marek } 1086a94dd00fSRudolf Marek 1087a94dd00fSRudolf Marek if (dev->vendor == PCI_VENDOR_ID_AMD && 1088f27237c1SAdam Honse (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS || 1089f27237c1SAdam Honse dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) { 1090a94dd00fSRudolf Marek retval = piix4_setup_sb800(dev, id, 1); 1091a94dd00fSRudolf Marek } 1092a94dd00fSRudolf Marek 10932a2f7404SAndrew Armenia if (retval > 0) { 10942a2f7404SAndrew Armenia /* Try to add the aux adapter if it exists, 10952a2f7404SAndrew Armenia * piix4_add_adapter will clean up if this fails */ 10960183eb8bSJean Delvare piix4_add_adapter(dev, retval, false, 0, false, 1, 109752795f6fSJean Delvare is_sb800 ? piix4_aux_port_name_sb800 : "", 1098725d2e3fSChristian Fetzer &piix4_aux_adapter); 10992a2f7404SAndrew Armenia } 11002a2f7404SAndrew Armenia 11012a2f7404SAndrew Armenia return 0; 11021da177e4SLinus Torvalds } 11031da177e4SLinus Torvalds 11040b255e92SBill Pemberton static void piix4_adap_remove(struct i2c_adapter *adap) 110514a8086dSAndrew Armenia { 110614a8086dSAndrew Armenia struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); 110714a8086dSAndrew Armenia 110814a8086dSAndrew Armenia if (adapdata->smba) { 110914a8086dSAndrew Armenia i2c_del_adapter(adap); 111004b6fcabSGuenter Roeck if (adapdata->port == (0 << piix4_port_shift_sb800)) 111114a8086dSAndrew Armenia release_region(adapdata->smba, SMBIOSIZE); 1112e154bf6fSAndrew Armenia kfree(adapdata); 1113e154bf6fSAndrew Armenia kfree(adap); 111414a8086dSAndrew Armenia } 111514a8086dSAndrew Armenia } 111614a8086dSAndrew Armenia 11170b255e92SBill Pemberton static void piix4_remove(struct pci_dev *dev) 11181da177e4SLinus Torvalds { 1119528d53a1SJean Delvare int port = piix4_adapter_count; 1120ca2061e1SChristian Fetzer 1121ca2061e1SChristian Fetzer while (--port >= 0) { 1122ca2061e1SChristian Fetzer if (piix4_main_adapters[port]) { 1123ca2061e1SChristian Fetzer piix4_adap_remove(piix4_main_adapters[port]); 1124ca2061e1SChristian Fetzer piix4_main_adapters[port] = NULL; 1125ca2061e1SChristian Fetzer } 1126e154bf6fSAndrew Armenia } 11272a2f7404SAndrew Armenia 11282a2f7404SAndrew Armenia if (piix4_aux_adapter) { 11292a2f7404SAndrew Armenia piix4_adap_remove(piix4_aux_adapter); 11302a2f7404SAndrew Armenia piix4_aux_adapter = NULL; 11312a2f7404SAndrew Armenia } 11321da177e4SLinus Torvalds } 11331da177e4SLinus Torvalds 11341da177e4SLinus Torvalds static struct pci_driver piix4_driver = { 11351da177e4SLinus Torvalds .name = "piix4_smbus", 11361da177e4SLinus Torvalds .id_table = piix4_ids, 11371da177e4SLinus Torvalds .probe = piix4_probe, 11380b255e92SBill Pemberton .remove = piix4_remove, 11391da177e4SLinus Torvalds }; 11401da177e4SLinus Torvalds 114156f21788SAxel Lin module_pci_driver(piix4_driver); 11421da177e4SLinus Torvalds 1143f80531c8SJarkko Nikula MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>"); 1144f80531c8SJarkko Nikula MODULE_AUTHOR("Philip Edelbrock <phil@netroedge.com>"); 11451da177e4SLinus Torvalds MODULE_DESCRIPTION("PIIX4 SMBus driver"); 11461da177e4SLinus Torvalds MODULE_LICENSE("GPL"); 1147