1 /* 2 SMBus driver for nVidia nForce2 MCP 3 4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, 5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>, 6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, 7 Based on 8 SMBus 2.0 driver for AMD-8111 IO-Hub 9 Copyright (c) 2002 Vojtech Pavlik 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 /* 27 SUPPORTED DEVICES PCI ID 28 nForce2 MCP 0064 29 nForce2 Ultra 400 MCP 0084 30 nForce3 Pro150 MCP 00D4 31 nForce3 250Gb MCP 00E4 32 nForce4 MCP 0052 33 nForce4 MCP-04 0034 34 nForce4 MCP51 0264 35 nForce4 MCP55 0368 36 nForce MCP61 03EB 37 nForce MCP65 0446 38 39 This driver supports the 2 SMBuses that are included in the MCP of the 40 nForce2/3/4/5xx chipsets. 41 */ 42 43 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 44 45 #include <linux/module.h> 46 #include <linux/pci.h> 47 #include <linux/kernel.h> 48 #include <linux/stddef.h> 49 #include <linux/ioport.h> 50 #include <linux/init.h> 51 #include <linux/i2c.h> 52 #include <linux/delay.h> 53 #include <linux/dmi.h> 54 #include <asm/io.h> 55 56 MODULE_LICENSE("GPL"); 57 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>"); 58 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); 59 60 61 struct nforce2_smbus { 62 struct i2c_adapter adapter; 63 int base; 64 int size; 65 int blockops; 66 int can_abort; 67 }; 68 69 70 /* 71 * nVidia nForce2 SMBus control register definitions 72 * (Newer incarnations use standard BARs 4 and 5 instead) 73 */ 74 #define NFORCE_PCI_SMB1 0x50 75 #define NFORCE_PCI_SMB2 0x54 76 77 78 /* 79 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model 80 */ 81 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ 82 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ 83 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 84 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 85 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 86 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data 87 bytes */ 88 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to 89 check the status of 90 the abort command */ 91 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */ 92 93 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that 94 abort succeeded */ 95 #define NVIDIA_SMB_CTRL_ABORT 0x20 96 #define NVIDIA_SMB_STS_DONE 0x80 97 #define NVIDIA_SMB_STS_ALRM 0x40 98 #define NVIDIA_SMB_STS_RES 0x20 99 #define NVIDIA_SMB_STS_STATUS 0x1f 100 101 #define NVIDIA_SMB_PRTCL_WRITE 0x00 102 #define NVIDIA_SMB_PRTCL_READ 0x01 103 #define NVIDIA_SMB_PRTCL_QUICK 0x02 104 #define NVIDIA_SMB_PRTCL_BYTE 0x04 105 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 106 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 107 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a 108 #define NVIDIA_SMB_PRTCL_PEC 0x80 109 110 /* Misc definitions */ 111 #define MAX_TIMEOUT 100 112 113 /* We disable the second SMBus channel on these boards */ 114 static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = { 115 { 116 .ident = "DFI Lanparty NF4 Expert", 117 .matches = { 118 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"), 119 DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"), 120 }, 121 }, 122 { } 123 }; 124 125 static struct pci_driver nforce2_driver; 126 127 static void nforce2_abort(struct i2c_adapter *adap) 128 { 129 struct nforce2_smbus *smbus = adap->algo_data; 130 int timeout = 0; 131 unsigned char temp; 132 133 dev_dbg(&adap->dev, "Aborting current transaction\n"); 134 135 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL); 136 do { 137 msleep(1); 138 temp = inb_p(NVIDIA_SMB_STATUS_ABRT); 139 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) && 140 (timeout++ < MAX_TIMEOUT)); 141 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS)) 142 dev_err(&adap->dev, "Can't reset the smbus\n"); 143 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT); 144 } 145 146 static int nforce2_check_status(struct i2c_adapter *adap) 147 { 148 struct nforce2_smbus *smbus = adap->algo_data; 149 int timeout = 0; 150 unsigned char temp; 151 152 do { 153 msleep(1); 154 temp = inb_p(NVIDIA_SMB_STS); 155 } while ((!temp) && (timeout++ < MAX_TIMEOUT)); 156 157 if (timeout >= MAX_TIMEOUT) { 158 dev_dbg(&adap->dev, "SMBus Timeout!\n"); 159 if (smbus->can_abort) 160 nforce2_abort(adap); 161 return -1; 162 } 163 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { 164 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp); 165 return -1; 166 } 167 return 0; 168 } 169 170 /* Return -1 on error */ 171 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 172 unsigned short flags, char read_write, 173 u8 command, int size, union i2c_smbus_data * data) 174 { 175 struct nforce2_smbus *smbus = adap->algo_data; 176 unsigned char protocol, pec; 177 u8 len; 178 int i; 179 180 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 181 NVIDIA_SMB_PRTCL_WRITE; 182 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 183 184 switch (size) { 185 186 case I2C_SMBUS_QUICK: 187 protocol |= NVIDIA_SMB_PRTCL_QUICK; 188 read_write = I2C_SMBUS_WRITE; 189 break; 190 191 case I2C_SMBUS_BYTE: 192 if (read_write == I2C_SMBUS_WRITE) 193 outb_p(command, NVIDIA_SMB_CMD); 194 protocol |= NVIDIA_SMB_PRTCL_BYTE; 195 break; 196 197 case I2C_SMBUS_BYTE_DATA: 198 outb_p(command, NVIDIA_SMB_CMD); 199 if (read_write == I2C_SMBUS_WRITE) 200 outb_p(data->byte, NVIDIA_SMB_DATA); 201 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; 202 break; 203 204 case I2C_SMBUS_WORD_DATA: 205 outb_p(command, NVIDIA_SMB_CMD); 206 if (read_write == I2C_SMBUS_WRITE) { 207 outb_p(data->word, NVIDIA_SMB_DATA); 208 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1); 209 } 210 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 211 break; 212 213 case I2C_SMBUS_BLOCK_DATA: 214 outb_p(command, NVIDIA_SMB_CMD); 215 if (read_write == I2C_SMBUS_WRITE) { 216 len = data->block[0]; 217 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 218 dev_err(&adap->dev, 219 "Transaction failed " 220 "(requested block size: %d)\n", 221 len); 222 return -1; 223 } 224 outb_p(len, NVIDIA_SMB_BCNT); 225 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 226 outb_p(data->block[i + 1], 227 NVIDIA_SMB_DATA+i); 228 } 229 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 230 break; 231 232 default: 233 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 234 return -1; 235 } 236 237 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 238 outb_p(protocol, NVIDIA_SMB_PRTCL); 239 240 if (nforce2_check_status(adap)) 241 return -1; 242 243 if (read_write == I2C_SMBUS_WRITE) 244 return 0; 245 246 switch (size) { 247 248 case I2C_SMBUS_BYTE: 249 case I2C_SMBUS_BYTE_DATA: 250 data->byte = inb_p(NVIDIA_SMB_DATA); 251 break; 252 253 case I2C_SMBUS_WORD_DATA: 254 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 255 break; 256 257 case I2C_SMBUS_BLOCK_DATA: 258 len = inb_p(NVIDIA_SMB_BCNT); 259 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 260 dev_err(&adap->dev, "Transaction failed " 261 "(received block size: 0x%02x)\n", 262 len); 263 return -1; 264 } 265 for (i = 0; i < len; i++) 266 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i); 267 data->block[0] = len; 268 break; 269 } 270 271 return 0; 272 } 273 274 275 static u32 nforce2_func(struct i2c_adapter *adapter) 276 { 277 /* other functionality might be possible, but is not tested */ 278 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 279 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 280 I2C_FUNC_SMBUS_PEC | 281 (((struct nforce2_smbus*)adapter->algo_data)->blockops ? 282 I2C_FUNC_SMBUS_BLOCK_DATA : 0); 283 } 284 285 static struct i2c_algorithm smbus_algorithm = { 286 .smbus_xfer = nforce2_access, 287 .functionality = nforce2_func, 288 }; 289 290 291 static struct pci_device_id nforce2_ids[] = { 292 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 293 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 294 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 295 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 296 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 297 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, 298 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) }, 299 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) }, 300 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) }, 301 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) }, 302 { 0 } 303 }; 304 305 MODULE_DEVICE_TABLE (pci, nforce2_ids); 306 307 308 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar, 309 int alt_reg, struct nforce2_smbus *smbus, const char *name) 310 { 311 int error; 312 313 smbus->base = pci_resource_start(dev, bar); 314 if (smbus->base) { 315 smbus->size = pci_resource_len(dev, bar); 316 } else { 317 /* Older incarnations of the device used non-standard BARs */ 318 u16 iobase; 319 320 if (pci_read_config_word(dev, alt_reg, &iobase) 321 != PCIBIOS_SUCCESSFUL) { 322 dev_err(&dev->dev, "Error reading PCI config for %s\n", 323 name); 324 return -1; 325 } 326 327 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 328 smbus->size = 64; 329 } 330 331 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 332 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 333 smbus->base, smbus->base+smbus->size-1, name); 334 return -1; 335 } 336 smbus->adapter.owner = THIS_MODULE; 337 smbus->adapter.id = I2C_HW_SMBUS_NFORCE2; 338 smbus->adapter.class = I2C_CLASS_HWMON; 339 smbus->adapter.algo = &smbus_algorithm; 340 smbus->adapter.algo_data = smbus; 341 smbus->adapter.dev.parent = &dev->dev; 342 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 343 "SMBus nForce2 adapter at %04x", smbus->base); 344 345 error = i2c_add_adapter(&smbus->adapter); 346 if (error) { 347 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n"); 348 release_region(smbus->base, smbus->size); 349 return -1; 350 } 351 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base); 352 return 0; 353 } 354 355 356 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) 357 { 358 struct nforce2_smbus *smbuses; 359 int res1, res2; 360 361 /* we support 2 SMBus adapters */ 362 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL))) 363 return -ENOMEM; 364 pci_set_drvdata(dev, smbuses); 365 366 switch(dev->device) { 367 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS: 368 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS: 369 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS: 370 smbuses[0].blockops = 1; 371 smbuses[1].blockops = 1; 372 smbuses[0].can_abort = 1; 373 smbuses[1].can_abort = 1; 374 } 375 376 /* SMBus adapter 1 */ 377 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 378 if (res1 < 0) { 379 dev_err(&dev->dev, "Error probing SMB1.\n"); 380 smbuses[0].base = 0; /* to have a check value */ 381 } 382 /* SMBus adapter 2 */ 383 if (dmi_check_system(nforce2_dmi_blacklist2)) { 384 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n"); 385 res2 = -EPERM; 386 smbuses[1].base = 0; 387 } else { 388 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], 389 "SMB2"); 390 if (res2 < 0) { 391 dev_err(&dev->dev, "Error probing SMB2.\n"); 392 smbuses[1].base = 0; /* to have a check value */ 393 } 394 } 395 if ((res1 < 0) && (res2 < 0)) { 396 /* we did not find even one of the SMBuses, so we give up */ 397 kfree(smbuses); 398 return -ENODEV; 399 } 400 401 return 0; 402 } 403 404 405 static void __devexit nforce2_remove(struct pci_dev *dev) 406 { 407 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); 408 409 if (smbuses[0].base) { 410 i2c_del_adapter(&smbuses[0].adapter); 411 release_region(smbuses[0].base, smbuses[0].size); 412 } 413 if (smbuses[1].base) { 414 i2c_del_adapter(&smbuses[1].adapter); 415 release_region(smbuses[1].base, smbuses[1].size); 416 } 417 kfree(smbuses); 418 } 419 420 static struct pci_driver nforce2_driver = { 421 .name = "nForce2_smbus", 422 .id_table = nforce2_ids, 423 .probe = nforce2_probe, 424 .remove = __devexit_p(nforce2_remove), 425 }; 426 427 static int __init nforce2_init(void) 428 { 429 return pci_register_driver(&nforce2_driver); 430 } 431 432 static void __exit nforce2_exit(void) 433 { 434 pci_unregister_driver(&nforce2_driver); 435 } 436 437 module_init(nforce2_init); 438 module_exit(nforce2_exit); 439 440