1 /* 2 * I2C bus driver for Amlogic Meson SoCs 3 * 4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/completion.h> 13 #include <linux/i2c.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/platform_device.h> 21 #include <linux/types.h> 22 23 /* Meson I2C register map */ 24 #define REG_CTRL 0x00 25 #define REG_SLAVE_ADDR 0x04 26 #define REG_TOK_LIST0 0x08 27 #define REG_TOK_LIST1 0x0c 28 #define REG_TOK_WDATA0 0x10 29 #define REG_TOK_WDATA1 0x14 30 #define REG_TOK_RDATA0 0x18 31 #define REG_TOK_RDATA1 0x1c 32 33 /* Control register fields */ 34 #define REG_CTRL_START BIT(0) 35 #define REG_CTRL_ACK_IGNORE BIT(1) 36 #define REG_CTRL_STATUS BIT(2) 37 #define REG_CTRL_ERROR BIT(3) 38 #define REG_CTRL_CLKDIV_SHIFT 12 39 #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) 40 #define REG_CTRL_CLKDIVEXT_SHIFT 28 41 #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) 42 43 #define I2C_TIMEOUT_MS 500 44 45 enum { 46 TOKEN_END = 0, 47 TOKEN_START, 48 TOKEN_SLAVE_ADDR_WRITE, 49 TOKEN_SLAVE_ADDR_READ, 50 TOKEN_DATA, 51 TOKEN_DATA_LAST, 52 TOKEN_STOP, 53 }; 54 55 enum { 56 STATE_IDLE, 57 STATE_READ, 58 STATE_WRITE, 59 }; 60 61 struct meson_i2c_data { 62 unsigned char div_factor; 63 }; 64 65 /** 66 * struct meson_i2c - Meson I2C device private data 67 * 68 * @adap: I2C adapter instance 69 * @dev: Pointer to device structure 70 * @regs: Base address of the device memory mapped registers 71 * @clk: Pointer to clock structure 72 * @msg: Pointer to the current I2C message 73 * @state: Current state in the driver state machine 74 * @last: Flag set for the last message in the transfer 75 * @count: Number of bytes to be sent/received in current transfer 76 * @pos: Current position in the send/receive buffer 77 * @error: Flag set when an error is received 78 * @lock: To avoid race conditions between irq handler and xfer code 79 * @done: Completion used to wait for transfer termination 80 * @tokens: Sequence of tokens to be written to the device 81 * @num_tokens: Number of tokens 82 * @data: Pointer to the controlller's platform data 83 */ 84 struct meson_i2c { 85 struct i2c_adapter adap; 86 struct device *dev; 87 void __iomem *regs; 88 struct clk *clk; 89 90 struct i2c_msg *msg; 91 int state; 92 bool last; 93 int count; 94 int pos; 95 int error; 96 97 spinlock_t lock; 98 struct completion done; 99 u32 tokens[2]; 100 int num_tokens; 101 102 const struct meson_i2c_data *data; 103 }; 104 105 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask, 106 u32 val) 107 { 108 u32 data; 109 110 data = readl(i2c->regs + reg); 111 data &= ~mask; 112 data |= val & mask; 113 writel(data, i2c->regs + reg); 114 } 115 116 static void meson_i2c_reset_tokens(struct meson_i2c *i2c) 117 { 118 i2c->tokens[0] = 0; 119 i2c->tokens[1] = 0; 120 i2c->num_tokens = 0; 121 } 122 123 static void meson_i2c_add_token(struct meson_i2c *i2c, int token) 124 { 125 if (i2c->num_tokens < 8) 126 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); 127 else 128 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4); 129 130 i2c->num_tokens++; 131 } 132 133 static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq) 134 { 135 unsigned long clk_rate = clk_get_rate(i2c->clk); 136 unsigned int div; 137 138 div = DIV_ROUND_UP(clk_rate, freq * i2c->data->div_factor); 139 140 /* clock divider has 12 bits */ 141 if (div >= (1 << 12)) { 142 dev_err(i2c->dev, "requested bus frequency too low\n"); 143 div = (1 << 12) - 1; 144 } 145 146 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, 147 (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); 148 149 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, 150 (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); 151 152 dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__, 153 clk_rate, freq, div); 154 } 155 156 static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len) 157 { 158 u32 rdata0, rdata1; 159 int i; 160 161 rdata0 = readl(i2c->regs + REG_TOK_RDATA0); 162 rdata1 = readl(i2c->regs + REG_TOK_RDATA1); 163 164 dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__, 165 rdata0, rdata1, len); 166 167 for (i = 0; i < min(4, len); i++) 168 *buf++ = (rdata0 >> i * 8) & 0xff; 169 170 for (i = 4; i < min(8, len); i++) 171 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff; 172 } 173 174 static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len) 175 { 176 u32 wdata0 = 0, wdata1 = 0; 177 int i; 178 179 for (i = 0; i < min(4, len); i++) 180 wdata0 |= *buf++ << (i * 8); 181 182 for (i = 4; i < min(8, len); i++) 183 wdata1 |= *buf++ << ((i - 4) * 8); 184 185 writel(wdata0, i2c->regs + REG_TOK_WDATA0); 186 writel(wdata1, i2c->regs + REG_TOK_WDATA1); 187 188 dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__, 189 wdata0, wdata1, len); 190 } 191 192 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) 193 { 194 bool write = !(i2c->msg->flags & I2C_M_RD); 195 int i; 196 197 i2c->count = min(i2c->msg->len - i2c->pos, 8); 198 199 for (i = 0; i < i2c->count - 1; i++) 200 meson_i2c_add_token(i2c, TOKEN_DATA); 201 202 if (i2c->count) { 203 if (write || i2c->pos + i2c->count < i2c->msg->len) 204 meson_i2c_add_token(i2c, TOKEN_DATA); 205 else 206 meson_i2c_add_token(i2c, TOKEN_DATA_LAST); 207 } 208 209 if (write) 210 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); 211 212 if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) 213 meson_i2c_add_token(i2c, TOKEN_STOP); 214 215 writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0); 216 writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1); 217 } 218 219 static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) 220 { 221 struct meson_i2c *i2c = dev_id; 222 unsigned int ctrl; 223 224 spin_lock(&i2c->lock); 225 226 meson_i2c_reset_tokens(i2c); 227 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); 228 ctrl = readl(i2c->regs + REG_CTRL); 229 230 dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n", 231 i2c->state, i2c->pos, i2c->count, ctrl); 232 233 if (i2c->state == STATE_IDLE) { 234 spin_unlock(&i2c->lock); 235 return IRQ_NONE; 236 } 237 238 if (ctrl & REG_CTRL_ERROR) { 239 /* 240 * The bit is set when the IGNORE_NAK bit is cleared 241 * and the device didn't respond. In this case, the 242 * I2C controller automatically generates a STOP 243 * condition. 244 */ 245 dev_dbg(i2c->dev, "error bit set\n"); 246 i2c->error = -ENXIO; 247 i2c->state = STATE_IDLE; 248 complete(&i2c->done); 249 goto out; 250 } 251 252 if (i2c->state == STATE_READ && i2c->count) 253 meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); 254 255 i2c->pos += i2c->count; 256 257 if (i2c->pos >= i2c->msg->len) { 258 i2c->state = STATE_IDLE; 259 complete(&i2c->done); 260 goto out; 261 } 262 263 /* Restart the processing */ 264 meson_i2c_prepare_xfer(i2c); 265 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); 266 out: 267 spin_unlock(&i2c->lock); 268 269 return IRQ_HANDLED; 270 } 271 272 static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg) 273 { 274 int token; 275 276 token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : 277 TOKEN_SLAVE_ADDR_WRITE; 278 279 writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR); 280 meson_i2c_add_token(i2c, TOKEN_START); 281 meson_i2c_add_token(i2c, token); 282 } 283 284 static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, 285 int last) 286 { 287 unsigned long time_left, flags; 288 int ret = 0; 289 290 i2c->msg = msg; 291 i2c->last = last; 292 i2c->pos = 0; 293 i2c->count = 0; 294 i2c->error = 0; 295 296 meson_i2c_reset_tokens(i2c); 297 298 flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0; 299 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags); 300 301 if (!(msg->flags & I2C_M_NOSTART)) 302 meson_i2c_do_start(i2c, msg); 303 304 i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; 305 meson_i2c_prepare_xfer(i2c); 306 reinit_completion(&i2c->done); 307 308 /* Start the transfer */ 309 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); 310 311 time_left = msecs_to_jiffies(I2C_TIMEOUT_MS); 312 time_left = wait_for_completion_timeout(&i2c->done, time_left); 313 314 /* 315 * Protect access to i2c struct and registers from interrupt 316 * handlers triggered by a transfer terminated after the 317 * timeout period 318 */ 319 spin_lock_irqsave(&i2c->lock, flags); 320 321 /* Abort any active operation */ 322 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); 323 324 if (!time_left) { 325 i2c->state = STATE_IDLE; 326 ret = -ETIMEDOUT; 327 } 328 329 if (i2c->error) 330 ret = i2c->error; 331 332 spin_unlock_irqrestore(&i2c->lock, flags); 333 334 return ret; 335 } 336 337 static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, 338 int num) 339 { 340 struct meson_i2c *i2c = adap->algo_data; 341 int i, ret = 0; 342 343 clk_enable(i2c->clk); 344 345 for (i = 0; i < num; i++) { 346 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1); 347 if (ret) 348 break; 349 } 350 351 clk_disable(i2c->clk); 352 353 return ret ?: i; 354 } 355 356 static u32 meson_i2c_func(struct i2c_adapter *adap) 357 { 358 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 359 } 360 361 static const struct i2c_algorithm meson_i2c_algorithm = { 362 .master_xfer = meson_i2c_xfer, 363 .functionality = meson_i2c_func, 364 }; 365 366 static int meson_i2c_probe(struct platform_device *pdev) 367 { 368 struct device_node *np = pdev->dev.of_node; 369 struct meson_i2c *i2c; 370 struct resource *mem; 371 struct i2c_timings timings; 372 int irq, ret = 0; 373 374 i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL); 375 if (!i2c) 376 return -ENOMEM; 377 378 i2c_parse_fw_timings(&pdev->dev, &timings, true); 379 380 i2c->dev = &pdev->dev; 381 platform_set_drvdata(pdev, i2c); 382 383 spin_lock_init(&i2c->lock); 384 init_completion(&i2c->done); 385 386 i2c->data = (const struct meson_i2c_data *) 387 of_device_get_match_data(&pdev->dev); 388 389 i2c->clk = devm_clk_get(&pdev->dev, NULL); 390 if (IS_ERR(i2c->clk)) { 391 dev_err(&pdev->dev, "can't get device clock\n"); 392 return PTR_ERR(i2c->clk); 393 } 394 395 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 396 i2c->regs = devm_ioremap_resource(&pdev->dev, mem); 397 if (IS_ERR(i2c->regs)) 398 return PTR_ERR(i2c->regs); 399 400 irq = platform_get_irq(pdev, 0); 401 if (irq < 0) { 402 dev_err(&pdev->dev, "can't find IRQ\n"); 403 return irq; 404 } 405 406 ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c); 407 if (ret < 0) { 408 dev_err(&pdev->dev, "can't request IRQ\n"); 409 return ret; 410 } 411 412 ret = clk_prepare(i2c->clk); 413 if (ret < 0) { 414 dev_err(&pdev->dev, "can't prepare clock\n"); 415 return ret; 416 } 417 418 strlcpy(i2c->adap.name, "Meson I2C adapter", 419 sizeof(i2c->adap.name)); 420 i2c->adap.owner = THIS_MODULE; 421 i2c->adap.algo = &meson_i2c_algorithm; 422 i2c->adap.dev.parent = &pdev->dev; 423 i2c->adap.dev.of_node = np; 424 i2c->adap.algo_data = i2c; 425 426 /* 427 * A transfer is triggered when START bit changes from 0 to 1. 428 * Ensure that the bit is set to 0 after probe 429 */ 430 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); 431 432 ret = i2c_add_adapter(&i2c->adap); 433 if (ret < 0) { 434 clk_unprepare(i2c->clk); 435 return ret; 436 } 437 438 meson_i2c_set_clk_div(i2c, timings.bus_freq_hz); 439 440 return 0; 441 } 442 443 static int meson_i2c_remove(struct platform_device *pdev) 444 { 445 struct meson_i2c *i2c = platform_get_drvdata(pdev); 446 447 i2c_del_adapter(&i2c->adap); 448 clk_unprepare(i2c->clk); 449 450 return 0; 451 } 452 453 static const struct meson_i2c_data i2c_meson6_data = { 454 .div_factor = 4, 455 }; 456 457 static const struct meson_i2c_data i2c_gxbb_data = { 458 .div_factor = 4, 459 }; 460 461 static const struct meson_i2c_data i2c_axg_data = { 462 .div_factor = 3, 463 }; 464 465 static const struct of_device_id meson_i2c_match[] = { 466 { .compatible = "amlogic,meson6-i2c", .data = &i2c_meson6_data }, 467 { .compatible = "amlogic,meson-gxbb-i2c", .data = &i2c_gxbb_data }, 468 { .compatible = "amlogic,meson-axg-i2c", .data = &i2c_axg_data }, 469 {}, 470 }; 471 472 MODULE_DEVICE_TABLE(of, meson_i2c_match); 473 474 static struct platform_driver meson_i2c_driver = { 475 .probe = meson_i2c_probe, 476 .remove = meson_i2c_remove, 477 .driver = { 478 .name = "meson-i2c", 479 .of_match_table = meson_i2c_match, 480 }, 481 }; 482 483 module_platform_driver(meson_i2c_driver); 484 485 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver"); 486 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>"); 487 MODULE_LICENSE("GPL v2"); 488