113f35ac1SNeil Horman /* 213f35ac1SNeil Horman * This file is provided under a dual BSD/GPLv2 license. When using or 313f35ac1SNeil Horman * redistributing this file, you may do so under either license. 413f35ac1SNeil Horman * 513f35ac1SNeil Horman * Copyright(c) 2012 Intel Corporation. All rights reserved. 613f35ac1SNeil Horman * 713f35ac1SNeil Horman * GPL LICENSE SUMMARY 813f35ac1SNeil Horman * 913f35ac1SNeil Horman * This program is free software; you can redistribute it and/or modify 1013f35ac1SNeil Horman * it under the terms of version 2 of the GNU General Public License as 1113f35ac1SNeil Horman * published by the Free Software Foundation. 1213f35ac1SNeil Horman * 1313f35ac1SNeil Horman * This program is distributed in the hope that it will be useful, but 1413f35ac1SNeil Horman * WITHOUT ANY WARRANTY; without even the implied warranty of 1513f35ac1SNeil Horman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1613f35ac1SNeil Horman * General Public License for more details. 1713f35ac1SNeil Horman * The full GNU General Public License is included in this distribution 1813f35ac1SNeil Horman * in the file called LICENSE.GPL. 1913f35ac1SNeil Horman * 2013f35ac1SNeil Horman * BSD LICENSE 2113f35ac1SNeil Horman * 2213f35ac1SNeil Horman * Redistribution and use in source and binary forms, with or without 2313f35ac1SNeil Horman * modification, are permitted provided that the following conditions 2413f35ac1SNeil Horman * are met: 2513f35ac1SNeil Horman * 2613f35ac1SNeil Horman * * Redistributions of source code must retain the above copyright 2713f35ac1SNeil Horman * notice, this list of conditions and the following disclaimer. 2813f35ac1SNeil Horman * * Redistributions in binary form must reproduce the above copyright 2913f35ac1SNeil Horman * notice, this list of conditions and the following disclaimer in 3013f35ac1SNeil Horman * the documentation and/or other materials provided with the 3113f35ac1SNeil Horman * distribution. 3213f35ac1SNeil Horman * * Neither the name of Intel Corporation nor the names of its 3313f35ac1SNeil Horman * contributors may be used to endorse or promote products derived 3413f35ac1SNeil Horman * from this software without specific prior written permission. 3513f35ac1SNeil Horman * 3613f35ac1SNeil Horman * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3713f35ac1SNeil Horman * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3813f35ac1SNeil Horman * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3913f35ac1SNeil Horman * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 4013f35ac1SNeil Horman * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 4113f35ac1SNeil Horman * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 4213f35ac1SNeil Horman * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 4313f35ac1SNeil Horman * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 4413f35ac1SNeil Horman * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 4513f35ac1SNeil Horman * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 4613f35ac1SNeil Horman * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4713f35ac1SNeil Horman */ 4813f35ac1SNeil Horman 4913f35ac1SNeil Horman /* 5013f35ac1SNeil Horman * Supports the SMBus Message Transport (SMT) in the Intel Atom Processor 5113f35ac1SNeil Horman * S12xx Product Family. 5213f35ac1SNeil Horman * 5313f35ac1SNeil Horman * Features supported by this driver: 5413f35ac1SNeil Horman * Hardware PEC yes 5513f35ac1SNeil Horman * Block buffer yes 5613f35ac1SNeil Horman * Block process call transaction no 5713f35ac1SNeil Horman * Slave mode no 5813f35ac1SNeil Horman */ 5913f35ac1SNeil Horman 6013f35ac1SNeil Horman #include <linux/module.h> 6113f35ac1SNeil Horman #include <linux/pci.h> 6213f35ac1SNeil Horman #include <linux/kernel.h> 6313f35ac1SNeil Horman #include <linux/stddef.h> 6413f35ac1SNeil Horman #include <linux/completion.h> 6513f35ac1SNeil Horman #include <linux/dma-mapping.h> 6613f35ac1SNeil Horman #include <linux/i2c.h> 6713f35ac1SNeil Horman #include <linux/acpi.h> 6813f35ac1SNeil Horman #include <linux/interrupt.h> 6913f35ac1SNeil Horman 702f8e2c87SChristoph Hellwig #include <linux/io-64-nonatomic-lo-hi.h> 7113f35ac1SNeil Horman 7213f35ac1SNeil Horman /* PCI Address Constants */ 7313f35ac1SNeil Horman #define SMBBAR 0 7413f35ac1SNeil Horman 7513f35ac1SNeil Horman /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */ 7613f35ac1SNeil Horman #define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59 7713f35ac1SNeil Horman #define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a 78abaa7b0cSMika Westerberg #define PCI_DEVICE_ID_INTEL_DNV_SMT 0x19ac 79488b9269SSeth Heasley #define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15 8013f35ac1SNeil Horman 818b57cebeSFan Du #define ISMT_DESC_ENTRIES 2 /* number of descriptor entries */ 8213f35ac1SNeil Horman #define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */ 8313f35ac1SNeil Horman 8413f35ac1SNeil Horman /* Hardware Descriptor Constants - Control Field */ 8513f35ac1SNeil Horman #define ISMT_DESC_CWRL 0x01 /* Command/Write Length */ 8613f35ac1SNeil Horman #define ISMT_DESC_BLK 0X04 /* Perform Block Transaction */ 8713f35ac1SNeil Horman #define ISMT_DESC_FAIR 0x08 /* Set fairness flag upon successful arbit. */ 8813f35ac1SNeil Horman #define ISMT_DESC_PEC 0x10 /* Packet Error Code */ 8913f35ac1SNeil Horman #define ISMT_DESC_I2C 0x20 /* I2C Enable */ 9013f35ac1SNeil Horman #define ISMT_DESC_INT 0x40 /* Interrupt */ 9113f35ac1SNeil Horman #define ISMT_DESC_SOE 0x80 /* Stop On Error */ 9213f35ac1SNeil Horman 9313f35ac1SNeil Horman /* Hardware Descriptor Constants - Status Field */ 9413f35ac1SNeil Horman #define ISMT_DESC_SCS 0x01 /* Success */ 9513f35ac1SNeil Horman #define ISMT_DESC_DLTO 0x04 /* Data Low Time Out */ 9613f35ac1SNeil Horman #define ISMT_DESC_NAK 0x08 /* NAK Received */ 9713f35ac1SNeil Horman #define ISMT_DESC_CRC 0x10 /* CRC Error */ 9813f35ac1SNeil Horman #define ISMT_DESC_CLTO 0x20 /* Clock Low Time Out */ 9913f35ac1SNeil Horman #define ISMT_DESC_COL 0x40 /* Collisions */ 10013f35ac1SNeil Horman #define ISMT_DESC_LPR 0x80 /* Large Packet Received */ 10113f35ac1SNeil Horman 10213f35ac1SNeil Horman /* Macros */ 10313f35ac1SNeil Horman #define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw)) 10413f35ac1SNeil Horman 10513f35ac1SNeil Horman /* iSMT General Register address offsets (SMBBAR + <addr>) */ 10613f35ac1SNeil Horman #define ISMT_GR_GCTRL 0x000 /* General Control */ 10713f35ac1SNeil Horman #define ISMT_GR_SMTICL 0x008 /* SMT Interrupt Cause Location */ 10813f35ac1SNeil Horman #define ISMT_GR_ERRINTMSK 0x010 /* Error Interrupt Mask */ 10913f35ac1SNeil Horman #define ISMT_GR_ERRAERMSK 0x014 /* Error AER Mask */ 11013f35ac1SNeil Horman #define ISMT_GR_ERRSTS 0x018 /* Error Status */ 11113f35ac1SNeil Horman #define ISMT_GR_ERRINFO 0x01c /* Error Information */ 11213f35ac1SNeil Horman 11313f35ac1SNeil Horman /* iSMT Master Registers */ 11413f35ac1SNeil Horman #define ISMT_MSTR_MDBA 0x100 /* Master Descriptor Base Address */ 11513f35ac1SNeil Horman #define ISMT_MSTR_MCTRL 0x108 /* Master Control */ 11613f35ac1SNeil Horman #define ISMT_MSTR_MSTS 0x10c /* Master Status */ 11713f35ac1SNeil Horman #define ISMT_MSTR_MDS 0x110 /* Master Descriptor Size */ 11813f35ac1SNeil Horman #define ISMT_MSTR_RPOLICY 0x114 /* Retry Policy */ 11913f35ac1SNeil Horman 12013f35ac1SNeil Horman /* iSMT Miscellaneous Registers */ 12113f35ac1SNeil Horman #define ISMT_SPGT 0x300 /* SMBus PHY Global Timing */ 12213f35ac1SNeil Horman 12313f35ac1SNeil Horman /* General Control Register (GCTRL) bit definitions */ 12413f35ac1SNeil Horman #define ISMT_GCTRL_TRST 0x04 /* Target Reset */ 12513f35ac1SNeil Horman #define ISMT_GCTRL_KILL 0x08 /* Kill */ 12613f35ac1SNeil Horman #define ISMT_GCTRL_SRST 0x40 /* Soft Reset */ 12713f35ac1SNeil Horman 12813f35ac1SNeil Horman /* Master Control Register (MCTRL) bit definitions */ 12913f35ac1SNeil Horman #define ISMT_MCTRL_SS 0x01 /* Start/Stop */ 13013f35ac1SNeil Horman #define ISMT_MCTRL_MEIE 0x10 /* Master Error Interrupt Enable */ 13113f35ac1SNeil Horman #define ISMT_MCTRL_FMHP 0x00ff0000 /* Firmware Master Head Ptr (FMHP) */ 13213f35ac1SNeil Horman 13313f35ac1SNeil Horman /* Master Status Register (MSTS) bit definitions */ 13413f35ac1SNeil Horman #define ISMT_MSTS_HMTP 0xff0000 /* HW Master Tail Pointer (HMTP) */ 13513f35ac1SNeil Horman #define ISMT_MSTS_MIS 0x20 /* Master Interrupt Status (MIS) */ 13613f35ac1SNeil Horman #define ISMT_MSTS_MEIS 0x10 /* Master Error Int Status (MEIS) */ 13713f35ac1SNeil Horman #define ISMT_MSTS_IP 0x01 /* In Progress */ 13813f35ac1SNeil Horman 13913f35ac1SNeil Horman /* Master Descriptor Size (MDS) bit definitions */ 14013f35ac1SNeil Horman #define ISMT_MDS_MASK 0xff /* Master Descriptor Size mask (MDS) */ 14113f35ac1SNeil Horman 14213f35ac1SNeil Horman /* SMBus PHY Global Timing Register (SPGT) bit definitions */ 14313f35ac1SNeil Horman #define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */ 14413f35ac1SNeil Horman #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ 14513f35ac1SNeil Horman #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ 14613f35ac1SNeil Horman #define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */ 14713f35ac1SNeil Horman #define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */ 14813f35ac1SNeil Horman 14913f35ac1SNeil Horman 15013f35ac1SNeil Horman /* MSI Control Register (MSICTL) bit definitions */ 15113f35ac1SNeil Horman #define ISMT_MSICTL_MSIE 0x01 /* MSI Enable */ 15213f35ac1SNeil Horman 15313f35ac1SNeil Horman /* iSMT Hardware Descriptor */ 15413f35ac1SNeil Horman struct ismt_desc { 15513f35ac1SNeil Horman u8 tgtaddr_rw; /* target address & r/w bit */ 15613f35ac1SNeil Horman u8 wr_len_cmd; /* write length in bytes or a command */ 15713f35ac1SNeil Horman u8 rd_len; /* read length */ 15813f35ac1SNeil Horman u8 control; /* control bits */ 15913f35ac1SNeil Horman u8 status; /* status bits */ 16013f35ac1SNeil Horman u8 retry; /* collision retry and retry count */ 16113f35ac1SNeil Horman u8 rxbytes; /* received bytes */ 16213f35ac1SNeil Horman u8 txbytes; /* transmitted bytes */ 16313f35ac1SNeil Horman u32 dptr_low; /* lower 32 bit of the data pointer */ 16413f35ac1SNeil Horman u32 dptr_high; /* upper 32 bit of the data pointer */ 16513f35ac1SNeil Horman } __packed; 16613f35ac1SNeil Horman 16713f35ac1SNeil Horman struct ismt_priv { 16813f35ac1SNeil Horman struct i2c_adapter adapter; 1696109dbd6SAndy Shevchenko void __iomem *smba; /* PCI BAR */ 17013f35ac1SNeil Horman struct pci_dev *pci_dev; 17113f35ac1SNeil Horman struct ismt_desc *hw; /* descriptor virt base addr */ 17213f35ac1SNeil Horman dma_addr_t io_rng_dma; /* descriptor HW base addr */ 17313f35ac1SNeil Horman u8 head; /* ring buffer head pointer */ 17413f35ac1SNeil Horman struct completion cmp; /* interrupt completion */ 17513f35ac1SNeil Horman u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* temp R/W data buffer */ 17613f35ac1SNeil Horman }; 17713f35ac1SNeil Horman 17813f35ac1SNeil Horman /** 17913f35ac1SNeil Horman * ismt_ids - PCI device IDs supported by this driver 18013f35ac1SNeil Horman */ 181392debf1SJingoo Han static const struct pci_device_id ismt_ids[] = { 18213f35ac1SNeil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) }, 18313f35ac1SNeil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) }, 184abaa7b0cSMika Westerberg { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) }, 185488b9269SSeth Heasley { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) }, 18613f35ac1SNeil Horman { 0, } 18713f35ac1SNeil Horman }; 18813f35ac1SNeil Horman 18913f35ac1SNeil Horman MODULE_DEVICE_TABLE(pci, ismt_ids); 19013f35ac1SNeil Horman 19113f35ac1SNeil Horman /* Bus speed control bits for slow debuggers - refer to the docs for usage */ 19213f35ac1SNeil Horman static unsigned int bus_speed; 19313f35ac1SNeil Horman module_param(bus_speed, uint, S_IRUGO); 19413f35ac1SNeil Horman MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)"); 19513f35ac1SNeil Horman 19613f35ac1SNeil Horman /** 19713f35ac1SNeil Horman * __ismt_desc_dump() - dump the contents of a specific descriptor 19813f35ac1SNeil Horman */ 19913f35ac1SNeil Horman static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc) 20013f35ac1SNeil Horman { 20113f35ac1SNeil Horman 20213f35ac1SNeil Horman dev_dbg(dev, "Descriptor struct: %p\n", desc); 20313f35ac1SNeil Horman dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw); 20413f35ac1SNeil Horman dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd); 20513f35ac1SNeil Horman dev_dbg(dev, "\trd_len= 0x%02X\n", desc->rd_len); 20613f35ac1SNeil Horman dev_dbg(dev, "\tcontrol= 0x%02X\n", desc->control); 20713f35ac1SNeil Horman dev_dbg(dev, "\tstatus= 0x%02X\n", desc->status); 20813f35ac1SNeil Horman dev_dbg(dev, "\tretry= 0x%02X\n", desc->retry); 20913f35ac1SNeil Horman dev_dbg(dev, "\trxbytes= 0x%02X\n", desc->rxbytes); 21013f35ac1SNeil Horman dev_dbg(dev, "\ttxbytes= 0x%02X\n", desc->txbytes); 21113f35ac1SNeil Horman dev_dbg(dev, "\tdptr_low= 0x%08X\n", desc->dptr_low); 21213f35ac1SNeil Horman dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high); 21313f35ac1SNeil Horman } 21413f35ac1SNeil Horman /** 21513f35ac1SNeil Horman * ismt_desc_dump() - dump the contents of a descriptor for debug purposes 21613f35ac1SNeil Horman * @priv: iSMT private data 21713f35ac1SNeil Horman */ 21813f35ac1SNeil Horman static void ismt_desc_dump(struct ismt_priv *priv) 21913f35ac1SNeil Horman { 22013f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev; 22113f35ac1SNeil Horman struct ismt_desc *desc = &priv->hw[priv->head]; 22213f35ac1SNeil Horman 22313f35ac1SNeil Horman dev_dbg(dev, "Dump of the descriptor struct: 0x%X\n", priv->head); 22413f35ac1SNeil Horman __ismt_desc_dump(dev, desc); 22513f35ac1SNeil Horman } 22613f35ac1SNeil Horman 22713f35ac1SNeil Horman /** 22813f35ac1SNeil Horman * ismt_gen_reg_dump() - dump the iSMT General Registers 22913f35ac1SNeil Horman * @priv: iSMT private data 23013f35ac1SNeil Horman */ 23113f35ac1SNeil Horman static void ismt_gen_reg_dump(struct ismt_priv *priv) 23213f35ac1SNeil Horman { 23313f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev; 23413f35ac1SNeil Horman 23513f35ac1SNeil Horman dev_dbg(dev, "Dump of the iSMT General Registers\n"); 23613f35ac1SNeil Horman dev_dbg(dev, " GCTRL.... : (0x%p)=0x%X\n", 23713f35ac1SNeil Horman priv->smba + ISMT_GR_GCTRL, 23813f35ac1SNeil Horman readl(priv->smba + ISMT_GR_GCTRL)); 23913f35ac1SNeil Horman dev_dbg(dev, " SMTICL... : (0x%p)=0x%016llX\n", 24013f35ac1SNeil Horman priv->smba + ISMT_GR_SMTICL, 24113f35ac1SNeil Horman (long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL)); 24213f35ac1SNeil Horman dev_dbg(dev, " ERRINTMSK : (0x%p)=0x%X\n", 24313f35ac1SNeil Horman priv->smba + ISMT_GR_ERRINTMSK, 24413f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRINTMSK)); 24513f35ac1SNeil Horman dev_dbg(dev, " ERRAERMSK : (0x%p)=0x%X\n", 24613f35ac1SNeil Horman priv->smba + ISMT_GR_ERRAERMSK, 24713f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRAERMSK)); 24813f35ac1SNeil Horman dev_dbg(dev, " ERRSTS... : (0x%p)=0x%X\n", 24913f35ac1SNeil Horman priv->smba + ISMT_GR_ERRSTS, 25013f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRSTS)); 25113f35ac1SNeil Horman dev_dbg(dev, " ERRINFO.. : (0x%p)=0x%X\n", 25213f35ac1SNeil Horman priv->smba + ISMT_GR_ERRINFO, 25313f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRINFO)); 25413f35ac1SNeil Horman } 25513f35ac1SNeil Horman 25613f35ac1SNeil Horman /** 25713f35ac1SNeil Horman * ismt_mstr_reg_dump() - dump the iSMT Master Registers 25813f35ac1SNeil Horman * @priv: iSMT private data 25913f35ac1SNeil Horman */ 26013f35ac1SNeil Horman static void ismt_mstr_reg_dump(struct ismt_priv *priv) 26113f35ac1SNeil Horman { 26213f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev; 26313f35ac1SNeil Horman 26413f35ac1SNeil Horman dev_dbg(dev, "Dump of the iSMT Master Registers\n"); 26513f35ac1SNeil Horman dev_dbg(dev, " MDBA..... : (0x%p)=0x%016llX\n", 26613f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDBA, 26713f35ac1SNeil Horman (long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA)); 26813f35ac1SNeil Horman dev_dbg(dev, " MCTRL.... : (0x%p)=0x%X\n", 26913f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL, 27013f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MCTRL)); 27113f35ac1SNeil Horman dev_dbg(dev, " MSTS..... : (0x%p)=0x%X\n", 27213f35ac1SNeil Horman priv->smba + ISMT_MSTR_MSTS, 27313f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MSTS)); 27413f35ac1SNeil Horman dev_dbg(dev, " MDS...... : (0x%p)=0x%X\n", 27513f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDS, 27613f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MDS)); 27713f35ac1SNeil Horman dev_dbg(dev, " RPOLICY.. : (0x%p)=0x%X\n", 27813f35ac1SNeil Horman priv->smba + ISMT_MSTR_RPOLICY, 27913f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_RPOLICY)); 28013f35ac1SNeil Horman dev_dbg(dev, " SPGT..... : (0x%p)=0x%X\n", 28113f35ac1SNeil Horman priv->smba + ISMT_SPGT, 28213f35ac1SNeil Horman readl(priv->smba + ISMT_SPGT)); 28313f35ac1SNeil Horman } 28413f35ac1SNeil Horman 28513f35ac1SNeil Horman /** 28613f35ac1SNeil Horman * ismt_submit_desc() - add a descriptor to the ring 28713f35ac1SNeil Horman * @priv: iSMT private data 28813f35ac1SNeil Horman */ 28913f35ac1SNeil Horman static void ismt_submit_desc(struct ismt_priv *priv) 29013f35ac1SNeil Horman { 29113f35ac1SNeil Horman uint fmhp; 29213f35ac1SNeil Horman uint val; 29313f35ac1SNeil Horman 29413f35ac1SNeil Horman ismt_desc_dump(priv); 29513f35ac1SNeil Horman ismt_gen_reg_dump(priv); 29613f35ac1SNeil Horman ismt_mstr_reg_dump(priv); 29713f35ac1SNeil Horman 29813f35ac1SNeil Horman /* Set the FMHP (Firmware Master Head Pointer)*/ 29913f35ac1SNeil Horman fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16; 30013f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL); 30113f35ac1SNeil Horman writel((val & ~ISMT_MCTRL_FMHP) | fmhp, 30213f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL); 30313f35ac1SNeil Horman 30413f35ac1SNeil Horman /* Set the start bit */ 30513f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL); 30613f35ac1SNeil Horman writel(val | ISMT_MCTRL_SS, 30713f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL); 30813f35ac1SNeil Horman } 30913f35ac1SNeil Horman 31013f35ac1SNeil Horman /** 31113f35ac1SNeil Horman * ismt_process_desc() - handle the completion of the descriptor 31213f35ac1SNeil Horman * @desc: the iSMT hardware descriptor 31313f35ac1SNeil Horman * @data: data buffer from the upper layer 31413f35ac1SNeil Horman * @priv: ismt_priv struct holding our dma buffer 31513f35ac1SNeil Horman * @size: SMBus transaction type 31613f35ac1SNeil Horman * @read_write: flag to indicate if this is a read or write 31713f35ac1SNeil Horman */ 31813f35ac1SNeil Horman static int ismt_process_desc(const struct ismt_desc *desc, 31913f35ac1SNeil Horman union i2c_smbus_data *data, 32013f35ac1SNeil Horman struct ismt_priv *priv, int size, 32113f35ac1SNeil Horman char read_write) 32213f35ac1SNeil Horman { 32313f35ac1SNeil Horman u8 *dma_buffer = priv->dma_buffer; 32413f35ac1SNeil Horman 32513f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n"); 32613f35ac1SNeil Horman __ismt_desc_dump(&priv->pci_dev->dev, desc); 32713f35ac1SNeil Horman 32813f35ac1SNeil Horman if (desc->status & ISMT_DESC_SCS) { 32913f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE && 33013f35ac1SNeil Horman size != I2C_SMBUS_PROC_CALL) 33113f35ac1SNeil Horman return 0; 33213f35ac1SNeil Horman 33313f35ac1SNeil Horman switch (size) { 33413f35ac1SNeil Horman case I2C_SMBUS_BYTE: 33513f35ac1SNeil Horman case I2C_SMBUS_BYTE_DATA: 33613f35ac1SNeil Horman data->byte = dma_buffer[0]; 33713f35ac1SNeil Horman break; 33813f35ac1SNeil Horman case I2C_SMBUS_WORD_DATA: 33913f35ac1SNeil Horman case I2C_SMBUS_PROC_CALL: 34013f35ac1SNeil Horman data->word = dma_buffer[0] | (dma_buffer[1] << 8); 34113f35ac1SNeil Horman break; 34213f35ac1SNeil Horman case I2C_SMBUS_BLOCK_DATA: 343001cebf0Srobert.valiquette@intel.com case I2C_SMBUS_I2C_BLOCK_DATA: 344ba201c4fSStephen Douthit if (desc->rxbytes != dma_buffer[0] + 1) 345ba201c4fSStephen Douthit return -EMSGSIZE; 346ba201c4fSStephen Douthit 347b6c159a9SStephen Douthit memcpy(data->block, dma_buffer, desc->rxbytes); 34813f35ac1SNeil Horman break; 34913f35ac1SNeil Horman } 35013f35ac1SNeil Horman return 0; 35113f35ac1SNeil Horman } 35213f35ac1SNeil Horman 35313f35ac1SNeil Horman if (likely(desc->status & ISMT_DESC_NAK)) 35413f35ac1SNeil Horman return -ENXIO; 35513f35ac1SNeil Horman 35613f35ac1SNeil Horman if (desc->status & ISMT_DESC_CRC) 35713f35ac1SNeil Horman return -EBADMSG; 35813f35ac1SNeil Horman 35913f35ac1SNeil Horman if (desc->status & ISMT_DESC_COL) 36013f35ac1SNeil Horman return -EAGAIN; 36113f35ac1SNeil Horman 36213f35ac1SNeil Horman if (desc->status & ISMT_DESC_LPR) 36313f35ac1SNeil Horman return -EPROTO; 36413f35ac1SNeil Horman 36513f35ac1SNeil Horman if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO)) 36613f35ac1SNeil Horman return -ETIMEDOUT; 36713f35ac1SNeil Horman 36813f35ac1SNeil Horman return -EIO; 36913f35ac1SNeil Horman } 37013f35ac1SNeil Horman 37113f35ac1SNeil Horman /** 37213f35ac1SNeil Horman * ismt_access() - process an SMBus command 37313f35ac1SNeil Horman * @adap: the i2c host adapter 37413f35ac1SNeil Horman * @addr: address of the i2c/SMBus target 37513f35ac1SNeil Horman * @flags: command options 37613f35ac1SNeil Horman * @read_write: read from or write to device 37713f35ac1SNeil Horman * @command: the i2c/SMBus command to issue 37813f35ac1SNeil Horman * @size: SMBus transaction type 37913f35ac1SNeil Horman * @data: read/write data buffer 38013f35ac1SNeil Horman */ 38113f35ac1SNeil Horman static int ismt_access(struct i2c_adapter *adap, u16 addr, 38213f35ac1SNeil Horman unsigned short flags, char read_write, u8 command, 38313f35ac1SNeil Horman int size, union i2c_smbus_data *data) 38413f35ac1SNeil Horman { 38513f35ac1SNeil Horman int ret; 3861abdd5d9SNicholas Mc Guire unsigned long time_left; 38713f35ac1SNeil Horman dma_addr_t dma_addr = 0; /* address of the data buffer */ 38813f35ac1SNeil Horman u8 dma_size = 0; 38913f35ac1SNeil Horman enum dma_data_direction dma_direction = 0; 39013f35ac1SNeil Horman struct ismt_desc *desc; 39113f35ac1SNeil Horman struct ismt_priv *priv = i2c_get_adapdata(adap); 39213f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev; 39313f35ac1SNeil Horman 39413f35ac1SNeil Horman desc = &priv->hw[priv->head]; 39513f35ac1SNeil Horman 396bf416910SJames Ralston /* Initialize the DMA buffer */ 397bf416910SJames Ralston memset(priv->dma_buffer, 0, sizeof(priv->dma_buffer)); 398bf416910SJames Ralston 39913f35ac1SNeil Horman /* Initialize the descriptor */ 40013f35ac1SNeil Horman memset(desc, 0, sizeof(struct ismt_desc)); 40113f35ac1SNeil Horman desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); 40213f35ac1SNeil Horman 40313f35ac1SNeil Horman /* Initialize common control bits */ 404f92d155dSAndy Shevchenko if (likely(pci_dev_msi_enabled(priv->pci_dev))) 40513f35ac1SNeil Horman desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR; 40613f35ac1SNeil Horman else 40713f35ac1SNeil Horman desc->control = ISMT_DESC_FAIR; 40813f35ac1SNeil Horman 40913f35ac1SNeil Horman if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK) 41013f35ac1SNeil Horman && (size != I2C_SMBUS_I2C_BLOCK_DATA)) 41113f35ac1SNeil Horman desc->control |= ISMT_DESC_PEC; 41213f35ac1SNeil Horman 41313f35ac1SNeil Horman switch (size) { 41413f35ac1SNeil Horman case I2C_SMBUS_QUICK: 41513f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_QUICK\n"); 41613f35ac1SNeil Horman break; 41713f35ac1SNeil Horman 41813f35ac1SNeil Horman case I2C_SMBUS_BYTE: 41913f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) { 42013f35ac1SNeil Horman /* 42113f35ac1SNeil Horman * Send Byte 42213f35ac1SNeil Horman * The command field contains the write data 42313f35ac1SNeil Horman */ 42413f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: WRITE\n"); 42513f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL; 42613f35ac1SNeil Horman desc->wr_len_cmd = command; 42713f35ac1SNeil Horman } else { 42813f35ac1SNeil Horman /* Receive Byte */ 42913f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: READ\n"); 43013f35ac1SNeil Horman dma_size = 1; 43113f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE; 43213f35ac1SNeil Horman desc->rd_len = 1; 43313f35ac1SNeil Horman } 43413f35ac1SNeil Horman break; 43513f35ac1SNeil Horman 43613f35ac1SNeil Horman case I2C_SMBUS_BYTE_DATA: 43713f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) { 43813f35ac1SNeil Horman /* 43913f35ac1SNeil Horman * Write Byte 44013f35ac1SNeil Horman * Command plus 1 data byte 44113f35ac1SNeil Horman */ 44213f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: WRITE\n"); 44313f35ac1SNeil Horman desc->wr_len_cmd = 2; 44413f35ac1SNeil Horman dma_size = 2; 44513f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE; 44613f35ac1SNeil Horman priv->dma_buffer[0] = command; 44713f35ac1SNeil Horman priv->dma_buffer[1] = data->byte; 44813f35ac1SNeil Horman } else { 44913f35ac1SNeil Horman /* Read Byte */ 45013f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: READ\n"); 45113f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL; 45213f35ac1SNeil Horman desc->wr_len_cmd = command; 45313f35ac1SNeil Horman desc->rd_len = 1; 45413f35ac1SNeil Horman dma_size = 1; 45513f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE; 45613f35ac1SNeil Horman } 45713f35ac1SNeil Horman break; 45813f35ac1SNeil Horman 45913f35ac1SNeil Horman case I2C_SMBUS_WORD_DATA: 46013f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) { 46113f35ac1SNeil Horman /* Write Word */ 46213f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: WRITE\n"); 46313f35ac1SNeil Horman desc->wr_len_cmd = 3; 46413f35ac1SNeil Horman dma_size = 3; 46513f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE; 46613f35ac1SNeil Horman priv->dma_buffer[0] = command; 46713f35ac1SNeil Horman priv->dma_buffer[1] = data->word & 0xff; 46813f35ac1SNeil Horman priv->dma_buffer[2] = data->word >> 8; 46913f35ac1SNeil Horman } else { 47013f35ac1SNeil Horman /* Read Word */ 47113f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: READ\n"); 47213f35ac1SNeil Horman desc->wr_len_cmd = command; 47313f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL; 47413f35ac1SNeil Horman desc->rd_len = 2; 47513f35ac1SNeil Horman dma_size = 2; 47613f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE; 47713f35ac1SNeil Horman } 47813f35ac1SNeil Horman break; 47913f35ac1SNeil Horman 48013f35ac1SNeil Horman case I2C_SMBUS_PROC_CALL: 48113f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n"); 48213f35ac1SNeil Horman desc->wr_len_cmd = 3; 48313f35ac1SNeil Horman desc->rd_len = 2; 48413f35ac1SNeil Horman dma_size = 3; 48513f35ac1SNeil Horman dma_direction = DMA_BIDIRECTIONAL; 48613f35ac1SNeil Horman priv->dma_buffer[0] = command; 48713f35ac1SNeil Horman priv->dma_buffer[1] = data->word & 0xff; 48813f35ac1SNeil Horman priv->dma_buffer[2] = data->word >> 8; 48913f35ac1SNeil Horman break; 49013f35ac1SNeil Horman 49113f35ac1SNeil Horman case I2C_SMBUS_BLOCK_DATA: 49213f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) { 49313f35ac1SNeil Horman /* Block Write */ 49413f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: WRITE\n"); 49513f35ac1SNeil Horman dma_size = data->block[0] + 1; 49613f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE; 49713f35ac1SNeil Horman desc->wr_len_cmd = dma_size; 49813f35ac1SNeil Horman desc->control |= ISMT_DESC_BLK; 49913f35ac1SNeil Horman priv->dma_buffer[0] = command; 500979bbf7bSFan Du memcpy(&priv->dma_buffer[1], &data->block[1], dma_size - 1); 50113f35ac1SNeil Horman } else { 50213f35ac1SNeil Horman /* Block Read */ 50313f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: READ\n"); 50413f35ac1SNeil Horman dma_size = I2C_SMBUS_BLOCK_MAX; 50513f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE; 50613f35ac1SNeil Horman desc->rd_len = dma_size; 50713f35ac1SNeil Horman desc->wr_len_cmd = command; 50813f35ac1SNeil Horman desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL); 50913f35ac1SNeil Horman } 51013f35ac1SNeil Horman break; 51113f35ac1SNeil Horman 512001cebf0Srobert.valiquette@intel.com case I2C_SMBUS_I2C_BLOCK_DATA: 513001cebf0Srobert.valiquette@intel.com /* Make sure the length is valid */ 514001cebf0Srobert.valiquette@intel.com if (data->block[0] < 1) 515001cebf0Srobert.valiquette@intel.com data->block[0] = 1; 516001cebf0Srobert.valiquette@intel.com 517001cebf0Srobert.valiquette@intel.com if (data->block[0] > I2C_SMBUS_BLOCK_MAX) 518001cebf0Srobert.valiquette@intel.com data->block[0] = I2C_SMBUS_BLOCK_MAX; 519001cebf0Srobert.valiquette@intel.com 520001cebf0Srobert.valiquette@intel.com if (read_write == I2C_SMBUS_WRITE) { 521001cebf0Srobert.valiquette@intel.com /* i2c Block Write */ 522001cebf0Srobert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: WRITE\n"); 523001cebf0Srobert.valiquette@intel.com dma_size = data->block[0] + 1; 524001cebf0Srobert.valiquette@intel.com dma_direction = DMA_TO_DEVICE; 525001cebf0Srobert.valiquette@intel.com desc->wr_len_cmd = dma_size; 526001cebf0Srobert.valiquette@intel.com desc->control |= ISMT_DESC_I2C; 527001cebf0Srobert.valiquette@intel.com priv->dma_buffer[0] = command; 528979bbf7bSFan Du memcpy(&priv->dma_buffer[1], &data->block[1], dma_size - 1); 529001cebf0Srobert.valiquette@intel.com } else { 530001cebf0Srobert.valiquette@intel.com /* i2c Block Read */ 531001cebf0Srobert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: READ\n"); 532001cebf0Srobert.valiquette@intel.com dma_size = data->block[0]; 533001cebf0Srobert.valiquette@intel.com dma_direction = DMA_FROM_DEVICE; 534001cebf0Srobert.valiquette@intel.com desc->rd_len = dma_size; 535001cebf0Srobert.valiquette@intel.com desc->wr_len_cmd = command; 536001cebf0Srobert.valiquette@intel.com desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL); 537001cebf0Srobert.valiquette@intel.com /* 538001cebf0Srobert.valiquette@intel.com * Per the "Table 15-15. I2C Commands", 539001cebf0Srobert.valiquette@intel.com * in the External Design Specification (EDS), 540001cebf0Srobert.valiquette@intel.com * (Document Number: 508084, Revision: 2.0), 541001cebf0Srobert.valiquette@intel.com * the _rw bit must be 0 542001cebf0Srobert.valiquette@intel.com */ 543001cebf0Srobert.valiquette@intel.com desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0); 544001cebf0Srobert.valiquette@intel.com } 545001cebf0Srobert.valiquette@intel.com break; 546001cebf0Srobert.valiquette@intel.com 54713f35ac1SNeil Horman default: 54813f35ac1SNeil Horman dev_err(dev, "Unsupported transaction %d\n", 54913f35ac1SNeil Horman size); 55013f35ac1SNeil Horman return -EOPNOTSUPP; 55113f35ac1SNeil Horman } 55213f35ac1SNeil Horman 55313f35ac1SNeil Horman /* map the data buffer */ 55413f35ac1SNeil Horman if (dma_size != 0) { 55513f35ac1SNeil Horman dev_dbg(dev, " dev=%p\n", dev); 55613f35ac1SNeil Horman dev_dbg(dev, " data=%p\n", data); 55713f35ac1SNeil Horman dev_dbg(dev, " dma_buffer=%p\n", priv->dma_buffer); 55813f35ac1SNeil Horman dev_dbg(dev, " dma_size=%d\n", dma_size); 55913f35ac1SNeil Horman dev_dbg(dev, " dma_direction=%d\n", dma_direction); 56013f35ac1SNeil Horman 56113f35ac1SNeil Horman dma_addr = dma_map_single(dev, 56213f35ac1SNeil Horman priv->dma_buffer, 56313f35ac1SNeil Horman dma_size, 56413f35ac1SNeil Horman dma_direction); 56513f35ac1SNeil Horman 56613f35ac1SNeil Horman if (dma_mapping_error(dev, dma_addr)) { 56713f35ac1SNeil Horman dev_err(dev, "Error in mapping dma buffer %p\n", 56813f35ac1SNeil Horman priv->dma_buffer); 56913f35ac1SNeil Horman return -EIO; 57013f35ac1SNeil Horman } 57113f35ac1SNeil Horman 57213f35ac1SNeil Horman dev_dbg(dev, " dma_addr = 0x%016llX\n", 573724d5edaSRandy Dunlap (unsigned long long)dma_addr); 57413f35ac1SNeil Horman 57513f35ac1SNeil Horman desc->dptr_low = lower_32_bits(dma_addr); 57613f35ac1SNeil Horman desc->dptr_high = upper_32_bits(dma_addr); 57713f35ac1SNeil Horman } 57813f35ac1SNeil Horman 57916735d02SWolfram Sang reinit_completion(&priv->cmp); 58013f35ac1SNeil Horman 58113f35ac1SNeil Horman /* Add the descriptor */ 58213f35ac1SNeil Horman ismt_submit_desc(priv); 58313f35ac1SNeil Horman 58413f35ac1SNeil Horman /* Now we wait for interrupt completion, 1s */ 5851abdd5d9SNicholas Mc Guire time_left = wait_for_completion_timeout(&priv->cmp, HZ*1); 58613f35ac1SNeil Horman 58713f35ac1SNeil Horman /* unmap the data buffer */ 58813f35ac1SNeil Horman if (dma_size != 0) 58917e83549SLiwei Song dma_unmap_single(dev, dma_addr, dma_size, dma_direction); 59013f35ac1SNeil Horman 5911abdd5d9SNicholas Mc Guire if (unlikely(!time_left)) { 59213f35ac1SNeil Horman dev_err(dev, "completion wait timed out\n"); 59313f35ac1SNeil Horman ret = -ETIMEDOUT; 59413f35ac1SNeil Horman goto out; 59513f35ac1SNeil Horman } 59613f35ac1SNeil Horman 59713f35ac1SNeil Horman /* do any post processing of the descriptor here */ 59813f35ac1SNeil Horman ret = ismt_process_desc(desc, data, priv, size, read_write); 59913f35ac1SNeil Horman 60013f35ac1SNeil Horman out: 60113f35ac1SNeil Horman /* Update the ring pointer */ 60213f35ac1SNeil Horman priv->head++; 60313f35ac1SNeil Horman priv->head %= ISMT_DESC_ENTRIES; 60413f35ac1SNeil Horman 60513f35ac1SNeil Horman return ret; 60613f35ac1SNeil Horman } 60713f35ac1SNeil Horman 60813f35ac1SNeil Horman /** 60913f35ac1SNeil Horman * ismt_func() - report which i2c commands are supported by this adapter 61013f35ac1SNeil Horman * @adap: the i2c host adapter 61113f35ac1SNeil Horman */ 61213f35ac1SNeil Horman static u32 ismt_func(struct i2c_adapter *adap) 61313f35ac1SNeil Horman { 61413f35ac1SNeil Horman return I2C_FUNC_SMBUS_QUICK | 61513f35ac1SNeil Horman I2C_FUNC_SMBUS_BYTE | 61613f35ac1SNeil Horman I2C_FUNC_SMBUS_BYTE_DATA | 61713f35ac1SNeil Horman I2C_FUNC_SMBUS_WORD_DATA | 61813f35ac1SNeil Horman I2C_FUNC_SMBUS_PROC_CALL | 61913f35ac1SNeil Horman I2C_FUNC_SMBUS_BLOCK_DATA | 620001cebf0Srobert.valiquette@intel.com I2C_FUNC_SMBUS_I2C_BLOCK | 62113f35ac1SNeil Horman I2C_FUNC_SMBUS_PEC; 62213f35ac1SNeil Horman } 62313f35ac1SNeil Horman 62413f35ac1SNeil Horman /** 62513f35ac1SNeil Horman * smbus_algorithm - the adapter algorithm and supported functionality 62613f35ac1SNeil Horman * @smbus_xfer: the adapter algorithm 62713f35ac1SNeil Horman * @functionality: functionality supported by the adapter 62813f35ac1SNeil Horman */ 62913f35ac1SNeil Horman static const struct i2c_algorithm smbus_algorithm = { 63013f35ac1SNeil Horman .smbus_xfer = ismt_access, 63113f35ac1SNeil Horman .functionality = ismt_func, 63213f35ac1SNeil Horman }; 63313f35ac1SNeil Horman 63413f35ac1SNeil Horman /** 63513f35ac1SNeil Horman * ismt_handle_isr() - interrupt handler bottom half 63613f35ac1SNeil Horman * @priv: iSMT private data 63713f35ac1SNeil Horman */ 63813f35ac1SNeil Horman static irqreturn_t ismt_handle_isr(struct ismt_priv *priv) 63913f35ac1SNeil Horman { 64013f35ac1SNeil Horman complete(&priv->cmp); 64113f35ac1SNeil Horman 64213f35ac1SNeil Horman return IRQ_HANDLED; 64313f35ac1SNeil Horman } 64413f35ac1SNeil Horman 64513f35ac1SNeil Horman 64613f35ac1SNeil Horman /** 64713f35ac1SNeil Horman * ismt_do_interrupt() - IRQ interrupt handler 64813f35ac1SNeil Horman * @vec: interrupt vector 64913f35ac1SNeil Horman * @data: iSMT private data 65013f35ac1SNeil Horman */ 65113f35ac1SNeil Horman static irqreturn_t ismt_do_interrupt(int vec, void *data) 65213f35ac1SNeil Horman { 65313f35ac1SNeil Horman u32 val; 65413f35ac1SNeil Horman struct ismt_priv *priv = data; 65513f35ac1SNeil Horman 65613f35ac1SNeil Horman /* 65713f35ac1SNeil Horman * check to see it's our interrupt, return IRQ_NONE if not ours 65813f35ac1SNeil Horman * since we are sharing interrupt 65913f35ac1SNeil Horman */ 66013f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MSTS); 66113f35ac1SNeil Horman 66213f35ac1SNeil Horman if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS))) 66313f35ac1SNeil Horman return IRQ_NONE; 66413f35ac1SNeil Horman else 66513f35ac1SNeil Horman writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS, 66613f35ac1SNeil Horman priv->smba + ISMT_MSTR_MSTS); 66713f35ac1SNeil Horman 66813f35ac1SNeil Horman return ismt_handle_isr(priv); 66913f35ac1SNeil Horman } 67013f35ac1SNeil Horman 67113f35ac1SNeil Horman /** 67213f35ac1SNeil Horman * ismt_do_msi_interrupt() - MSI interrupt handler 67313f35ac1SNeil Horman * @vec: interrupt vector 67413f35ac1SNeil Horman * @data: iSMT private data 67513f35ac1SNeil Horman */ 67613f35ac1SNeil Horman static irqreturn_t ismt_do_msi_interrupt(int vec, void *data) 67713f35ac1SNeil Horman { 67813f35ac1SNeil Horman return ismt_handle_isr(data); 67913f35ac1SNeil Horman } 68013f35ac1SNeil Horman 68113f35ac1SNeil Horman /** 68213f35ac1SNeil Horman * ismt_hw_init() - initialize the iSMT hardware 68313f35ac1SNeil Horman * @priv: iSMT private data 68413f35ac1SNeil Horman */ 68513f35ac1SNeil Horman static void ismt_hw_init(struct ismt_priv *priv) 68613f35ac1SNeil Horman { 68713f35ac1SNeil Horman u32 val; 68813f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev; 68913f35ac1SNeil Horman 69013f35ac1SNeil Horman /* initialize the Master Descriptor Base Address (MDBA) */ 69113f35ac1SNeil Horman writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA); 69213f35ac1SNeil Horman 69313f35ac1SNeil Horman /* initialize the Master Control Register (MCTRL) */ 69413f35ac1SNeil Horman writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL); 69513f35ac1SNeil Horman 69613f35ac1SNeil Horman /* initialize the Master Status Register (MSTS) */ 69713f35ac1SNeil Horman writel(0, priv->smba + ISMT_MSTR_MSTS); 69813f35ac1SNeil Horman 69913f35ac1SNeil Horman /* initialize the Master Descriptor Size (MDS) */ 70013f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MDS); 70113f35ac1SNeil Horman writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1), 70213f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDS); 70313f35ac1SNeil Horman 70413f35ac1SNeil Horman /* 70513f35ac1SNeil Horman * Set the SMBus speed (could use this for slow HW debuggers) 70613f35ac1SNeil Horman */ 70713f35ac1SNeil Horman 70813f35ac1SNeil Horman val = readl(priv->smba + ISMT_SPGT); 70913f35ac1SNeil Horman 71013f35ac1SNeil Horman switch (bus_speed) { 71113f35ac1SNeil Horman case 0: 71213f35ac1SNeil Horman break; 71313f35ac1SNeil Horman 71413f35ac1SNeil Horman case 80: 71513f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 80 kHz\n"); 71613f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K), 71713f35ac1SNeil Horman priv->smba + ISMT_SPGT); 71813f35ac1SNeil Horman break; 71913f35ac1SNeil Horman 72013f35ac1SNeil Horman case 100: 72113f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 100 kHz\n"); 72213f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K), 72313f35ac1SNeil Horman priv->smba + ISMT_SPGT); 72413f35ac1SNeil Horman break; 72513f35ac1SNeil Horman 72613f35ac1SNeil Horman case 400: 72713f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 400 kHz\n"); 72813f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K), 72913f35ac1SNeil Horman priv->smba + ISMT_SPGT); 73013f35ac1SNeil Horman break; 73113f35ac1SNeil Horman 73213f35ac1SNeil Horman case 1000: 73313f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n"); 73413f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M), 73513f35ac1SNeil Horman priv->smba + ISMT_SPGT); 73613f35ac1SNeil Horman break; 73713f35ac1SNeil Horman 73813f35ac1SNeil Horman default: 73913f35ac1SNeil Horman dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n"); 74013f35ac1SNeil Horman break; 74113f35ac1SNeil Horman } 74213f35ac1SNeil Horman 74313f35ac1SNeil Horman val = readl(priv->smba + ISMT_SPGT); 74413f35ac1SNeil Horman 74513f35ac1SNeil Horman switch (val & ISMT_SPGT_SPD_MASK) { 74613f35ac1SNeil Horman case ISMT_SPGT_SPD_80K: 74713f35ac1SNeil Horman bus_speed = 80; 74813f35ac1SNeil Horman break; 74913f35ac1SNeil Horman case ISMT_SPGT_SPD_100K: 75013f35ac1SNeil Horman bus_speed = 100; 75113f35ac1SNeil Horman break; 75213f35ac1SNeil Horman case ISMT_SPGT_SPD_400K: 75313f35ac1SNeil Horman bus_speed = 400; 75413f35ac1SNeil Horman break; 75513f35ac1SNeil Horman case ISMT_SPGT_SPD_1M: 75613f35ac1SNeil Horman bus_speed = 1000; 75713f35ac1SNeil Horman break; 75813f35ac1SNeil Horman } 75913f35ac1SNeil Horman dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed); 76013f35ac1SNeil Horman } 76113f35ac1SNeil Horman 76213f35ac1SNeil Horman /** 76313f35ac1SNeil Horman * ismt_dev_init() - initialize the iSMT data structures 76413f35ac1SNeil Horman * @priv: iSMT private data 76513f35ac1SNeil Horman */ 76613f35ac1SNeil Horman static int ismt_dev_init(struct ismt_priv *priv) 76713f35ac1SNeil Horman { 76813f35ac1SNeil Horman /* allocate memory for the descriptor */ 76913f35ac1SNeil Horman priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev, 77013f35ac1SNeil Horman (ISMT_DESC_ENTRIES 77113f35ac1SNeil Horman * sizeof(struct ismt_desc)), 77213f35ac1SNeil Horman &priv->io_rng_dma, 77313f35ac1SNeil Horman GFP_KERNEL); 77413f35ac1SNeil Horman if (!priv->hw) 77513f35ac1SNeil Horman return -ENOMEM; 77613f35ac1SNeil Horman 77713f35ac1SNeil Horman memset(priv->hw, 0, (ISMT_DESC_ENTRIES * sizeof(struct ismt_desc))); 77813f35ac1SNeil Horman 77913f35ac1SNeil Horman priv->head = 0; 78013f35ac1SNeil Horman init_completion(&priv->cmp); 78113f35ac1SNeil Horman 78213f35ac1SNeil Horman return 0; 78313f35ac1SNeil Horman } 78413f35ac1SNeil Horman 78513f35ac1SNeil Horman /** 78613f35ac1SNeil Horman * ismt_int_init() - initialize interrupts 78713f35ac1SNeil Horman * @priv: iSMT private data 78813f35ac1SNeil Horman */ 78913f35ac1SNeil Horman static int ismt_int_init(struct ismt_priv *priv) 79013f35ac1SNeil Horman { 79113f35ac1SNeil Horman int err; 79213f35ac1SNeil Horman 79313f35ac1SNeil Horman /* Try using MSI interrupts */ 79413f35ac1SNeil Horman err = pci_enable_msi(priv->pci_dev); 795064181b0SAndy Shevchenko if (err) 79613f35ac1SNeil Horman goto intx; 79713f35ac1SNeil Horman 79813f35ac1SNeil Horman err = devm_request_irq(&priv->pci_dev->dev, 79913f35ac1SNeil Horman priv->pci_dev->irq, 80013f35ac1SNeil Horman ismt_do_msi_interrupt, 80113f35ac1SNeil Horman 0, 80213f35ac1SNeil Horman "ismt-msi", 80313f35ac1SNeil Horman priv); 80413f35ac1SNeil Horman if (err) { 80513f35ac1SNeil Horman pci_disable_msi(priv->pci_dev); 80613f35ac1SNeil Horman goto intx; 80713f35ac1SNeil Horman } 80813f35ac1SNeil Horman 809064181b0SAndy Shevchenko return 0; 81013f35ac1SNeil Horman 81113f35ac1SNeil Horman /* Try using legacy interrupts */ 81213f35ac1SNeil Horman intx: 813064181b0SAndy Shevchenko dev_warn(&priv->pci_dev->dev, 814064181b0SAndy Shevchenko "Unable to use MSI interrupts, falling back to legacy\n"); 815064181b0SAndy Shevchenko 81613f35ac1SNeil Horman err = devm_request_irq(&priv->pci_dev->dev, 81713f35ac1SNeil Horman priv->pci_dev->irq, 81813f35ac1SNeil Horman ismt_do_interrupt, 81913f35ac1SNeil Horman IRQF_SHARED, 82013f35ac1SNeil Horman "ismt-intx", 82113f35ac1SNeil Horman priv); 82213f35ac1SNeil Horman if (err) { 82313f35ac1SNeil Horman dev_err(&priv->pci_dev->dev, "no usable interrupts\n"); 8246befa6ddSAndy Shevchenko return err; 82513f35ac1SNeil Horman } 82613f35ac1SNeil Horman 82713f35ac1SNeil Horman return 0; 82813f35ac1SNeil Horman } 82913f35ac1SNeil Horman 83013f35ac1SNeil Horman static struct pci_driver ismt_driver; 83113f35ac1SNeil Horman 83213f35ac1SNeil Horman /** 83313f35ac1SNeil Horman * ismt_probe() - probe for iSMT devices 83413f35ac1SNeil Horman * @pdev: PCI-Express device 83513f35ac1SNeil Horman * @id: PCI-Express device ID 83613f35ac1SNeil Horman */ 83713f35ac1SNeil Horman static int 83813f35ac1SNeil Horman ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) 83913f35ac1SNeil Horman { 84013f35ac1SNeil Horman int err; 84113f35ac1SNeil Horman struct ismt_priv *priv; 84213f35ac1SNeil Horman unsigned long start, len; 84313f35ac1SNeil Horman 84413f35ac1SNeil Horman priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 84513f35ac1SNeil Horman if (!priv) 84613f35ac1SNeil Horman return -ENOMEM; 84713f35ac1SNeil Horman 84813f35ac1SNeil Horman pci_set_drvdata(pdev, priv); 8498eb5c87aSDustin Byford 85013f35ac1SNeil Horman i2c_set_adapdata(&priv->adapter, priv); 85113f35ac1SNeil Horman priv->adapter.owner = THIS_MODULE; 85213f35ac1SNeil Horman priv->adapter.class = I2C_CLASS_HWMON; 85313f35ac1SNeil Horman priv->adapter.algo = &smbus_algorithm; 85413f35ac1SNeil Horman priv->adapter.dev.parent = &pdev->dev; 8558eb5c87aSDustin Byford ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev)); 85613f35ac1SNeil Horman priv->adapter.retries = ISMT_MAX_RETRIES; 85713f35ac1SNeil Horman 85813f35ac1SNeil Horman priv->pci_dev = pdev; 85913f35ac1SNeil Horman 86013f35ac1SNeil Horman err = pcim_enable_device(pdev); 86113f35ac1SNeil Horman if (err) { 86213f35ac1SNeil Horman dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n", 86313f35ac1SNeil Horman err); 86413f35ac1SNeil Horman return err; 86513f35ac1SNeil Horman } 86613f35ac1SNeil Horman 86713f35ac1SNeil Horman /* enable bus mastering */ 86813f35ac1SNeil Horman pci_set_master(pdev); 86913f35ac1SNeil Horman 87013f35ac1SNeil Horman /* Determine the address of the SMBus area */ 87113f35ac1SNeil Horman start = pci_resource_start(pdev, SMBBAR); 87213f35ac1SNeil Horman len = pci_resource_len(pdev, SMBBAR); 87313f35ac1SNeil Horman if (!start || !len) { 87413f35ac1SNeil Horman dev_err(&pdev->dev, 87513f35ac1SNeil Horman "SMBus base address uninitialized, upgrade BIOS\n"); 87613f35ac1SNeil Horman return -ENODEV; 87713f35ac1SNeil Horman } 87813f35ac1SNeil Horman 87913f35ac1SNeil Horman snprintf(priv->adapter.name, sizeof(priv->adapter.name), 88013f35ac1SNeil Horman "SMBus iSMT adapter at %lx", start); 88113f35ac1SNeil Horman 88213f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start); 88313f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len); 88413f35ac1SNeil Horman 88513f35ac1SNeil Horman err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]); 88613f35ac1SNeil Horman if (err) { 88713f35ac1SNeil Horman dev_err(&pdev->dev, "ACPI resource conflict!\n"); 88813f35ac1SNeil Horman return err; 88913f35ac1SNeil Horman } 89013f35ac1SNeil Horman 89113f35ac1SNeil Horman err = pci_request_region(pdev, SMBBAR, ismt_driver.name); 89213f35ac1SNeil Horman if (err) { 89313f35ac1SNeil Horman dev_err(&pdev->dev, 89413f35ac1SNeil Horman "Failed to request SMBus region 0x%lx-0x%lx\n", 89513f35ac1SNeil Horman start, start + len); 89613f35ac1SNeil Horman return err; 89713f35ac1SNeil Horman } 89813f35ac1SNeil Horman 89913f35ac1SNeil Horman priv->smba = pcim_iomap(pdev, SMBBAR, len); 90013f35ac1SNeil Horman if (!priv->smba) { 90113f35ac1SNeil Horman dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n"); 902600ca080SAndy Shevchenko return -ENODEV; 90313f35ac1SNeil Horman } 90413f35ac1SNeil Horman 90513f35ac1SNeil Horman if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) || 90613f35ac1SNeil Horman (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) { 90713f35ac1SNeil Horman if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 90813f35ac1SNeil Horman (pci_set_consistent_dma_mask(pdev, 90913f35ac1SNeil Horman DMA_BIT_MASK(32)) != 0)) { 91013f35ac1SNeil Horman dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n", 91113f35ac1SNeil Horman pdev); 912600ca080SAndy Shevchenko return -ENODEV; 91313f35ac1SNeil Horman } 91413f35ac1SNeil Horman } 91513f35ac1SNeil Horman 91613f35ac1SNeil Horman err = ismt_dev_init(priv); 91713f35ac1SNeil Horman if (err) 918600ca080SAndy Shevchenko return err; 91913f35ac1SNeil Horman 92013f35ac1SNeil Horman ismt_hw_init(priv); 92113f35ac1SNeil Horman 92213f35ac1SNeil Horman err = ismt_int_init(priv); 92313f35ac1SNeil Horman if (err) 924600ca080SAndy Shevchenko return err; 92513f35ac1SNeil Horman 92613f35ac1SNeil Horman err = i2c_add_adapter(&priv->adapter); 927ea734404SWolfram Sang if (err) 928600ca080SAndy Shevchenko return -ENODEV; 92913f35ac1SNeil Horman return 0; 93013f35ac1SNeil Horman } 93113f35ac1SNeil Horman 93213f35ac1SNeil Horman /** 93313f35ac1SNeil Horman * ismt_remove() - release driver resources 93413f35ac1SNeil Horman * @pdev: PCI-Express device 93513f35ac1SNeil Horman */ 93613f35ac1SNeil Horman static void ismt_remove(struct pci_dev *pdev) 93713f35ac1SNeil Horman { 93813f35ac1SNeil Horman struct ismt_priv *priv = pci_get_drvdata(pdev); 93913f35ac1SNeil Horman 94013f35ac1SNeil Horman i2c_del_adapter(&priv->adapter); 94113f35ac1SNeil Horman } 94213f35ac1SNeil Horman 94313f35ac1SNeil Horman static struct pci_driver ismt_driver = { 94413f35ac1SNeil Horman .name = "ismt_smbus", 94513f35ac1SNeil Horman .id_table = ismt_ids, 94613f35ac1SNeil Horman .probe = ismt_probe, 94713f35ac1SNeil Horman .remove = ismt_remove, 94813f35ac1SNeil Horman }; 94913f35ac1SNeil Horman 95013f35ac1SNeil Horman module_pci_driver(ismt_driver); 95113f35ac1SNeil Horman 95213f35ac1SNeil Horman MODULE_LICENSE("Dual BSD/GPL"); 95313f35ac1SNeil Horman MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>"); 95413f35ac1SNeil Horman MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver"); 955