113f35ac1SNeil Horman /*
213f35ac1SNeil Horman * This file is provided under a dual BSD/GPLv2 license. When using or
313f35ac1SNeil Horman * redistributing this file, you may do so under either license.
413f35ac1SNeil Horman *
513f35ac1SNeil Horman * Copyright(c) 2012 Intel Corporation. All rights reserved.
613f35ac1SNeil Horman *
713f35ac1SNeil Horman * GPL LICENSE SUMMARY
813f35ac1SNeil Horman *
913f35ac1SNeil Horman * This program is free software; you can redistribute it and/or modify
1013f35ac1SNeil Horman * it under the terms of version 2 of the GNU General Public License as
1113f35ac1SNeil Horman * published by the Free Software Foundation.
1213f35ac1SNeil Horman *
1313f35ac1SNeil Horman * This program is distributed in the hope that it will be useful, but
1413f35ac1SNeil Horman * WITHOUT ANY WARRANTY; without even the implied warranty of
1513f35ac1SNeil Horman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
1613f35ac1SNeil Horman * General Public License for more details.
1713f35ac1SNeil Horman * The full GNU General Public License is included in this distribution
1813f35ac1SNeil Horman * in the file called LICENSE.GPL.
1913f35ac1SNeil Horman *
2013f35ac1SNeil Horman * BSD LICENSE
2113f35ac1SNeil Horman *
2213f35ac1SNeil Horman * Redistribution and use in source and binary forms, with or without
2313f35ac1SNeil Horman * modification, are permitted provided that the following conditions
2413f35ac1SNeil Horman * are met:
2513f35ac1SNeil Horman *
2613f35ac1SNeil Horman * * Redistributions of source code must retain the above copyright
2713f35ac1SNeil Horman * notice, this list of conditions and the following disclaimer.
2813f35ac1SNeil Horman * * Redistributions in binary form must reproduce the above copyright
2913f35ac1SNeil Horman * notice, this list of conditions and the following disclaimer in
3013f35ac1SNeil Horman * the documentation and/or other materials provided with the
3113f35ac1SNeil Horman * distribution.
3213f35ac1SNeil Horman * * Neither the name of Intel Corporation nor the names of its
3313f35ac1SNeil Horman * contributors may be used to endorse or promote products derived
3413f35ac1SNeil Horman * from this software without specific prior written permission.
3513f35ac1SNeil Horman *
3613f35ac1SNeil Horman * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
3713f35ac1SNeil Horman * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
3813f35ac1SNeil Horman * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
3913f35ac1SNeil Horman * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
4013f35ac1SNeil Horman * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
4113f35ac1SNeil Horman * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
4213f35ac1SNeil Horman * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
4313f35ac1SNeil Horman * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
4413f35ac1SNeil Horman * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4513f35ac1SNeil Horman * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
4613f35ac1SNeil Horman * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4713f35ac1SNeil Horman */
4813f35ac1SNeil Horman
4913f35ac1SNeil Horman /*
5013f35ac1SNeil Horman * Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
5113f35ac1SNeil Horman * S12xx Product Family.
5213f35ac1SNeil Horman *
5313f35ac1SNeil Horman * Features supported by this driver:
5413f35ac1SNeil Horman * Hardware PEC yes
5513f35ac1SNeil Horman * Block buffer yes
565e9a97b1SMario Alejandro Posso Escobar * Block process call transaction yes
5713f35ac1SNeil Horman * Slave mode no
5813f35ac1SNeil Horman */
5913f35ac1SNeil Horman
6013f35ac1SNeil Horman #include <linux/module.h>
6113f35ac1SNeil Horman #include <linux/pci.h>
6213f35ac1SNeil Horman #include <linux/kernel.h>
6313f35ac1SNeil Horman #include <linux/stddef.h>
6413f35ac1SNeil Horman #include <linux/completion.h>
6513f35ac1SNeil Horman #include <linux/dma-mapping.h>
6613f35ac1SNeil Horman #include <linux/i2c.h>
6713f35ac1SNeil Horman #include <linux/acpi.h>
6813f35ac1SNeil Horman #include <linux/interrupt.h>
6913f35ac1SNeil Horman
702f8e2c87SChristoph Hellwig #include <linux/io-64-nonatomic-lo-hi.h>
7113f35ac1SNeil Horman
7213f35ac1SNeil Horman /* PCI Address Constants */
7313f35ac1SNeil Horman #define SMBBAR 0
7413f35ac1SNeil Horman
7513f35ac1SNeil Horman /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
7613f35ac1SNeil Horman #define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59
7713f35ac1SNeil Horman #define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a
785cda2d86SJarkko Nikula #define PCI_DEVICE_ID_INTEL_CDF_SMT 0x18ac
79abaa7b0cSMika Westerberg #define PCI_DEVICE_ID_INTEL_DNV_SMT 0x19ac
8086d36a5eSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_EBG_SMT 0x1bff
81488b9269SSeth Heasley #define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15
8213f35ac1SNeil Horman
838b57cebeSFan Du #define ISMT_DESC_ENTRIES 2 /* number of descriptor entries */
8413f35ac1SNeil Horman #define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */
8517a0f3acSMika Westerberg #define ISMT_LOG_ENTRIES 3 /* number of interrupt cause log entries */
8613f35ac1SNeil Horman
8713f35ac1SNeil Horman /* Hardware Descriptor Constants - Control Field */
8813f35ac1SNeil Horman #define ISMT_DESC_CWRL 0x01 /* Command/Write Length */
8913f35ac1SNeil Horman #define ISMT_DESC_BLK 0X04 /* Perform Block Transaction */
9013f35ac1SNeil Horman #define ISMT_DESC_FAIR 0x08 /* Set fairness flag upon successful arbit. */
9113f35ac1SNeil Horman #define ISMT_DESC_PEC 0x10 /* Packet Error Code */
9213f35ac1SNeil Horman #define ISMT_DESC_I2C 0x20 /* I2C Enable */
9313f35ac1SNeil Horman #define ISMT_DESC_INT 0x40 /* Interrupt */
9413f35ac1SNeil Horman #define ISMT_DESC_SOE 0x80 /* Stop On Error */
9513f35ac1SNeil Horman
9613f35ac1SNeil Horman /* Hardware Descriptor Constants - Status Field */
9713f35ac1SNeil Horman #define ISMT_DESC_SCS 0x01 /* Success */
9813f35ac1SNeil Horman #define ISMT_DESC_DLTO 0x04 /* Data Low Time Out */
9913f35ac1SNeil Horman #define ISMT_DESC_NAK 0x08 /* NAK Received */
10013f35ac1SNeil Horman #define ISMT_DESC_CRC 0x10 /* CRC Error */
10113f35ac1SNeil Horman #define ISMT_DESC_CLTO 0x20 /* Clock Low Time Out */
10213f35ac1SNeil Horman #define ISMT_DESC_COL 0x40 /* Collisions */
10313f35ac1SNeil Horman #define ISMT_DESC_LPR 0x80 /* Large Packet Received */
10413f35ac1SNeil Horman
10513f35ac1SNeil Horman /* Macros */
10613f35ac1SNeil Horman #define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
10713f35ac1SNeil Horman
10813f35ac1SNeil Horman /* iSMT General Register address offsets (SMBBAR + <addr>) */
10913f35ac1SNeil Horman #define ISMT_GR_GCTRL 0x000 /* General Control */
11013f35ac1SNeil Horman #define ISMT_GR_SMTICL 0x008 /* SMT Interrupt Cause Location */
11113f35ac1SNeil Horman #define ISMT_GR_ERRINTMSK 0x010 /* Error Interrupt Mask */
11213f35ac1SNeil Horman #define ISMT_GR_ERRAERMSK 0x014 /* Error AER Mask */
11313f35ac1SNeil Horman #define ISMT_GR_ERRSTS 0x018 /* Error Status */
11413f35ac1SNeil Horman #define ISMT_GR_ERRINFO 0x01c /* Error Information */
11513f35ac1SNeil Horman
11613f35ac1SNeil Horman /* iSMT Master Registers */
11713f35ac1SNeil Horman #define ISMT_MSTR_MDBA 0x100 /* Master Descriptor Base Address */
11813f35ac1SNeil Horman #define ISMT_MSTR_MCTRL 0x108 /* Master Control */
11913f35ac1SNeil Horman #define ISMT_MSTR_MSTS 0x10c /* Master Status */
12013f35ac1SNeil Horman #define ISMT_MSTR_MDS 0x110 /* Master Descriptor Size */
12113f35ac1SNeil Horman #define ISMT_MSTR_RPOLICY 0x114 /* Retry Policy */
12213f35ac1SNeil Horman
12313f35ac1SNeil Horman /* iSMT Miscellaneous Registers */
12413f35ac1SNeil Horman #define ISMT_SPGT 0x300 /* SMBus PHY Global Timing */
12513f35ac1SNeil Horman
12613f35ac1SNeil Horman /* General Control Register (GCTRL) bit definitions */
12713f35ac1SNeil Horman #define ISMT_GCTRL_TRST 0x04 /* Target Reset */
12813f35ac1SNeil Horman #define ISMT_GCTRL_KILL 0x08 /* Kill */
12913f35ac1SNeil Horman #define ISMT_GCTRL_SRST 0x40 /* Soft Reset */
13013f35ac1SNeil Horman
13113f35ac1SNeil Horman /* Master Control Register (MCTRL) bit definitions */
13213f35ac1SNeil Horman #define ISMT_MCTRL_SS 0x01 /* Start/Stop */
13313f35ac1SNeil Horman #define ISMT_MCTRL_MEIE 0x10 /* Master Error Interrupt Enable */
13413f35ac1SNeil Horman #define ISMT_MCTRL_FMHP 0x00ff0000 /* Firmware Master Head Ptr (FMHP) */
13513f35ac1SNeil Horman
13613f35ac1SNeil Horman /* Master Status Register (MSTS) bit definitions */
13713f35ac1SNeil Horman #define ISMT_MSTS_HMTP 0xff0000 /* HW Master Tail Pointer (HMTP) */
13813f35ac1SNeil Horman #define ISMT_MSTS_MIS 0x20 /* Master Interrupt Status (MIS) */
13913f35ac1SNeil Horman #define ISMT_MSTS_MEIS 0x10 /* Master Error Int Status (MEIS) */
14013f35ac1SNeil Horman #define ISMT_MSTS_IP 0x01 /* In Progress */
14113f35ac1SNeil Horman
14213f35ac1SNeil Horman /* Master Descriptor Size (MDS) bit definitions */
14313f35ac1SNeil Horman #define ISMT_MDS_MASK 0xff /* Master Descriptor Size mask (MDS) */
14413f35ac1SNeil Horman
14513f35ac1SNeil Horman /* SMBus PHY Global Timing Register (SPGT) bit definitions */
14613f35ac1SNeil Horman #define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */
14713f35ac1SNeil Horman #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */
14813f35ac1SNeil Horman #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */
149e35c9369SBorislav Petkov #define ISMT_SPGT_SPD_400K (0x2U << 30) /* 400 kHz */
150e35c9369SBorislav Petkov #define ISMT_SPGT_SPD_1M (0x3U << 30) /* 1 MHz */
15113f35ac1SNeil Horman
15213f35ac1SNeil Horman
15313f35ac1SNeil Horman /* MSI Control Register (MSICTL) bit definitions */
15413f35ac1SNeil Horman #define ISMT_MSICTL_MSIE 0x01 /* MSI Enable */
15513f35ac1SNeil Horman
15613f35ac1SNeil Horman /* iSMT Hardware Descriptor */
15713f35ac1SNeil Horman struct ismt_desc {
15813f35ac1SNeil Horman u8 tgtaddr_rw; /* target address & r/w bit */
15913f35ac1SNeil Horman u8 wr_len_cmd; /* write length in bytes or a command */
16013f35ac1SNeil Horman u8 rd_len; /* read length */
16113f35ac1SNeil Horman u8 control; /* control bits */
16213f35ac1SNeil Horman u8 status; /* status bits */
16313f35ac1SNeil Horman u8 retry; /* collision retry and retry count */
16413f35ac1SNeil Horman u8 rxbytes; /* received bytes */
16513f35ac1SNeil Horman u8 txbytes; /* transmitted bytes */
16613f35ac1SNeil Horman u32 dptr_low; /* lower 32 bit of the data pointer */
16713f35ac1SNeil Horman u32 dptr_high; /* upper 32 bit of the data pointer */
16813f35ac1SNeil Horman } __packed;
16913f35ac1SNeil Horman
17013f35ac1SNeil Horman struct ismt_priv {
17113f35ac1SNeil Horman struct i2c_adapter adapter;
1726109dbd6SAndy Shevchenko void __iomem *smba; /* PCI BAR */
17313f35ac1SNeil Horman struct pci_dev *pci_dev;
17413f35ac1SNeil Horman struct ismt_desc *hw; /* descriptor virt base addr */
17513f35ac1SNeil Horman dma_addr_t io_rng_dma; /* descriptor HW base addr */
17613f35ac1SNeil Horman u8 head; /* ring buffer head pointer */
17713f35ac1SNeil Horman struct completion cmp; /* interrupt completion */
1785cd5f0bbSRadu Rendec u8 buffer[I2C_SMBUS_BLOCK_MAX + 16]; /* temp R/W data buffer */
17917a0f3acSMika Westerberg dma_addr_t log_dma;
18017a0f3acSMika Westerberg u32 *log;
18113f35ac1SNeil Horman };
18213f35ac1SNeil Horman
183392debf1SJingoo Han static const struct pci_device_id ismt_ids[] = {
18413f35ac1SNeil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
18513f35ac1SNeil Horman { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
1865cda2d86SJarkko Nikula { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) },
187abaa7b0cSMika Westerberg { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
18886d36a5eSAndy Shevchenko { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) },
189488b9269SSeth Heasley { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
19013f35ac1SNeil Horman { 0, }
19113f35ac1SNeil Horman };
19213f35ac1SNeil Horman
19313f35ac1SNeil Horman MODULE_DEVICE_TABLE(pci, ismt_ids);
19413f35ac1SNeil Horman
19513f35ac1SNeil Horman /* Bus speed control bits for slow debuggers - refer to the docs for usage */
19613f35ac1SNeil Horman static unsigned int bus_speed;
19713f35ac1SNeil Horman module_param(bus_speed, uint, S_IRUGO);
19813f35ac1SNeil Horman MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
19913f35ac1SNeil Horman
20013f35ac1SNeil Horman /**
20113f35ac1SNeil Horman * __ismt_desc_dump() - dump the contents of a specific descriptor
20277dae805SAndy Shevchenko * @dev: the iSMT device
20377dae805SAndy Shevchenko * @desc: the iSMT hardware descriptor
20413f35ac1SNeil Horman */
__ismt_desc_dump(struct device * dev,const struct ismt_desc * desc)20513f35ac1SNeil Horman static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
20613f35ac1SNeil Horman {
20713f35ac1SNeil Horman
20813f35ac1SNeil Horman dev_dbg(dev, "Descriptor struct: %p\n", desc);
20913f35ac1SNeil Horman dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
21013f35ac1SNeil Horman dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
21113f35ac1SNeil Horman dev_dbg(dev, "\trd_len= 0x%02X\n", desc->rd_len);
21213f35ac1SNeil Horman dev_dbg(dev, "\tcontrol= 0x%02X\n", desc->control);
21313f35ac1SNeil Horman dev_dbg(dev, "\tstatus= 0x%02X\n", desc->status);
21413f35ac1SNeil Horman dev_dbg(dev, "\tretry= 0x%02X\n", desc->retry);
21513f35ac1SNeil Horman dev_dbg(dev, "\trxbytes= 0x%02X\n", desc->rxbytes);
21613f35ac1SNeil Horman dev_dbg(dev, "\ttxbytes= 0x%02X\n", desc->txbytes);
21713f35ac1SNeil Horman dev_dbg(dev, "\tdptr_low= 0x%08X\n", desc->dptr_low);
21813f35ac1SNeil Horman dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
21913f35ac1SNeil Horman }
22013f35ac1SNeil Horman /**
22113f35ac1SNeil Horman * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
22213f35ac1SNeil Horman * @priv: iSMT private data
22313f35ac1SNeil Horman */
ismt_desc_dump(struct ismt_priv * priv)22413f35ac1SNeil Horman static void ismt_desc_dump(struct ismt_priv *priv)
22513f35ac1SNeil Horman {
22613f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev;
22713f35ac1SNeil Horman struct ismt_desc *desc = &priv->hw[priv->head];
22813f35ac1SNeil Horman
22913f35ac1SNeil Horman dev_dbg(dev, "Dump of the descriptor struct: 0x%X\n", priv->head);
23013f35ac1SNeil Horman __ismt_desc_dump(dev, desc);
23113f35ac1SNeil Horman }
23213f35ac1SNeil Horman
23313f35ac1SNeil Horman /**
23413f35ac1SNeil Horman * ismt_gen_reg_dump() - dump the iSMT General Registers
23513f35ac1SNeil Horman * @priv: iSMT private data
23613f35ac1SNeil Horman */
ismt_gen_reg_dump(struct ismt_priv * priv)23713f35ac1SNeil Horman static void ismt_gen_reg_dump(struct ismt_priv *priv)
23813f35ac1SNeil Horman {
23913f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev;
24013f35ac1SNeil Horman
24113f35ac1SNeil Horman dev_dbg(dev, "Dump of the iSMT General Registers\n");
24213f35ac1SNeil Horman dev_dbg(dev, " GCTRL.... : (0x%p)=0x%X\n",
24313f35ac1SNeil Horman priv->smba + ISMT_GR_GCTRL,
24413f35ac1SNeil Horman readl(priv->smba + ISMT_GR_GCTRL));
24513f35ac1SNeil Horman dev_dbg(dev, " SMTICL... : (0x%p)=0x%016llX\n",
24613f35ac1SNeil Horman priv->smba + ISMT_GR_SMTICL,
24713f35ac1SNeil Horman (long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
24813f35ac1SNeil Horman dev_dbg(dev, " ERRINTMSK : (0x%p)=0x%X\n",
24913f35ac1SNeil Horman priv->smba + ISMT_GR_ERRINTMSK,
25013f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRINTMSK));
25113f35ac1SNeil Horman dev_dbg(dev, " ERRAERMSK : (0x%p)=0x%X\n",
25213f35ac1SNeil Horman priv->smba + ISMT_GR_ERRAERMSK,
25313f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRAERMSK));
25413f35ac1SNeil Horman dev_dbg(dev, " ERRSTS... : (0x%p)=0x%X\n",
25513f35ac1SNeil Horman priv->smba + ISMT_GR_ERRSTS,
25613f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRSTS));
25713f35ac1SNeil Horman dev_dbg(dev, " ERRINFO.. : (0x%p)=0x%X\n",
25813f35ac1SNeil Horman priv->smba + ISMT_GR_ERRINFO,
25913f35ac1SNeil Horman readl(priv->smba + ISMT_GR_ERRINFO));
26013f35ac1SNeil Horman }
26113f35ac1SNeil Horman
26213f35ac1SNeil Horman /**
26313f35ac1SNeil Horman * ismt_mstr_reg_dump() - dump the iSMT Master Registers
26413f35ac1SNeil Horman * @priv: iSMT private data
26513f35ac1SNeil Horman */
ismt_mstr_reg_dump(struct ismt_priv * priv)26613f35ac1SNeil Horman static void ismt_mstr_reg_dump(struct ismt_priv *priv)
26713f35ac1SNeil Horman {
26813f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev;
26913f35ac1SNeil Horman
27013f35ac1SNeil Horman dev_dbg(dev, "Dump of the iSMT Master Registers\n");
27113f35ac1SNeil Horman dev_dbg(dev, " MDBA..... : (0x%p)=0x%016llX\n",
27213f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDBA,
27313f35ac1SNeil Horman (long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
27413f35ac1SNeil Horman dev_dbg(dev, " MCTRL.... : (0x%p)=0x%X\n",
27513f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL,
27613f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MCTRL));
27713f35ac1SNeil Horman dev_dbg(dev, " MSTS..... : (0x%p)=0x%X\n",
27813f35ac1SNeil Horman priv->smba + ISMT_MSTR_MSTS,
27913f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MSTS));
28013f35ac1SNeil Horman dev_dbg(dev, " MDS...... : (0x%p)=0x%X\n",
28113f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDS,
28213f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_MDS));
28313f35ac1SNeil Horman dev_dbg(dev, " RPOLICY.. : (0x%p)=0x%X\n",
28413f35ac1SNeil Horman priv->smba + ISMT_MSTR_RPOLICY,
28513f35ac1SNeil Horman readl(priv->smba + ISMT_MSTR_RPOLICY));
28613f35ac1SNeil Horman dev_dbg(dev, " SPGT..... : (0x%p)=0x%X\n",
28713f35ac1SNeil Horman priv->smba + ISMT_SPGT,
28813f35ac1SNeil Horman readl(priv->smba + ISMT_SPGT));
28913f35ac1SNeil Horman }
29013f35ac1SNeil Horman
29113f35ac1SNeil Horman /**
29213f35ac1SNeil Horman * ismt_submit_desc() - add a descriptor to the ring
29313f35ac1SNeil Horman * @priv: iSMT private data
29413f35ac1SNeil Horman */
ismt_submit_desc(struct ismt_priv * priv)29513f35ac1SNeil Horman static void ismt_submit_desc(struct ismt_priv *priv)
29613f35ac1SNeil Horman {
29713f35ac1SNeil Horman uint fmhp;
29813f35ac1SNeil Horman uint val;
29913f35ac1SNeil Horman
30013f35ac1SNeil Horman ismt_desc_dump(priv);
30113f35ac1SNeil Horman ismt_gen_reg_dump(priv);
30213f35ac1SNeil Horman ismt_mstr_reg_dump(priv);
30313f35ac1SNeil Horman
30413f35ac1SNeil Horman /* Set the FMHP (Firmware Master Head Pointer)*/
30513f35ac1SNeil Horman fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
30613f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL);
30713f35ac1SNeil Horman writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
30813f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL);
30913f35ac1SNeil Horman
31013f35ac1SNeil Horman /* Set the start bit */
31113f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MCTRL);
31213f35ac1SNeil Horman writel(val | ISMT_MCTRL_SS,
31313f35ac1SNeil Horman priv->smba + ISMT_MSTR_MCTRL);
31413f35ac1SNeil Horman }
31513f35ac1SNeil Horman
31613f35ac1SNeil Horman /**
31713f35ac1SNeil Horman * ismt_process_desc() - handle the completion of the descriptor
31813f35ac1SNeil Horman * @desc: the iSMT hardware descriptor
31913f35ac1SNeil Horman * @data: data buffer from the upper layer
32013f35ac1SNeil Horman * @priv: ismt_priv struct holding our dma buffer
32113f35ac1SNeil Horman * @size: SMBus transaction type
32213f35ac1SNeil Horman * @read_write: flag to indicate if this is a read or write
32313f35ac1SNeil Horman */
ismt_process_desc(const struct ismt_desc * desc,union i2c_smbus_data * data,struct ismt_priv * priv,int size,char read_write)32413f35ac1SNeil Horman static int ismt_process_desc(const struct ismt_desc *desc,
32513f35ac1SNeil Horman union i2c_smbus_data *data,
32613f35ac1SNeil Horman struct ismt_priv *priv, int size,
32713f35ac1SNeil Horman char read_write)
32813f35ac1SNeil Horman {
3295cd5f0bbSRadu Rendec u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
33013f35ac1SNeil Horman
33113f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
33213f35ac1SNeil Horman __ismt_desc_dump(&priv->pci_dev->dev, desc);
333aad550f9SRadu Rendec ismt_gen_reg_dump(priv);
334aad550f9SRadu Rendec ismt_mstr_reg_dump(priv);
33513f35ac1SNeil Horman
33613f35ac1SNeil Horman if (desc->status & ISMT_DESC_SCS) {
33713f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE &&
3385e9a97b1SMario Alejandro Posso Escobar size != I2C_SMBUS_PROC_CALL &&
3395e9a97b1SMario Alejandro Posso Escobar size != I2C_SMBUS_BLOCK_PROC_CALL)
34013f35ac1SNeil Horman return 0;
34113f35ac1SNeil Horman
34213f35ac1SNeil Horman switch (size) {
34313f35ac1SNeil Horman case I2C_SMBUS_BYTE:
34413f35ac1SNeil Horman case I2C_SMBUS_BYTE_DATA:
34513f35ac1SNeil Horman data->byte = dma_buffer[0];
34613f35ac1SNeil Horman break;
34713f35ac1SNeil Horman case I2C_SMBUS_WORD_DATA:
34813f35ac1SNeil Horman case I2C_SMBUS_PROC_CALL:
34913f35ac1SNeil Horman data->word = dma_buffer[0] | (dma_buffer[1] << 8);
35013f35ac1SNeil Horman break;
35113f35ac1SNeil Horman case I2C_SMBUS_BLOCK_DATA:
3525e9a97b1SMario Alejandro Posso Escobar case I2C_SMBUS_BLOCK_PROC_CALL:
353ba201c4fSStephen Douthit if (desc->rxbytes != dma_buffer[0] + 1)
354ba201c4fSStephen Douthit return -EMSGSIZE;
355ba201c4fSStephen Douthit
356b6c159a9SStephen Douthit memcpy(data->block, dma_buffer, desc->rxbytes);
35713f35ac1SNeil Horman break;
358c6ebcedbSPontus Andersson case I2C_SMBUS_I2C_BLOCK_DATA:
359c6ebcedbSPontus Andersson memcpy(&data->block[1], dma_buffer, desc->rxbytes);
360c6ebcedbSPontus Andersson data->block[0] = desc->rxbytes;
361c6ebcedbSPontus Andersson break;
36213f35ac1SNeil Horman }
36313f35ac1SNeil Horman return 0;
36413f35ac1SNeil Horman }
36513f35ac1SNeil Horman
36613f35ac1SNeil Horman if (likely(desc->status & ISMT_DESC_NAK))
36713f35ac1SNeil Horman return -ENXIO;
36813f35ac1SNeil Horman
36913f35ac1SNeil Horman if (desc->status & ISMT_DESC_CRC)
37013f35ac1SNeil Horman return -EBADMSG;
37113f35ac1SNeil Horman
37213f35ac1SNeil Horman if (desc->status & ISMT_DESC_COL)
37313f35ac1SNeil Horman return -EAGAIN;
37413f35ac1SNeil Horman
37513f35ac1SNeil Horman if (desc->status & ISMT_DESC_LPR)
37613f35ac1SNeil Horman return -EPROTO;
37713f35ac1SNeil Horman
37813f35ac1SNeil Horman if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
37913f35ac1SNeil Horman return -ETIMEDOUT;
38013f35ac1SNeil Horman
38113f35ac1SNeil Horman return -EIO;
38213f35ac1SNeil Horman }
38313f35ac1SNeil Horman
38413f35ac1SNeil Horman /**
38513f35ac1SNeil Horman * ismt_access() - process an SMBus command
38613f35ac1SNeil Horman * @adap: the i2c host adapter
38713f35ac1SNeil Horman * @addr: address of the i2c/SMBus target
38813f35ac1SNeil Horman * @flags: command options
38913f35ac1SNeil Horman * @read_write: read from or write to device
39013f35ac1SNeil Horman * @command: the i2c/SMBus command to issue
39113f35ac1SNeil Horman * @size: SMBus transaction type
39213f35ac1SNeil Horman * @data: read/write data buffer
39313f35ac1SNeil Horman */
ismt_access(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)39413f35ac1SNeil Horman static int ismt_access(struct i2c_adapter *adap, u16 addr,
39513f35ac1SNeil Horman unsigned short flags, char read_write, u8 command,
39613f35ac1SNeil Horman int size, union i2c_smbus_data *data)
39713f35ac1SNeil Horman {
39813f35ac1SNeil Horman int ret;
3991abdd5d9SNicholas Mc Guire unsigned long time_left;
40013f35ac1SNeil Horman dma_addr_t dma_addr = 0; /* address of the data buffer */
40113f35ac1SNeil Horman u8 dma_size = 0;
40213f35ac1SNeil Horman enum dma_data_direction dma_direction = 0;
40313f35ac1SNeil Horman struct ismt_desc *desc;
40413f35ac1SNeil Horman struct ismt_priv *priv = i2c_get_adapdata(adap);
40513f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev;
4065cd5f0bbSRadu Rendec u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
40713f35ac1SNeil Horman
40813f35ac1SNeil Horman desc = &priv->hw[priv->head];
40913f35ac1SNeil Horman
410bf416910SJames Ralston /* Initialize the DMA buffer */
4115cd5f0bbSRadu Rendec memset(priv->buffer, 0, sizeof(priv->buffer));
412bf416910SJames Ralston
41313f35ac1SNeil Horman /* Initialize the descriptor */
41413f35ac1SNeil Horman memset(desc, 0, sizeof(struct ismt_desc));
41513f35ac1SNeil Horman desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
41613f35ac1SNeil Horman
41717a0f3acSMika Westerberg /* Always clear the log entries */
41817a0f3acSMika Westerberg memset(priv->log, 0, ISMT_LOG_ENTRIES * sizeof(u32));
41917a0f3acSMika Westerberg
42013f35ac1SNeil Horman /* Initialize common control bits */
421f92d155dSAndy Shevchenko if (likely(pci_dev_msi_enabled(priv->pci_dev)))
42213f35ac1SNeil Horman desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
42313f35ac1SNeil Horman else
42413f35ac1SNeil Horman desc->control = ISMT_DESC_FAIR;
42513f35ac1SNeil Horman
42613f35ac1SNeil Horman if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
42713f35ac1SNeil Horman && (size != I2C_SMBUS_I2C_BLOCK_DATA))
42813f35ac1SNeil Horman desc->control |= ISMT_DESC_PEC;
42913f35ac1SNeil Horman
43013f35ac1SNeil Horman switch (size) {
43113f35ac1SNeil Horman case I2C_SMBUS_QUICK:
43213f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_QUICK\n");
43313f35ac1SNeil Horman break;
43413f35ac1SNeil Horman
43513f35ac1SNeil Horman case I2C_SMBUS_BYTE:
43613f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) {
43713f35ac1SNeil Horman /*
43813f35ac1SNeil Horman * Send Byte
43913f35ac1SNeil Horman * The command field contains the write data
44013f35ac1SNeil Horman */
44113f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: WRITE\n");
44213f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL;
44313f35ac1SNeil Horman desc->wr_len_cmd = command;
44413f35ac1SNeil Horman } else {
44513f35ac1SNeil Horman /* Receive Byte */
44613f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE: READ\n");
44713f35ac1SNeil Horman dma_size = 1;
44813f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE;
44913f35ac1SNeil Horman desc->rd_len = 1;
45013f35ac1SNeil Horman }
45113f35ac1SNeil Horman break;
45213f35ac1SNeil Horman
45313f35ac1SNeil Horman case I2C_SMBUS_BYTE_DATA:
45413f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) {
45513f35ac1SNeil Horman /*
45613f35ac1SNeil Horman * Write Byte
45713f35ac1SNeil Horman * Command plus 1 data byte
45813f35ac1SNeil Horman */
45913f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: WRITE\n");
46013f35ac1SNeil Horman desc->wr_len_cmd = 2;
46113f35ac1SNeil Horman dma_size = 2;
46213f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE;
4635cd5f0bbSRadu Rendec dma_buffer[0] = command;
4645cd5f0bbSRadu Rendec dma_buffer[1] = data->byte;
46513f35ac1SNeil Horman } else {
46613f35ac1SNeil Horman /* Read Byte */
46713f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BYTE_DATA: READ\n");
46813f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL;
46913f35ac1SNeil Horman desc->wr_len_cmd = command;
47013f35ac1SNeil Horman desc->rd_len = 1;
47113f35ac1SNeil Horman dma_size = 1;
47213f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE;
47313f35ac1SNeil Horman }
47413f35ac1SNeil Horman break;
47513f35ac1SNeil Horman
47613f35ac1SNeil Horman case I2C_SMBUS_WORD_DATA:
47713f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) {
47813f35ac1SNeil Horman /* Write Word */
47913f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: WRITE\n");
48013f35ac1SNeil Horman desc->wr_len_cmd = 3;
48113f35ac1SNeil Horman dma_size = 3;
48213f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE;
4835cd5f0bbSRadu Rendec dma_buffer[0] = command;
4845cd5f0bbSRadu Rendec dma_buffer[1] = data->word & 0xff;
4855cd5f0bbSRadu Rendec dma_buffer[2] = data->word >> 8;
48613f35ac1SNeil Horman } else {
48713f35ac1SNeil Horman /* Read Word */
48813f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_WORD_DATA: READ\n");
48913f35ac1SNeil Horman desc->wr_len_cmd = command;
49013f35ac1SNeil Horman desc->control |= ISMT_DESC_CWRL;
49113f35ac1SNeil Horman desc->rd_len = 2;
49213f35ac1SNeil Horman dma_size = 2;
49313f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE;
49413f35ac1SNeil Horman }
49513f35ac1SNeil Horman break;
49613f35ac1SNeil Horman
49713f35ac1SNeil Horman case I2C_SMBUS_PROC_CALL:
49813f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
49913f35ac1SNeil Horman desc->wr_len_cmd = 3;
50013f35ac1SNeil Horman desc->rd_len = 2;
50113f35ac1SNeil Horman dma_size = 3;
50213f35ac1SNeil Horman dma_direction = DMA_BIDIRECTIONAL;
5035cd5f0bbSRadu Rendec dma_buffer[0] = command;
5045cd5f0bbSRadu Rendec dma_buffer[1] = data->word & 0xff;
5055cd5f0bbSRadu Rendec dma_buffer[2] = data->word >> 8;
50613f35ac1SNeil Horman break;
50713f35ac1SNeil Horman
50813f35ac1SNeil Horman case I2C_SMBUS_BLOCK_DATA:
50913f35ac1SNeil Horman if (read_write == I2C_SMBUS_WRITE) {
51013f35ac1SNeil Horman /* Block Write */
51113f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: WRITE\n");
512*39244cc7SZheyu Ma if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
513*39244cc7SZheyu Ma return -EINVAL;
514*39244cc7SZheyu Ma
51513f35ac1SNeil Horman dma_size = data->block[0] + 1;
51613f35ac1SNeil Horman dma_direction = DMA_TO_DEVICE;
51713f35ac1SNeil Horman desc->wr_len_cmd = dma_size;
51813f35ac1SNeil Horman desc->control |= ISMT_DESC_BLK;
5195cd5f0bbSRadu Rendec dma_buffer[0] = command;
5205cd5f0bbSRadu Rendec memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
52113f35ac1SNeil Horman } else {
52213f35ac1SNeil Horman /* Block Read */
52313f35ac1SNeil Horman dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA: READ\n");
52413f35ac1SNeil Horman dma_size = I2C_SMBUS_BLOCK_MAX;
52513f35ac1SNeil Horman dma_direction = DMA_FROM_DEVICE;
52613f35ac1SNeil Horman desc->rd_len = dma_size;
52713f35ac1SNeil Horman desc->wr_len_cmd = command;
52813f35ac1SNeil Horman desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
52913f35ac1SNeil Horman }
53013f35ac1SNeil Horman break;
53113f35ac1SNeil Horman
5325e9a97b1SMario Alejandro Posso Escobar case I2C_SMBUS_BLOCK_PROC_CALL:
5335e9a97b1SMario Alejandro Posso Escobar dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n");
534690b2549SDan Carpenter if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
535690b2549SDan Carpenter return -EINVAL;
536690b2549SDan Carpenter
5375e9a97b1SMario Alejandro Posso Escobar dma_size = I2C_SMBUS_BLOCK_MAX;
5385e9a97b1SMario Alejandro Posso Escobar desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1);
5395e9a97b1SMario Alejandro Posso Escobar desc->wr_len_cmd = data->block[0] + 1;
5405e9a97b1SMario Alejandro Posso Escobar desc->rd_len = dma_size;
5415e9a97b1SMario Alejandro Posso Escobar desc->control |= ISMT_DESC_BLK;
5425e9a97b1SMario Alejandro Posso Escobar dma_direction = DMA_BIDIRECTIONAL;
5435e9a97b1SMario Alejandro Posso Escobar dma_buffer[0] = command;
5445e9a97b1SMario Alejandro Posso Escobar memcpy(&dma_buffer[1], &data->block[1], data->block[0]);
5455e9a97b1SMario Alejandro Posso Escobar break;
5465e9a97b1SMario Alejandro Posso Escobar
547001cebf0Srobert.valiquette@intel.com case I2C_SMBUS_I2C_BLOCK_DATA:
548001cebf0Srobert.valiquette@intel.com /* Make sure the length is valid */
549001cebf0Srobert.valiquette@intel.com if (data->block[0] < 1)
550001cebf0Srobert.valiquette@intel.com data->block[0] = 1;
551001cebf0Srobert.valiquette@intel.com
552001cebf0Srobert.valiquette@intel.com if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
553001cebf0Srobert.valiquette@intel.com data->block[0] = I2C_SMBUS_BLOCK_MAX;
554001cebf0Srobert.valiquette@intel.com
555001cebf0Srobert.valiquette@intel.com if (read_write == I2C_SMBUS_WRITE) {
556001cebf0Srobert.valiquette@intel.com /* i2c Block Write */
557001cebf0Srobert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: WRITE\n");
558001cebf0Srobert.valiquette@intel.com dma_size = data->block[0] + 1;
559001cebf0Srobert.valiquette@intel.com dma_direction = DMA_TO_DEVICE;
560001cebf0Srobert.valiquette@intel.com desc->wr_len_cmd = dma_size;
561001cebf0Srobert.valiquette@intel.com desc->control |= ISMT_DESC_I2C;
5625cd5f0bbSRadu Rendec dma_buffer[0] = command;
5635cd5f0bbSRadu Rendec memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
564001cebf0Srobert.valiquette@intel.com } else {
565001cebf0Srobert.valiquette@intel.com /* i2c Block Read */
566001cebf0Srobert.valiquette@intel.com dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA: READ\n");
567001cebf0Srobert.valiquette@intel.com dma_size = data->block[0];
568001cebf0Srobert.valiquette@intel.com dma_direction = DMA_FROM_DEVICE;
569001cebf0Srobert.valiquette@intel.com desc->rd_len = dma_size;
570001cebf0Srobert.valiquette@intel.com desc->wr_len_cmd = command;
571001cebf0Srobert.valiquette@intel.com desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
572001cebf0Srobert.valiquette@intel.com /*
573001cebf0Srobert.valiquette@intel.com * Per the "Table 15-15. I2C Commands",
574001cebf0Srobert.valiquette@intel.com * in the External Design Specification (EDS),
575001cebf0Srobert.valiquette@intel.com * (Document Number: 508084, Revision: 2.0),
576001cebf0Srobert.valiquette@intel.com * the _rw bit must be 0
577001cebf0Srobert.valiquette@intel.com */
578001cebf0Srobert.valiquette@intel.com desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
579001cebf0Srobert.valiquette@intel.com }
580001cebf0Srobert.valiquette@intel.com break;
581001cebf0Srobert.valiquette@intel.com
58213f35ac1SNeil Horman default:
58313f35ac1SNeil Horman dev_err(dev, "Unsupported transaction %d\n",
58413f35ac1SNeil Horman size);
58513f35ac1SNeil Horman return -EOPNOTSUPP;
58613f35ac1SNeil Horman }
58713f35ac1SNeil Horman
58813f35ac1SNeil Horman /* map the data buffer */
58913f35ac1SNeil Horman if (dma_size != 0) {
59013f35ac1SNeil Horman dev_dbg(dev, " dev=%p\n", dev);
59113f35ac1SNeil Horman dev_dbg(dev, " data=%p\n", data);
5925cd5f0bbSRadu Rendec dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);
59313f35ac1SNeil Horman dev_dbg(dev, " dma_size=%d\n", dma_size);
59413f35ac1SNeil Horman dev_dbg(dev, " dma_direction=%d\n", dma_direction);
59513f35ac1SNeil Horman
59613f35ac1SNeil Horman dma_addr = dma_map_single(dev,
5975cd5f0bbSRadu Rendec dma_buffer,
59813f35ac1SNeil Horman dma_size,
59913f35ac1SNeil Horman dma_direction);
60013f35ac1SNeil Horman
60113f35ac1SNeil Horman if (dma_mapping_error(dev, dma_addr)) {
60213f35ac1SNeil Horman dev_err(dev, "Error in mapping dma buffer %p\n",
6035cd5f0bbSRadu Rendec dma_buffer);
60413f35ac1SNeil Horman return -EIO;
60513f35ac1SNeil Horman }
60613f35ac1SNeil Horman
607017fc4f6SAndy Shevchenko dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);
60813f35ac1SNeil Horman
60913f35ac1SNeil Horman desc->dptr_low = lower_32_bits(dma_addr);
61013f35ac1SNeil Horman desc->dptr_high = upper_32_bits(dma_addr);
61113f35ac1SNeil Horman }
61213f35ac1SNeil Horman
61316735d02SWolfram Sang reinit_completion(&priv->cmp);
61413f35ac1SNeil Horman
61513f35ac1SNeil Horman /* Add the descriptor */
61613f35ac1SNeil Horman ismt_submit_desc(priv);
61713f35ac1SNeil Horman
61813f35ac1SNeil Horman /* Now we wait for interrupt completion, 1s */
6191abdd5d9SNicholas Mc Guire time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
62013f35ac1SNeil Horman
62113f35ac1SNeil Horman /* unmap the data buffer */
62213f35ac1SNeil Horman if (dma_size != 0)
62317e83549SLiwei Song dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
62413f35ac1SNeil Horman
6251abdd5d9SNicholas Mc Guire if (unlikely(!time_left)) {
62613f35ac1SNeil Horman dev_err(dev, "completion wait timed out\n");
62713f35ac1SNeil Horman ret = -ETIMEDOUT;
62813f35ac1SNeil Horman goto out;
62913f35ac1SNeil Horman }
63013f35ac1SNeil Horman
63113f35ac1SNeil Horman /* do any post processing of the descriptor here */
63213f35ac1SNeil Horman ret = ismt_process_desc(desc, data, priv, size, read_write);
63313f35ac1SNeil Horman
63413f35ac1SNeil Horman out:
63513f35ac1SNeil Horman /* Update the ring pointer */
63613f35ac1SNeil Horman priv->head++;
63713f35ac1SNeil Horman priv->head %= ISMT_DESC_ENTRIES;
63813f35ac1SNeil Horman
63913f35ac1SNeil Horman return ret;
64013f35ac1SNeil Horman }
64113f35ac1SNeil Horman
64213f35ac1SNeil Horman /**
64313f35ac1SNeil Horman * ismt_func() - report which i2c commands are supported by this adapter
64413f35ac1SNeil Horman * @adap: the i2c host adapter
64513f35ac1SNeil Horman */
ismt_func(struct i2c_adapter * adap)64613f35ac1SNeil Horman static u32 ismt_func(struct i2c_adapter *adap)
64713f35ac1SNeil Horman {
64813f35ac1SNeil Horman return I2C_FUNC_SMBUS_QUICK |
64913f35ac1SNeil Horman I2C_FUNC_SMBUS_BYTE |
65013f35ac1SNeil Horman I2C_FUNC_SMBUS_BYTE_DATA |
65113f35ac1SNeil Horman I2C_FUNC_SMBUS_WORD_DATA |
65213f35ac1SNeil Horman I2C_FUNC_SMBUS_PROC_CALL |
6535e9a97b1SMario Alejandro Posso Escobar I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
65413f35ac1SNeil Horman I2C_FUNC_SMBUS_BLOCK_DATA |
655001cebf0Srobert.valiquette@intel.com I2C_FUNC_SMBUS_I2C_BLOCK |
65613f35ac1SNeil Horman I2C_FUNC_SMBUS_PEC;
65713f35ac1SNeil Horman }
65813f35ac1SNeil Horman
65913f35ac1SNeil Horman static const struct i2c_algorithm smbus_algorithm = {
66013f35ac1SNeil Horman .smbus_xfer = ismt_access,
66113f35ac1SNeil Horman .functionality = ismt_func,
66213f35ac1SNeil Horman };
66313f35ac1SNeil Horman
66413f35ac1SNeil Horman /**
66513f35ac1SNeil Horman * ismt_handle_isr() - interrupt handler bottom half
66613f35ac1SNeil Horman * @priv: iSMT private data
66713f35ac1SNeil Horman */
ismt_handle_isr(struct ismt_priv * priv)66813f35ac1SNeil Horman static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
66913f35ac1SNeil Horman {
67013f35ac1SNeil Horman complete(&priv->cmp);
67113f35ac1SNeil Horman
67213f35ac1SNeil Horman return IRQ_HANDLED;
67313f35ac1SNeil Horman }
67413f35ac1SNeil Horman
67513f35ac1SNeil Horman
67613f35ac1SNeil Horman /**
67713f35ac1SNeil Horman * ismt_do_interrupt() - IRQ interrupt handler
67813f35ac1SNeil Horman * @vec: interrupt vector
67913f35ac1SNeil Horman * @data: iSMT private data
68013f35ac1SNeil Horman */
ismt_do_interrupt(int vec,void * data)68113f35ac1SNeil Horman static irqreturn_t ismt_do_interrupt(int vec, void *data)
68213f35ac1SNeil Horman {
68313f35ac1SNeil Horman u32 val;
68413f35ac1SNeil Horman struct ismt_priv *priv = data;
68513f35ac1SNeil Horman
68613f35ac1SNeil Horman /*
68713f35ac1SNeil Horman * check to see it's our interrupt, return IRQ_NONE if not ours
68813f35ac1SNeil Horman * since we are sharing interrupt
68913f35ac1SNeil Horman */
69013f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MSTS);
69113f35ac1SNeil Horman
69213f35ac1SNeil Horman if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
69313f35ac1SNeil Horman return IRQ_NONE;
69413f35ac1SNeil Horman else
69513f35ac1SNeil Horman writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
69613f35ac1SNeil Horman priv->smba + ISMT_MSTR_MSTS);
69713f35ac1SNeil Horman
69813f35ac1SNeil Horman return ismt_handle_isr(priv);
69913f35ac1SNeil Horman }
70013f35ac1SNeil Horman
70113f35ac1SNeil Horman /**
70213f35ac1SNeil Horman * ismt_do_msi_interrupt() - MSI interrupt handler
70313f35ac1SNeil Horman * @vec: interrupt vector
70413f35ac1SNeil Horman * @data: iSMT private data
70513f35ac1SNeil Horman */
ismt_do_msi_interrupt(int vec,void * data)70613f35ac1SNeil Horman static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
70713f35ac1SNeil Horman {
70813f35ac1SNeil Horman return ismt_handle_isr(data);
70913f35ac1SNeil Horman }
71013f35ac1SNeil Horman
71113f35ac1SNeil Horman /**
71213f35ac1SNeil Horman * ismt_hw_init() - initialize the iSMT hardware
71313f35ac1SNeil Horman * @priv: iSMT private data
71413f35ac1SNeil Horman */
ismt_hw_init(struct ismt_priv * priv)71513f35ac1SNeil Horman static void ismt_hw_init(struct ismt_priv *priv)
71613f35ac1SNeil Horman {
71713f35ac1SNeil Horman u32 val;
71813f35ac1SNeil Horman struct device *dev = &priv->pci_dev->dev;
71913f35ac1SNeil Horman
72013f35ac1SNeil Horman /* initialize the Master Descriptor Base Address (MDBA) */
72113f35ac1SNeil Horman writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
72213f35ac1SNeil Horman
72317a0f3acSMika Westerberg writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL);
72417a0f3acSMika Westerberg
72513f35ac1SNeil Horman /* initialize the Master Control Register (MCTRL) */
72613f35ac1SNeil Horman writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
72713f35ac1SNeil Horman
72813f35ac1SNeil Horman /* initialize the Master Status Register (MSTS) */
72913f35ac1SNeil Horman writel(0, priv->smba + ISMT_MSTR_MSTS);
73013f35ac1SNeil Horman
73113f35ac1SNeil Horman /* initialize the Master Descriptor Size (MDS) */
73213f35ac1SNeil Horman val = readl(priv->smba + ISMT_MSTR_MDS);
73313f35ac1SNeil Horman writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
73413f35ac1SNeil Horman priv->smba + ISMT_MSTR_MDS);
73513f35ac1SNeil Horman
73613f35ac1SNeil Horman /*
73713f35ac1SNeil Horman * Set the SMBus speed (could use this for slow HW debuggers)
73813f35ac1SNeil Horman */
73913f35ac1SNeil Horman
74013f35ac1SNeil Horman val = readl(priv->smba + ISMT_SPGT);
74113f35ac1SNeil Horman
74213f35ac1SNeil Horman switch (bus_speed) {
74313f35ac1SNeil Horman case 0:
74413f35ac1SNeil Horman break;
74513f35ac1SNeil Horman
74613f35ac1SNeil Horman case 80:
74713f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
74813f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
74913f35ac1SNeil Horman priv->smba + ISMT_SPGT);
75013f35ac1SNeil Horman break;
75113f35ac1SNeil Horman
75213f35ac1SNeil Horman case 100:
75313f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
75413f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
75513f35ac1SNeil Horman priv->smba + ISMT_SPGT);
75613f35ac1SNeil Horman break;
75713f35ac1SNeil Horman
75813f35ac1SNeil Horman case 400:
75913f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
76013f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
76113f35ac1SNeil Horman priv->smba + ISMT_SPGT);
76213f35ac1SNeil Horman break;
76313f35ac1SNeil Horman
76413f35ac1SNeil Horman case 1000:
76513f35ac1SNeil Horman dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
76613f35ac1SNeil Horman writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
76713f35ac1SNeil Horman priv->smba + ISMT_SPGT);
76813f35ac1SNeil Horman break;
76913f35ac1SNeil Horman
77013f35ac1SNeil Horman default:
77113f35ac1SNeil Horman dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
77213f35ac1SNeil Horman break;
77313f35ac1SNeil Horman }
77413f35ac1SNeil Horman
77513f35ac1SNeil Horman val = readl(priv->smba + ISMT_SPGT);
77613f35ac1SNeil Horman
77713f35ac1SNeil Horman switch (val & ISMT_SPGT_SPD_MASK) {
77813f35ac1SNeil Horman case ISMT_SPGT_SPD_80K:
77913f35ac1SNeil Horman bus_speed = 80;
78013f35ac1SNeil Horman break;
78113f35ac1SNeil Horman case ISMT_SPGT_SPD_100K:
78213f35ac1SNeil Horman bus_speed = 100;
78313f35ac1SNeil Horman break;
78413f35ac1SNeil Horman case ISMT_SPGT_SPD_400K:
78513f35ac1SNeil Horman bus_speed = 400;
78613f35ac1SNeil Horman break;
78713f35ac1SNeil Horman case ISMT_SPGT_SPD_1M:
78813f35ac1SNeil Horman bus_speed = 1000;
78913f35ac1SNeil Horman break;
79013f35ac1SNeil Horman }
79113f35ac1SNeil Horman dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
79213f35ac1SNeil Horman }
79313f35ac1SNeil Horman
79413f35ac1SNeil Horman /**
79513f35ac1SNeil Horman * ismt_dev_init() - initialize the iSMT data structures
79613f35ac1SNeil Horman * @priv: iSMT private data
79713f35ac1SNeil Horman */
ismt_dev_init(struct ismt_priv * priv)79813f35ac1SNeil Horman static int ismt_dev_init(struct ismt_priv *priv)
79913f35ac1SNeil Horman {
80013f35ac1SNeil Horman /* allocate memory for the descriptor */
80113f35ac1SNeil Horman priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
80213f35ac1SNeil Horman (ISMT_DESC_ENTRIES
80313f35ac1SNeil Horman * sizeof(struct ismt_desc)),
80413f35ac1SNeil Horman &priv->io_rng_dma,
80513f35ac1SNeil Horman GFP_KERNEL);
80613f35ac1SNeil Horman if (!priv->hw)
80713f35ac1SNeil Horman return -ENOMEM;
80813f35ac1SNeil Horman
80913f35ac1SNeil Horman priv->head = 0;
81013f35ac1SNeil Horman init_completion(&priv->cmp);
81113f35ac1SNeil Horman
81217a0f3acSMika Westerberg priv->log = dmam_alloc_coherent(&priv->pci_dev->dev,
81317a0f3acSMika Westerberg ISMT_LOG_ENTRIES * sizeof(u32),
81417a0f3acSMika Westerberg &priv->log_dma, GFP_KERNEL);
81517a0f3acSMika Westerberg if (!priv->log)
81617a0f3acSMika Westerberg return -ENOMEM;
81717a0f3acSMika Westerberg
81813f35ac1SNeil Horman return 0;
81913f35ac1SNeil Horman }
82013f35ac1SNeil Horman
82113f35ac1SNeil Horman /**
82213f35ac1SNeil Horman * ismt_int_init() - initialize interrupts
82313f35ac1SNeil Horman * @priv: iSMT private data
82413f35ac1SNeil Horman */
ismt_int_init(struct ismt_priv * priv)82513f35ac1SNeil Horman static int ismt_int_init(struct ismt_priv *priv)
82613f35ac1SNeil Horman {
82713f35ac1SNeil Horman int err;
82813f35ac1SNeil Horman
82913f35ac1SNeil Horman /* Try using MSI interrupts */
83013f35ac1SNeil Horman err = pci_enable_msi(priv->pci_dev);
831064181b0SAndy Shevchenko if (err)
83213f35ac1SNeil Horman goto intx;
83313f35ac1SNeil Horman
83413f35ac1SNeil Horman err = devm_request_irq(&priv->pci_dev->dev,
83513f35ac1SNeil Horman priv->pci_dev->irq,
83613f35ac1SNeil Horman ismt_do_msi_interrupt,
83713f35ac1SNeil Horman 0,
83813f35ac1SNeil Horman "ismt-msi",
83913f35ac1SNeil Horman priv);
84013f35ac1SNeil Horman if (err) {
84113f35ac1SNeil Horman pci_disable_msi(priv->pci_dev);
84213f35ac1SNeil Horman goto intx;
84313f35ac1SNeil Horman }
84413f35ac1SNeil Horman
845064181b0SAndy Shevchenko return 0;
84613f35ac1SNeil Horman
84713f35ac1SNeil Horman /* Try using legacy interrupts */
84813f35ac1SNeil Horman intx:
849064181b0SAndy Shevchenko dev_warn(&priv->pci_dev->dev,
850064181b0SAndy Shevchenko "Unable to use MSI interrupts, falling back to legacy\n");
851064181b0SAndy Shevchenko
85213f35ac1SNeil Horman err = devm_request_irq(&priv->pci_dev->dev,
85313f35ac1SNeil Horman priv->pci_dev->irq,
85413f35ac1SNeil Horman ismt_do_interrupt,
85513f35ac1SNeil Horman IRQF_SHARED,
85613f35ac1SNeil Horman "ismt-intx",
85713f35ac1SNeil Horman priv);
85813f35ac1SNeil Horman if (err) {
85913f35ac1SNeil Horman dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
8606befa6ddSAndy Shevchenko return err;
86113f35ac1SNeil Horman }
86213f35ac1SNeil Horman
86313f35ac1SNeil Horman return 0;
86413f35ac1SNeil Horman }
86513f35ac1SNeil Horman
86613f35ac1SNeil Horman static struct pci_driver ismt_driver;
86713f35ac1SNeil Horman
86813f35ac1SNeil Horman /**
86913f35ac1SNeil Horman * ismt_probe() - probe for iSMT devices
87013f35ac1SNeil Horman * @pdev: PCI-Express device
87113f35ac1SNeil Horman * @id: PCI-Express device ID
87213f35ac1SNeil Horman */
87313f35ac1SNeil Horman static int
ismt_probe(struct pci_dev * pdev,const struct pci_device_id * id)87413f35ac1SNeil Horman ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
87513f35ac1SNeil Horman {
87613f35ac1SNeil Horman int err;
87713f35ac1SNeil Horman struct ismt_priv *priv;
87813f35ac1SNeil Horman unsigned long start, len;
87913f35ac1SNeil Horman
88013f35ac1SNeil Horman priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
88113f35ac1SNeil Horman if (!priv)
88213f35ac1SNeil Horman return -ENOMEM;
88313f35ac1SNeil Horman
88413f35ac1SNeil Horman pci_set_drvdata(pdev, priv);
8858eb5c87aSDustin Byford
88613f35ac1SNeil Horman i2c_set_adapdata(&priv->adapter, priv);
88713f35ac1SNeil Horman priv->adapter.owner = THIS_MODULE;
88813f35ac1SNeil Horman priv->adapter.class = I2C_CLASS_HWMON;
88913f35ac1SNeil Horman priv->adapter.algo = &smbus_algorithm;
89013f35ac1SNeil Horman priv->adapter.dev.parent = &pdev->dev;
8918eb5c87aSDustin Byford ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
89213f35ac1SNeil Horman priv->adapter.retries = ISMT_MAX_RETRIES;
89313f35ac1SNeil Horman
89413f35ac1SNeil Horman priv->pci_dev = pdev;
89513f35ac1SNeil Horman
89613f35ac1SNeil Horman err = pcim_enable_device(pdev);
89713f35ac1SNeil Horman if (err) {
89813f35ac1SNeil Horman dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
89913f35ac1SNeil Horman err);
90013f35ac1SNeil Horman return err;
90113f35ac1SNeil Horman }
90213f35ac1SNeil Horman
90313f35ac1SNeil Horman /* enable bus mastering */
90413f35ac1SNeil Horman pci_set_master(pdev);
90513f35ac1SNeil Horman
90613f35ac1SNeil Horman /* Determine the address of the SMBus area */
90713f35ac1SNeil Horman start = pci_resource_start(pdev, SMBBAR);
90813f35ac1SNeil Horman len = pci_resource_len(pdev, SMBBAR);
90913f35ac1SNeil Horman if (!start || !len) {
91013f35ac1SNeil Horman dev_err(&pdev->dev,
91113f35ac1SNeil Horman "SMBus base address uninitialized, upgrade BIOS\n");
91213f35ac1SNeil Horman return -ENODEV;
91313f35ac1SNeil Horman }
91413f35ac1SNeil Horman
91513f35ac1SNeil Horman snprintf(priv->adapter.name, sizeof(priv->adapter.name),
91613f35ac1SNeil Horman "SMBus iSMT adapter at %lx", start);
91713f35ac1SNeil Horman
91813f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
91913f35ac1SNeil Horman dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
92013f35ac1SNeil Horman
92113f35ac1SNeil Horman err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
92213f35ac1SNeil Horman if (err) {
92313f35ac1SNeil Horman dev_err(&pdev->dev, "ACPI resource conflict!\n");
92413f35ac1SNeil Horman return err;
92513f35ac1SNeil Horman }
92613f35ac1SNeil Horman
92713f35ac1SNeil Horman err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
92813f35ac1SNeil Horman if (err) {
92913f35ac1SNeil Horman dev_err(&pdev->dev,
93013f35ac1SNeil Horman "Failed to request SMBus region 0x%lx-0x%lx\n",
93113f35ac1SNeil Horman start, start + len);
93213f35ac1SNeil Horman return err;
93313f35ac1SNeil Horman }
93413f35ac1SNeil Horman
93513f35ac1SNeil Horman priv->smba = pcim_iomap(pdev, SMBBAR, len);
93613f35ac1SNeil Horman if (!priv->smba) {
93713f35ac1SNeil Horman dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
938600ca080SAndy Shevchenko return -ENODEV;
93913f35ac1SNeil Horman }
94013f35ac1SNeil Horman
941d56baf6eSChristophe JAILLET err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
942d56baf6eSChristophe JAILLET if (err) {
943d56baf6eSChristophe JAILLET dev_err(&pdev->dev, "dma_set_mask fail\n");
944600ca080SAndy Shevchenko return -ENODEV;
94513f35ac1SNeil Horman }
94613f35ac1SNeil Horman
94713f35ac1SNeil Horman err = ismt_dev_init(priv);
94813f35ac1SNeil Horman if (err)
949600ca080SAndy Shevchenko return err;
95013f35ac1SNeil Horman
95113f35ac1SNeil Horman ismt_hw_init(priv);
95213f35ac1SNeil Horman
95313f35ac1SNeil Horman err = ismt_int_init(priv);
95413f35ac1SNeil Horman if (err)
955600ca080SAndy Shevchenko return err;
95613f35ac1SNeil Horman
95713f35ac1SNeil Horman err = i2c_add_adapter(&priv->adapter);
958ea734404SWolfram Sang if (err)
959600ca080SAndy Shevchenko return -ENODEV;
96013f35ac1SNeil Horman return 0;
96113f35ac1SNeil Horman }
96213f35ac1SNeil Horman
96313f35ac1SNeil Horman /**
96413f35ac1SNeil Horman * ismt_remove() - release driver resources
96513f35ac1SNeil Horman * @pdev: PCI-Express device
96613f35ac1SNeil Horman */
ismt_remove(struct pci_dev * pdev)96713f35ac1SNeil Horman static void ismt_remove(struct pci_dev *pdev)
96813f35ac1SNeil Horman {
96913f35ac1SNeil Horman struct ismt_priv *priv = pci_get_drvdata(pdev);
97013f35ac1SNeil Horman
97113f35ac1SNeil Horman i2c_del_adapter(&priv->adapter);
97213f35ac1SNeil Horman }
97313f35ac1SNeil Horman
97413f35ac1SNeil Horman static struct pci_driver ismt_driver = {
97513f35ac1SNeil Horman .name = "ismt_smbus",
97613f35ac1SNeil Horman .id_table = ismt_ids,
97713f35ac1SNeil Horman .probe = ismt_probe,
97813f35ac1SNeil Horman .remove = ismt_remove,
97913f35ac1SNeil Horman };
98013f35ac1SNeil Horman
98113f35ac1SNeil Horman module_pci_driver(ismt_driver);
98213f35ac1SNeil Horman
98313f35ac1SNeil Horman MODULE_LICENSE("Dual BSD/GPL");
98413f35ac1SNeil Horman MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
98513f35ac1SNeil Horman MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
986