1 /* 2 * Copyright (C) 2002 Motorola GSG-China 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 17 * USA. 18 * 19 * Author: 20 * Darius Augulis, Teltonika Inc. 21 * 22 * Desc.: 23 * Implementation of I2C Adapter/Algorithm Driver 24 * for I2C Bus integrated in Freescale i.MX/MXC processors 25 * 26 * Derived from Motorola GSG China I2C example driver 27 * 28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de 29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de 30 * Copyright (C) 2007 RightHand Technologies, Inc. 31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> 32 * 33 */ 34 35 /** Includes ******************************************************************* 36 *******************************************************************************/ 37 38 #include <linux/init.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/errno.h> 42 #include <linux/err.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/i2c.h> 46 #include <linux/io.h> 47 #include <linux/sched.h> 48 #include <linux/platform_device.h> 49 #include <linux/clk.h> 50 #include <linux/slab.h> 51 #include <linux/of.h> 52 #include <linux/of_device.h> 53 #include <linux/of_i2c.h> 54 #include <linux/pinctrl/consumer.h> 55 56 #include <mach/hardware.h> 57 #include <mach/i2c.h> 58 59 /** Defines ******************************************************************** 60 *******************************************************************************/ 61 62 /* This will be the driver name the kernel reports */ 63 #define DRIVER_NAME "imx-i2c" 64 65 /* Default value */ 66 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ 67 68 /* IMX I2C registers */ 69 #define IMX_I2C_IADR 0x00 /* i2c slave address */ 70 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ 71 #define IMX_I2C_I2CR 0x08 /* i2c control */ 72 #define IMX_I2C_I2SR 0x0C /* i2c status */ 73 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ 74 75 /* Bits of IMX I2C registers */ 76 #define I2SR_RXAK 0x01 77 #define I2SR_IIF 0x02 78 #define I2SR_SRW 0x04 79 #define I2SR_IAL 0x10 80 #define I2SR_IBB 0x20 81 #define I2SR_IAAS 0x40 82 #define I2SR_ICF 0x80 83 #define I2CR_RSTA 0x04 84 #define I2CR_TXAK 0x08 85 #define I2CR_MTX 0x10 86 #define I2CR_MSTA 0x20 87 #define I2CR_IIEN 0x40 88 #define I2CR_IEN 0x80 89 90 /** Variables ****************************************************************** 91 *******************************************************************************/ 92 93 /* 94 * sorted list of clock divider, register value pairs 95 * taken from table 26-5, p.26-9, Freescale i.MX 96 * Integrated Portable System Processor Reference Manual 97 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 98 * 99 * Duplicated divider values removed from list 100 */ 101 102 static u16 __initdata i2c_clk_div[50][2] = { 103 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, 104 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, 105 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, 106 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, 107 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, 108 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, 109 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, 110 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, 111 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, 112 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, 113 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, 114 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, 115 { 3072, 0x1E }, { 3840, 0x1F } 116 }; 117 118 struct imx_i2c_struct { 119 struct i2c_adapter adapter; 120 struct resource *res; 121 struct clk *clk; 122 void __iomem *base; 123 int irq; 124 wait_queue_head_t queue; 125 unsigned long i2csr; 126 unsigned int disable_delay; 127 int stopped; 128 unsigned int ifdr; /* IMX_I2C_IFDR */ 129 }; 130 131 static const struct of_device_id i2c_imx_dt_ids[] = { 132 { .compatible = "fsl,imx1-i2c", }, 133 { /* sentinel */ } 134 }; 135 136 /** Functions for IMX I2C adapter driver *************************************** 137 *******************************************************************************/ 138 139 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) 140 { 141 unsigned long orig_jiffies = jiffies; 142 unsigned int temp; 143 144 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 145 146 while (1) { 147 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 148 if (for_busy && (temp & I2SR_IBB)) 149 break; 150 if (!for_busy && !(temp & I2SR_IBB)) 151 break; 152 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 153 dev_dbg(&i2c_imx->adapter.dev, 154 "<%s> I2C bus is busy\n", __func__); 155 return -ETIMEDOUT; 156 } 157 schedule(); 158 } 159 160 return 0; 161 } 162 163 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) 164 { 165 wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10); 166 167 if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { 168 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); 169 return -ETIMEDOUT; 170 } 171 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); 172 i2c_imx->i2csr = 0; 173 return 0; 174 } 175 176 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) 177 { 178 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { 179 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); 180 return -EIO; /* No ACK */ 181 } 182 183 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); 184 return 0; 185 } 186 187 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) 188 { 189 unsigned int temp = 0; 190 int result; 191 192 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 193 194 clk_prepare_enable(i2c_imx->clk); 195 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); 196 /* Enable I2C controller */ 197 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 198 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 199 200 /* Wait controller to be stable */ 201 udelay(50); 202 203 /* Start I2C transaction */ 204 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 205 temp |= I2CR_MSTA; 206 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 207 result = i2c_imx_bus_busy(i2c_imx, 1); 208 if (result) 209 return result; 210 i2c_imx->stopped = 0; 211 212 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 213 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 214 return result; 215 } 216 217 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 218 { 219 unsigned int temp = 0; 220 221 if (!i2c_imx->stopped) { 222 /* Stop I2C transaction */ 223 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 224 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 225 temp &= ~(I2CR_MSTA | I2CR_MTX); 226 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 227 } 228 if (cpu_is_mx1()) { 229 /* 230 * This delay caused by an i.MXL hardware bug. 231 * If no (or too short) delay, no "STOP" bit will be generated. 232 */ 233 udelay(i2c_imx->disable_delay); 234 } 235 236 if (!i2c_imx->stopped) { 237 i2c_imx_bus_busy(i2c_imx, 0); 238 i2c_imx->stopped = 1; 239 } 240 241 /* Disable I2C controller */ 242 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 243 clk_disable_unprepare(i2c_imx->clk); 244 } 245 246 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 247 unsigned int rate) 248 { 249 unsigned int i2c_clk_rate; 250 unsigned int div; 251 int i; 252 253 /* Divider value calculation */ 254 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 255 div = (i2c_clk_rate + rate - 1) / rate; 256 if (div < i2c_clk_div[0][0]) 257 i = 0; 258 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) 259 i = ARRAY_SIZE(i2c_clk_div) - 1; 260 else 261 for (i = 0; i2c_clk_div[i][0] < div; i++); 262 263 /* Store divider value */ 264 i2c_imx->ifdr = i2c_clk_div[i][1]; 265 266 /* 267 * There dummy delay is calculated. 268 * It should be about one I2C clock period long. 269 * This delay is used in I2C bus disable function 270 * to fix chip hardware bug. 271 */ 272 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0] 273 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); 274 275 /* dev_dbg() can't be used, because adapter is not yet registered */ 276 #ifdef CONFIG_I2C_DEBUG_BUS 277 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n", 278 __func__, i2c_clk_rate, div); 279 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n", 280 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]); 281 #endif 282 } 283 284 static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 285 { 286 struct imx_i2c_struct *i2c_imx = dev_id; 287 unsigned int temp; 288 289 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 290 if (temp & I2SR_IIF) { 291 /* save status register */ 292 i2c_imx->i2csr = temp; 293 temp &= ~I2SR_IIF; 294 writeb(temp, i2c_imx->base + IMX_I2C_I2SR); 295 wake_up(&i2c_imx->queue); 296 return IRQ_HANDLED; 297 } 298 299 return IRQ_NONE; 300 } 301 302 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 303 { 304 int i, result; 305 306 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", 307 __func__, msgs->addr << 1); 308 309 /* write slave address */ 310 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); 311 result = i2c_imx_trx_complete(i2c_imx); 312 if (result) 313 return result; 314 result = i2c_imx_acked(i2c_imx); 315 if (result) 316 return result; 317 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); 318 319 /* write data */ 320 for (i = 0; i < msgs->len; i++) { 321 dev_dbg(&i2c_imx->adapter.dev, 322 "<%s> write byte: B%d=0x%X\n", 323 __func__, i, msgs->buf[i]); 324 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); 325 result = i2c_imx_trx_complete(i2c_imx); 326 if (result) 327 return result; 328 result = i2c_imx_acked(i2c_imx); 329 if (result) 330 return result; 331 } 332 return 0; 333 } 334 335 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 336 { 337 int i, result; 338 unsigned int temp; 339 340 dev_dbg(&i2c_imx->adapter.dev, 341 "<%s> write slave address: addr=0x%x\n", 342 __func__, (msgs->addr << 1) | 0x01); 343 344 /* write slave address */ 345 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); 346 result = i2c_imx_trx_complete(i2c_imx); 347 if (result) 348 return result; 349 result = i2c_imx_acked(i2c_imx); 350 if (result) 351 return result; 352 353 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); 354 355 /* setup bus to read data */ 356 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 357 temp &= ~I2CR_MTX; 358 if (msgs->len - 1) 359 temp &= ~I2CR_TXAK; 360 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 361 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ 362 363 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); 364 365 /* read data */ 366 for (i = 0; i < msgs->len; i++) { 367 result = i2c_imx_trx_complete(i2c_imx); 368 if (result) 369 return result; 370 if (i == (msgs->len - 1)) { 371 /* It must generate STOP before read I2DR to prevent 372 controller from generating another clock cycle */ 373 dev_dbg(&i2c_imx->adapter.dev, 374 "<%s> clear MSTA\n", __func__); 375 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 376 temp &= ~(I2CR_MSTA | I2CR_MTX); 377 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 378 i2c_imx_bus_busy(i2c_imx, 0); 379 i2c_imx->stopped = 1; 380 } else if (i == (msgs->len - 2)) { 381 dev_dbg(&i2c_imx->adapter.dev, 382 "<%s> set TXAK\n", __func__); 383 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 384 temp |= I2CR_TXAK; 385 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 386 } 387 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); 388 dev_dbg(&i2c_imx->adapter.dev, 389 "<%s> read byte: B%d=0x%X\n", 390 __func__, i, msgs->buf[i]); 391 } 392 return 0; 393 } 394 395 static int i2c_imx_xfer(struct i2c_adapter *adapter, 396 struct i2c_msg *msgs, int num) 397 { 398 unsigned int i, temp; 399 int result; 400 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 401 402 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 403 404 /* Start I2C transfer */ 405 result = i2c_imx_start(i2c_imx); 406 if (result) 407 goto fail0; 408 409 /* read/write data */ 410 for (i = 0; i < num; i++) { 411 if (i) { 412 dev_dbg(&i2c_imx->adapter.dev, 413 "<%s> repeated start\n", __func__); 414 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 415 temp |= I2CR_RSTA; 416 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 417 result = i2c_imx_bus_busy(i2c_imx, 1); 418 if (result) 419 goto fail0; 420 } 421 dev_dbg(&i2c_imx->adapter.dev, 422 "<%s> transfer message: %d\n", __func__, i); 423 /* write/read data */ 424 #ifdef CONFIG_I2C_DEBUG_BUS 425 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 426 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 427 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 428 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 429 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 430 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 431 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 432 dev_dbg(&i2c_imx->adapter.dev, 433 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 434 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 435 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 436 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 437 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 438 (temp & I2SR_RXAK ? 1 : 0)); 439 #endif 440 if (msgs[i].flags & I2C_M_RD) 441 result = i2c_imx_read(i2c_imx, &msgs[i]); 442 else 443 result = i2c_imx_write(i2c_imx, &msgs[i]); 444 if (result) 445 goto fail0; 446 } 447 448 fail0: 449 /* Stop I2C transfer */ 450 i2c_imx_stop(i2c_imx); 451 452 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 453 (result < 0) ? "error" : "success msg", 454 (result < 0) ? result : num); 455 return (result < 0) ? result : num; 456 } 457 458 static u32 i2c_imx_func(struct i2c_adapter *adapter) 459 { 460 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 461 } 462 463 static struct i2c_algorithm i2c_imx_algo = { 464 .master_xfer = i2c_imx_xfer, 465 .functionality = i2c_imx_func, 466 }; 467 468 static int __init i2c_imx_probe(struct platform_device *pdev) 469 { 470 struct imx_i2c_struct *i2c_imx; 471 struct resource *res; 472 struct imxi2c_platform_data *pdata = pdev->dev.platform_data; 473 struct pinctrl *pinctrl; 474 void __iomem *base; 475 resource_size_t res_size; 476 int irq, bitrate; 477 int ret; 478 479 dev_dbg(&pdev->dev, "<%s>\n", __func__); 480 481 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 482 if (!res) { 483 dev_err(&pdev->dev, "can't get device resources\n"); 484 return -ENOENT; 485 } 486 irq = platform_get_irq(pdev, 0); 487 if (irq < 0) { 488 dev_err(&pdev->dev, "can't get irq number\n"); 489 return -ENOENT; 490 } 491 492 res_size = resource_size(res); 493 494 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) { 495 dev_err(&pdev->dev, "request_mem_region failed\n"); 496 return -EBUSY; 497 } 498 499 base = ioremap(res->start, res_size); 500 if (!base) { 501 dev_err(&pdev->dev, "ioremap failed\n"); 502 ret = -EIO; 503 goto fail1; 504 } 505 506 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL); 507 if (!i2c_imx) { 508 dev_err(&pdev->dev, "can't allocate interface\n"); 509 ret = -ENOMEM; 510 goto fail2; 511 } 512 513 /* Setup i2c_imx driver structure */ 514 strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); 515 i2c_imx->adapter.owner = THIS_MODULE; 516 i2c_imx->adapter.algo = &i2c_imx_algo; 517 i2c_imx->adapter.dev.parent = &pdev->dev; 518 i2c_imx->adapter.nr = pdev->id; 519 i2c_imx->adapter.dev.of_node = pdev->dev.of_node; 520 i2c_imx->irq = irq; 521 i2c_imx->base = base; 522 i2c_imx->res = res; 523 524 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 525 if (IS_ERR(pinctrl)) { 526 ret = PTR_ERR(pinctrl); 527 goto fail3; 528 } 529 530 /* Get I2C clock */ 531 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk"); 532 if (IS_ERR(i2c_imx->clk)) { 533 ret = PTR_ERR(i2c_imx->clk); 534 dev_err(&pdev->dev, "can't get I2C clock\n"); 535 goto fail3; 536 } 537 538 /* Request IRQ */ 539 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); 540 if (ret) { 541 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq); 542 goto fail4; 543 } 544 545 /* Init queue */ 546 init_waitqueue_head(&i2c_imx->queue); 547 548 /* Set up adapter data */ 549 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 550 551 /* Set up clock divider */ 552 bitrate = IMX_I2C_BIT_RATE; 553 ret = of_property_read_u32(pdev->dev.of_node, 554 "clock-frequency", &bitrate); 555 if (ret < 0 && pdata && pdata->bitrate) 556 bitrate = pdata->bitrate; 557 i2c_imx_set_clk(i2c_imx, bitrate); 558 559 /* Set up chip registers to defaults */ 560 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 561 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 562 563 /* Add I2C adapter */ 564 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); 565 if (ret < 0) { 566 dev_err(&pdev->dev, "registration failed\n"); 567 goto fail5; 568 } 569 570 of_i2c_register_devices(&i2c_imx->adapter); 571 572 /* Set up platform driver data */ 573 platform_set_drvdata(pdev, i2c_imx); 574 575 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq); 576 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", 577 i2c_imx->res->start, i2c_imx->res->end); 578 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n", 579 res_size, i2c_imx->res->start); 580 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", 581 i2c_imx->adapter.name); 582 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 583 584 return 0; /* Return OK */ 585 586 fail5: 587 free_irq(i2c_imx->irq, i2c_imx); 588 fail4: 589 clk_put(i2c_imx->clk); 590 fail3: 591 kfree(i2c_imx); 592 fail2: 593 iounmap(base); 594 fail1: 595 release_mem_region(res->start, resource_size(res)); 596 return ret; /* Return error number */ 597 } 598 599 static int __exit i2c_imx_remove(struct platform_device *pdev) 600 { 601 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); 602 603 /* remove adapter */ 604 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 605 i2c_del_adapter(&i2c_imx->adapter); 606 platform_set_drvdata(pdev, NULL); 607 608 /* free interrupt */ 609 free_irq(i2c_imx->irq, i2c_imx); 610 611 /* setup chip registers to defaults */ 612 writeb(0, i2c_imx->base + IMX_I2C_IADR); 613 writeb(0, i2c_imx->base + IMX_I2C_IFDR); 614 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 615 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 616 617 clk_put(i2c_imx->clk); 618 619 iounmap(i2c_imx->base); 620 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); 621 kfree(i2c_imx); 622 return 0; 623 } 624 625 static struct platform_driver i2c_imx_driver = { 626 .remove = __exit_p(i2c_imx_remove), 627 .driver = { 628 .name = DRIVER_NAME, 629 .owner = THIS_MODULE, 630 .of_match_table = i2c_imx_dt_ids, 631 } 632 }; 633 634 static int __init i2c_adap_imx_init(void) 635 { 636 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); 637 } 638 subsys_initcall(i2c_adap_imx_init); 639 640 static void __exit i2c_adap_imx_exit(void) 641 { 642 platform_driver_unregister(&i2c_imx_driver); 643 } 644 module_exit(i2c_adap_imx_exit); 645 646 MODULE_LICENSE("GPL"); 647 MODULE_AUTHOR("Darius Augulis"); 648 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); 649 MODULE_ALIAS("platform:" DRIVER_NAME); 650