1 /* 2 * Copyright (C) 2002 Motorola GSG-China 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 17 * USA. 18 * 19 * Author: 20 * Darius Augulis, Teltonika Inc. 21 * 22 * Desc.: 23 * Implementation of I2C Adapter/Algorithm Driver 24 * for I2C Bus integrated in Freescale i.MX/MXC processors 25 * 26 * Derived from Motorola GSG China I2C example driver 27 * 28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de 29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de 30 * Copyright (C) 2007 RightHand Technologies, Inc. 31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> 32 * 33 */ 34 35 /** Includes ******************************************************************* 36 *******************************************************************************/ 37 38 #include <linux/init.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/errno.h> 42 #include <linux/err.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/i2c.h> 46 #include <linux/io.h> 47 #include <linux/sched.h> 48 #include <linux/platform_device.h> 49 #include <linux/clk.h> 50 51 #include <mach/irqs.h> 52 #include <mach/hardware.h> 53 #include <mach/i2c.h> 54 55 /** Defines ******************************************************************** 56 *******************************************************************************/ 57 58 /* This will be the driver name the kernel reports */ 59 #define DRIVER_NAME "imx-i2c" 60 61 /* Default value */ 62 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ 63 64 /* IMX I2C registers */ 65 #define IMX_I2C_IADR 0x00 /* i2c slave address */ 66 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ 67 #define IMX_I2C_I2CR 0x08 /* i2c control */ 68 #define IMX_I2C_I2SR 0x0C /* i2c status */ 69 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ 70 71 /* Bits of IMX I2C registers */ 72 #define I2SR_RXAK 0x01 73 #define I2SR_IIF 0x02 74 #define I2SR_SRW 0x04 75 #define I2SR_IAL 0x10 76 #define I2SR_IBB 0x20 77 #define I2SR_IAAS 0x40 78 #define I2SR_ICF 0x80 79 #define I2CR_RSTA 0x04 80 #define I2CR_TXAK 0x08 81 #define I2CR_MTX 0x10 82 #define I2CR_MSTA 0x20 83 #define I2CR_IIEN 0x40 84 #define I2CR_IEN 0x80 85 86 /** Variables ****************************************************************** 87 *******************************************************************************/ 88 89 /* 90 * sorted list of clock divider, register value pairs 91 * taken from table 26-5, p.26-9, Freescale i.MX 92 * Integrated Portable System Processor Reference Manual 93 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 94 * 95 * Duplicated divider values removed from list 96 */ 97 98 static u16 __initdata i2c_clk_div[50][2] = { 99 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, 100 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, 101 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, 102 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, 103 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, 104 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, 105 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, 106 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, 107 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, 108 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, 109 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, 110 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, 111 { 3072, 0x1E }, { 3840, 0x1F } 112 }; 113 114 struct imx_i2c_struct { 115 struct i2c_adapter adapter; 116 struct resource *res; 117 struct clk *clk; 118 void __iomem *base; 119 int irq; 120 wait_queue_head_t queue; 121 unsigned long i2csr; 122 unsigned int disable_delay; 123 int stopped; 124 unsigned int ifdr; /* IMX_I2C_IFDR */ 125 }; 126 127 /** Functions for IMX I2C adapter driver *************************************** 128 *******************************************************************************/ 129 130 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) 131 { 132 unsigned long orig_jiffies = jiffies; 133 unsigned int temp; 134 135 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 136 137 while (1) { 138 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 139 if (for_busy && (temp & I2SR_IBB)) 140 break; 141 if (!for_busy && !(temp & I2SR_IBB)) 142 break; 143 if (signal_pending(current)) { 144 dev_dbg(&i2c_imx->adapter.dev, 145 "<%s> I2C Interrupted\n", __func__); 146 return -EINTR; 147 } 148 if (time_after(jiffies, orig_jiffies + HZ / 1000)) { 149 dev_dbg(&i2c_imx->adapter.dev, 150 "<%s> I2C bus is busy\n", __func__); 151 return -EIO; 152 } 153 schedule(); 154 } 155 156 return 0; 157 } 158 159 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) 160 { 161 int result; 162 163 result = wait_event_interruptible_timeout(i2c_imx->queue, 164 i2c_imx->i2csr & I2SR_IIF, HZ / 10); 165 166 if (unlikely(result < 0)) { 167 dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__); 168 return result; 169 } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { 170 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); 171 return -ETIMEDOUT; 172 } 173 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); 174 i2c_imx->i2csr = 0; 175 return 0; 176 } 177 178 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) 179 { 180 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { 181 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); 182 return -EIO; /* No ACK */ 183 } 184 185 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); 186 return 0; 187 } 188 189 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) 190 { 191 unsigned int temp = 0; 192 int result; 193 194 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 195 196 clk_enable(i2c_imx->clk); 197 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); 198 /* Enable I2C controller */ 199 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 200 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 201 202 /* Wait controller to be stable */ 203 udelay(50); 204 205 /* Start I2C transaction */ 206 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 207 temp |= I2CR_MSTA; 208 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 209 result = i2c_imx_bus_busy(i2c_imx, 1); 210 if (result) 211 return result; 212 i2c_imx->stopped = 0; 213 214 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 215 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 216 return result; 217 } 218 219 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 220 { 221 unsigned int temp = 0; 222 223 if (!i2c_imx->stopped) { 224 /* Stop I2C transaction */ 225 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 226 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 227 temp &= ~(I2CR_MSTA | I2CR_MTX); 228 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 229 } 230 if (cpu_is_mx1()) { 231 /* 232 * This delay caused by an i.MXL hardware bug. 233 * If no (or too short) delay, no "STOP" bit will be generated. 234 */ 235 udelay(i2c_imx->disable_delay); 236 } 237 238 if (!i2c_imx->stopped) { 239 i2c_imx_bus_busy(i2c_imx, 0); 240 i2c_imx->stopped = 1; 241 } 242 243 /* Disable I2C controller */ 244 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 245 clk_disable(i2c_imx->clk); 246 } 247 248 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 249 unsigned int rate) 250 { 251 unsigned int i2c_clk_rate; 252 unsigned int div; 253 int i; 254 255 /* Divider value calculation */ 256 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 257 div = (i2c_clk_rate + rate - 1) / rate; 258 if (div < i2c_clk_div[0][0]) 259 i = 0; 260 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) 261 i = ARRAY_SIZE(i2c_clk_div) - 1; 262 else 263 for (i = 0; i2c_clk_div[i][0] < div; i++); 264 265 /* Store divider value */ 266 i2c_imx->ifdr = i2c_clk_div[i][1]; 267 268 /* 269 * There dummy delay is calculated. 270 * It should be about one I2C clock period long. 271 * This delay is used in I2C bus disable function 272 * to fix chip hardware bug. 273 */ 274 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0] 275 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); 276 277 /* dev_dbg() can't be used, because adapter is not yet registered */ 278 #ifdef CONFIG_I2C_DEBUG_BUS 279 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n", 280 __func__, i2c_clk_rate, div); 281 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n", 282 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]); 283 #endif 284 } 285 286 static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 287 { 288 struct imx_i2c_struct *i2c_imx = dev_id; 289 unsigned int temp; 290 291 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 292 if (temp & I2SR_IIF) { 293 /* save status register */ 294 i2c_imx->i2csr = temp; 295 temp &= ~I2SR_IIF; 296 writeb(temp, i2c_imx->base + IMX_I2C_I2SR); 297 wake_up_interruptible(&i2c_imx->queue); 298 return IRQ_HANDLED; 299 } 300 301 return IRQ_NONE; 302 } 303 304 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 305 { 306 int i, result; 307 308 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", 309 __func__, msgs->addr << 1); 310 311 /* write slave address */ 312 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); 313 result = i2c_imx_trx_complete(i2c_imx); 314 if (result) 315 return result; 316 result = i2c_imx_acked(i2c_imx); 317 if (result) 318 return result; 319 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); 320 321 /* write data */ 322 for (i = 0; i < msgs->len; i++) { 323 dev_dbg(&i2c_imx->adapter.dev, 324 "<%s> write byte: B%d=0x%X\n", 325 __func__, i, msgs->buf[i]); 326 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); 327 result = i2c_imx_trx_complete(i2c_imx); 328 if (result) 329 return result; 330 result = i2c_imx_acked(i2c_imx); 331 if (result) 332 return result; 333 } 334 return 0; 335 } 336 337 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 338 { 339 int i, result; 340 unsigned int temp; 341 342 dev_dbg(&i2c_imx->adapter.dev, 343 "<%s> write slave address: addr=0x%x\n", 344 __func__, (msgs->addr << 1) | 0x01); 345 346 /* write slave address */ 347 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); 348 result = i2c_imx_trx_complete(i2c_imx); 349 if (result) 350 return result; 351 result = i2c_imx_acked(i2c_imx); 352 if (result) 353 return result; 354 355 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); 356 357 /* setup bus to read data */ 358 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 359 temp &= ~I2CR_MTX; 360 if (msgs->len - 1) 361 temp &= ~I2CR_TXAK; 362 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 363 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ 364 365 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); 366 367 /* read data */ 368 for (i = 0; i < msgs->len; i++) { 369 result = i2c_imx_trx_complete(i2c_imx); 370 if (result) 371 return result; 372 if (i == (msgs->len - 1)) { 373 /* It must generate STOP before read I2DR to prevent 374 controller from generating another clock cycle */ 375 dev_dbg(&i2c_imx->adapter.dev, 376 "<%s> clear MSTA\n", __func__); 377 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 378 temp &= ~(I2CR_MSTA | I2CR_MTX); 379 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 380 i2c_imx_bus_busy(i2c_imx, 0); 381 i2c_imx->stopped = 1; 382 } else if (i == (msgs->len - 2)) { 383 dev_dbg(&i2c_imx->adapter.dev, 384 "<%s> set TXAK\n", __func__); 385 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 386 temp |= I2CR_TXAK; 387 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 388 } 389 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); 390 dev_dbg(&i2c_imx->adapter.dev, 391 "<%s> read byte: B%d=0x%X\n", 392 __func__, i, msgs->buf[i]); 393 } 394 return 0; 395 } 396 397 static int i2c_imx_xfer(struct i2c_adapter *adapter, 398 struct i2c_msg *msgs, int num) 399 { 400 unsigned int i, temp; 401 int result; 402 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 403 404 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 405 406 /* Start I2C transfer */ 407 result = i2c_imx_start(i2c_imx); 408 if (result) 409 goto fail0; 410 411 /* read/write data */ 412 for (i = 0; i < num; i++) { 413 if (i) { 414 dev_dbg(&i2c_imx->adapter.dev, 415 "<%s> repeated start\n", __func__); 416 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 417 temp |= I2CR_RSTA; 418 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 419 result = i2c_imx_bus_busy(i2c_imx, 1); 420 if (result) 421 goto fail0; 422 } 423 dev_dbg(&i2c_imx->adapter.dev, 424 "<%s> transfer message: %d\n", __func__, i); 425 /* write/read data */ 426 #ifdef CONFIG_I2C_DEBUG_BUS 427 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 428 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 429 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 430 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 431 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 432 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 433 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 434 dev_dbg(&i2c_imx->adapter.dev, 435 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 436 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 437 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 438 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 439 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 440 (temp & I2SR_RXAK ? 1 : 0)); 441 #endif 442 if (msgs[i].flags & I2C_M_RD) 443 result = i2c_imx_read(i2c_imx, &msgs[i]); 444 else 445 result = i2c_imx_write(i2c_imx, &msgs[i]); 446 } 447 448 fail0: 449 /* Stop I2C transfer */ 450 i2c_imx_stop(i2c_imx); 451 452 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 453 (result < 0) ? "error" : "success msg", 454 (result < 0) ? result : num); 455 return (result < 0) ? result : num; 456 } 457 458 static u32 i2c_imx_func(struct i2c_adapter *adapter) 459 { 460 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 461 } 462 463 static struct i2c_algorithm i2c_imx_algo = { 464 .master_xfer = i2c_imx_xfer, 465 .functionality = i2c_imx_func, 466 }; 467 468 static int __init i2c_imx_probe(struct platform_device *pdev) 469 { 470 struct imx_i2c_struct *i2c_imx; 471 struct resource *res; 472 struct imxi2c_platform_data *pdata; 473 void __iomem *base; 474 resource_size_t res_size; 475 int irq; 476 int ret; 477 478 dev_dbg(&pdev->dev, "<%s>\n", __func__); 479 480 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 481 if (!res) { 482 dev_err(&pdev->dev, "can't get device resources\n"); 483 return -ENOENT; 484 } 485 irq = platform_get_irq(pdev, 0); 486 if (irq < 0) { 487 dev_err(&pdev->dev, "can't get irq number\n"); 488 return -ENOENT; 489 } 490 491 pdata = pdev->dev.platform_data; 492 493 if (pdata && pdata->init) { 494 ret = pdata->init(&pdev->dev); 495 if (ret) 496 return ret; 497 } 498 499 res_size = resource_size(res); 500 501 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) { 502 ret = -EBUSY; 503 goto fail0; 504 } 505 506 base = ioremap(res->start, res_size); 507 if (!base) { 508 dev_err(&pdev->dev, "ioremap failed\n"); 509 ret = -EIO; 510 goto fail1; 511 } 512 513 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL); 514 if (!i2c_imx) { 515 dev_err(&pdev->dev, "can't allocate interface\n"); 516 ret = -ENOMEM; 517 goto fail2; 518 } 519 520 /* Setup i2c_imx driver structure */ 521 strcpy(i2c_imx->adapter.name, pdev->name); 522 i2c_imx->adapter.owner = THIS_MODULE; 523 i2c_imx->adapter.algo = &i2c_imx_algo; 524 i2c_imx->adapter.dev.parent = &pdev->dev; 525 i2c_imx->adapter.nr = pdev->id; 526 i2c_imx->irq = irq; 527 i2c_imx->base = base; 528 i2c_imx->res = res; 529 530 /* Get I2C clock */ 531 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk"); 532 if (IS_ERR(i2c_imx->clk)) { 533 ret = PTR_ERR(i2c_imx->clk); 534 dev_err(&pdev->dev, "can't get I2C clock\n"); 535 goto fail3; 536 } 537 538 /* Request IRQ */ 539 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); 540 if (ret) { 541 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq); 542 goto fail4; 543 } 544 545 /* Init queue */ 546 init_waitqueue_head(&i2c_imx->queue); 547 548 /* Set up adapter data */ 549 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 550 551 /* Set up clock divider */ 552 if (pdata && pdata->bitrate) 553 i2c_imx_set_clk(i2c_imx, pdata->bitrate); 554 else 555 i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE); 556 557 /* Set up chip registers to defaults */ 558 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 559 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 560 561 /* Add I2C adapter */ 562 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); 563 if (ret < 0) { 564 dev_err(&pdev->dev, "registration failed\n"); 565 goto fail5; 566 } 567 568 /* Set up platform driver data */ 569 platform_set_drvdata(pdev, i2c_imx); 570 571 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq); 572 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", 573 i2c_imx->res->start, i2c_imx->res->end); 574 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n", 575 res_size, i2c_imx->res->start); 576 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", 577 i2c_imx->adapter.name); 578 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 579 580 return 0; /* Return OK */ 581 582 fail5: 583 free_irq(i2c_imx->irq, i2c_imx); 584 fail4: 585 clk_put(i2c_imx->clk); 586 fail3: 587 kfree(i2c_imx); 588 fail2: 589 iounmap(base); 590 fail1: 591 release_mem_region(res->start, resource_size(res)); 592 fail0: 593 if (pdata && pdata->exit) 594 pdata->exit(&pdev->dev); 595 return ret; /* Return error number */ 596 } 597 598 static int __exit i2c_imx_remove(struct platform_device *pdev) 599 { 600 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); 601 struct imxi2c_platform_data *pdata = pdev->dev.platform_data; 602 603 /* remove adapter */ 604 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 605 i2c_del_adapter(&i2c_imx->adapter); 606 platform_set_drvdata(pdev, NULL); 607 608 /* free interrupt */ 609 free_irq(i2c_imx->irq, i2c_imx); 610 611 /* setup chip registers to defaults */ 612 writeb(0, i2c_imx->base + IMX_I2C_IADR); 613 writeb(0, i2c_imx->base + IMX_I2C_IFDR); 614 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 615 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 616 617 /* Shut down hardware */ 618 if (pdata && pdata->exit) 619 pdata->exit(&pdev->dev); 620 621 clk_put(i2c_imx->clk); 622 623 iounmap(i2c_imx->base); 624 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); 625 kfree(i2c_imx); 626 return 0; 627 } 628 629 static struct platform_driver i2c_imx_driver = { 630 .probe = i2c_imx_probe, 631 .remove = __exit_p(i2c_imx_remove), 632 .driver = { 633 .name = DRIVER_NAME, 634 .owner = THIS_MODULE, 635 } 636 }; 637 638 static int __init i2c_adap_imx_init(void) 639 { 640 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); 641 } 642 subsys_initcall(i2c_adap_imx_init); 643 644 static void __exit i2c_adap_imx_exit(void) 645 { 646 platform_driver_unregister(&i2c_imx_driver); 647 } 648 module_exit(i2c_adap_imx_exit); 649 650 MODULE_LICENSE("GPL"); 651 MODULE_AUTHOR("Darius Augulis"); 652 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); 653 MODULE_ALIAS("platform:" DRIVER_NAME); 654