1 /* 2 * Copyright (C) 2002 Motorola GSG-China 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 17 * USA. 18 * 19 * Author: 20 * Darius Augulis, Teltonika Inc. 21 * 22 * Desc.: 23 * Implementation of I2C Adapter/Algorithm Driver 24 * for I2C Bus integrated in Freescale i.MX/MXC processors 25 * 26 * Derived from Motorola GSG China I2C example driver 27 * 28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de 29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de 30 * Copyright (C) 2007 RightHand Technologies, Inc. 31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> 32 * 33 */ 34 35 /** Includes ******************************************************************* 36 *******************************************************************************/ 37 38 #include <linux/init.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/errno.h> 42 #include <linux/err.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/i2c.h> 46 #include <linux/io.h> 47 #include <linux/sched.h> 48 #include <linux/platform_device.h> 49 #include <linux/clk.h> 50 51 #include <mach/irqs.h> 52 #include <mach/hardware.h> 53 #include <mach/i2c.h> 54 55 /** Defines ******************************************************************** 56 *******************************************************************************/ 57 58 /* This will be the driver name the kernel reports */ 59 #define DRIVER_NAME "imx-i2c" 60 61 /* Default value */ 62 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ 63 64 /* IMX I2C registers */ 65 #define IMX_I2C_IADR 0x00 /* i2c slave address */ 66 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ 67 #define IMX_I2C_I2CR 0x08 /* i2c control */ 68 #define IMX_I2C_I2SR 0x0C /* i2c status */ 69 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ 70 71 /* Bits of IMX I2C registers */ 72 #define I2SR_RXAK 0x01 73 #define I2SR_IIF 0x02 74 #define I2SR_SRW 0x04 75 #define I2SR_IAL 0x10 76 #define I2SR_IBB 0x20 77 #define I2SR_IAAS 0x40 78 #define I2SR_ICF 0x80 79 #define I2CR_RSTA 0x04 80 #define I2CR_TXAK 0x08 81 #define I2CR_MTX 0x10 82 #define I2CR_MSTA 0x20 83 #define I2CR_IIEN 0x40 84 #define I2CR_IEN 0x80 85 86 /** Variables ****************************************************************** 87 *******************************************************************************/ 88 89 /* 90 * sorted list of clock divider, register value pairs 91 * taken from table 26-5, p.26-9, Freescale i.MX 92 * Integrated Portable System Processor Reference Manual 93 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 94 * 95 * Duplicated divider values removed from list 96 */ 97 98 static u16 __initdata i2c_clk_div[50][2] = { 99 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, 100 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, 101 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, 102 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, 103 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, 104 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, 105 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, 106 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, 107 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, 108 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, 109 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, 110 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, 111 { 3072, 0x1E }, { 3840, 0x1F } 112 }; 113 114 struct imx_i2c_struct { 115 struct i2c_adapter adapter; 116 struct resource *res; 117 struct clk *clk; 118 void __iomem *base; 119 int irq; 120 wait_queue_head_t queue; 121 unsigned long i2csr; 122 unsigned int disable_delay; 123 }; 124 125 /** Functions for IMX I2C adapter driver *************************************** 126 *******************************************************************************/ 127 128 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx) 129 { 130 unsigned long orig_jiffies = jiffies; 131 132 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 133 134 /* wait for bus not busy */ 135 while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) { 136 if (signal_pending(current)) { 137 dev_dbg(&i2c_imx->adapter.dev, 138 "<%s> I2C Interrupted\n", __func__); 139 return -EINTR; 140 } 141 if (time_after(jiffies, orig_jiffies + HZ / 1000)) { 142 dev_dbg(&i2c_imx->adapter.dev, 143 "<%s> I2C bus is busy\n", __func__); 144 return -EIO; 145 } 146 schedule(); 147 } 148 149 return 0; 150 } 151 152 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) 153 { 154 int result; 155 156 result = wait_event_interruptible_timeout(i2c_imx->queue, 157 i2c_imx->i2csr & I2SR_IIF, HZ / 10); 158 159 if (unlikely(result < 0)) { 160 dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__); 161 return result; 162 } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { 163 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); 164 return -ETIMEDOUT; 165 } 166 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); 167 i2c_imx->i2csr = 0; 168 return 0; 169 } 170 171 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) 172 { 173 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { 174 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); 175 return -EIO; /* No ACK */ 176 } 177 178 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); 179 return 0; 180 } 181 182 static void i2c_imx_start(struct imx_i2c_struct *i2c_imx) 183 { 184 unsigned int temp = 0; 185 186 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 187 188 /* Enable I2C controller */ 189 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 190 /* Start I2C transaction */ 191 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 192 temp |= I2CR_MSTA; 193 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 194 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 195 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 196 } 197 198 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 199 { 200 unsigned int temp = 0; 201 202 /* Stop I2C transaction */ 203 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 204 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 205 temp &= ~I2CR_MSTA; 206 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 207 /* setup chip registers to defaults */ 208 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 209 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 210 /* 211 * This delay caused by an i.MXL hardware bug. 212 * If no (or too short) delay, no "STOP" bit will be generated. 213 */ 214 udelay(i2c_imx->disable_delay); 215 /* Disable I2C controller */ 216 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 217 } 218 219 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 220 unsigned int rate) 221 { 222 unsigned int i2c_clk_rate; 223 unsigned int div; 224 int i; 225 226 /* Divider value calculation */ 227 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 228 div = (i2c_clk_rate + rate - 1) / rate; 229 if (div < i2c_clk_div[0][0]) 230 i = 0; 231 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) 232 i = ARRAY_SIZE(i2c_clk_div) - 1; 233 else 234 for (i = 0; i2c_clk_div[i][0] < div; i++); 235 236 /* Write divider value to register */ 237 writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR); 238 239 /* 240 * There dummy delay is calculated. 241 * It should be about one I2C clock period long. 242 * This delay is used in I2C bus disable function 243 * to fix chip hardware bug. 244 */ 245 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0] 246 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); 247 248 /* dev_dbg() can't be used, because adapter is not yet registered */ 249 #ifdef CONFIG_I2C_DEBUG_BUS 250 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n", 251 __func__, i2c_clk_rate, div); 252 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n", 253 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]); 254 #endif 255 } 256 257 static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 258 { 259 struct imx_i2c_struct *i2c_imx = dev_id; 260 unsigned int temp; 261 262 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 263 if (temp & I2SR_IIF) { 264 /* save status register */ 265 i2c_imx->i2csr = temp; 266 temp &= ~I2SR_IIF; 267 writeb(temp, i2c_imx->base + IMX_I2C_I2SR); 268 wake_up_interruptible(&i2c_imx->queue); 269 return IRQ_HANDLED; 270 } 271 272 return IRQ_NONE; 273 } 274 275 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 276 { 277 int i, result; 278 279 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", 280 __func__, msgs->addr << 1); 281 282 /* write slave address */ 283 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); 284 result = i2c_imx_trx_complete(i2c_imx); 285 if (result) 286 return result; 287 result = i2c_imx_acked(i2c_imx); 288 if (result) 289 return result; 290 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); 291 292 /* write data */ 293 for (i = 0; i < msgs->len; i++) { 294 dev_dbg(&i2c_imx->adapter.dev, 295 "<%s> write byte: B%d=0x%X\n", 296 __func__, i, msgs->buf[i]); 297 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); 298 result = i2c_imx_trx_complete(i2c_imx); 299 if (result) 300 return result; 301 result = i2c_imx_acked(i2c_imx); 302 if (result) 303 return result; 304 } 305 return 0; 306 } 307 308 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 309 { 310 int i, result; 311 unsigned int temp; 312 313 dev_dbg(&i2c_imx->adapter.dev, 314 "<%s> write slave address: addr=0x%x\n", 315 __func__, (msgs->addr << 1) | 0x01); 316 317 /* write slave address */ 318 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); 319 result = i2c_imx_trx_complete(i2c_imx); 320 if (result) 321 return result; 322 result = i2c_imx_acked(i2c_imx); 323 if (result) 324 return result; 325 326 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); 327 328 /* setup bus to read data */ 329 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 330 temp &= ~I2CR_MTX; 331 if (msgs->len - 1) 332 temp &= ~I2CR_TXAK; 333 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 334 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ 335 336 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); 337 338 /* read data */ 339 for (i = 0; i < msgs->len; i++) { 340 result = i2c_imx_trx_complete(i2c_imx); 341 if (result) 342 return result; 343 if (i == (msgs->len - 1)) { 344 dev_dbg(&i2c_imx->adapter.dev, 345 "<%s> clear MSTA\n", __func__); 346 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 347 temp &= ~I2CR_MSTA; 348 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 349 } else if (i == (msgs->len - 2)) { 350 dev_dbg(&i2c_imx->adapter.dev, 351 "<%s> set TXAK\n", __func__); 352 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 353 temp |= I2CR_TXAK; 354 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 355 } 356 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); 357 dev_dbg(&i2c_imx->adapter.dev, 358 "<%s> read byte: B%d=0x%X\n", 359 __func__, i, msgs->buf[i]); 360 } 361 return 0; 362 } 363 364 static int i2c_imx_xfer(struct i2c_adapter *adapter, 365 struct i2c_msg *msgs, int num) 366 { 367 unsigned int i, temp; 368 int result; 369 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 370 371 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 372 373 /* Check if i2c bus is not busy */ 374 result = i2c_imx_bus_busy(i2c_imx); 375 if (result) 376 goto fail0; 377 378 /* Start I2C transfer */ 379 i2c_imx_start(i2c_imx); 380 381 /* read/write data */ 382 for (i = 0; i < num; i++) { 383 if (i) { 384 dev_dbg(&i2c_imx->adapter.dev, 385 "<%s> repeated start\n", __func__); 386 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 387 temp |= I2CR_RSTA; 388 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 389 } 390 dev_dbg(&i2c_imx->adapter.dev, 391 "<%s> transfer message: %d\n", __func__, i); 392 /* write/read data */ 393 #ifdef CONFIG_I2C_DEBUG_BUS 394 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 395 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 396 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 397 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 398 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 399 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 400 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 401 dev_dbg(&i2c_imx->adapter.dev, 402 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 403 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 404 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 405 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 406 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 407 (temp & I2SR_RXAK ? 1 : 0)); 408 #endif 409 if (msgs[i].flags & I2C_M_RD) 410 result = i2c_imx_read(i2c_imx, &msgs[i]); 411 else 412 result = i2c_imx_write(i2c_imx, &msgs[i]); 413 } 414 415 fail0: 416 /* Stop I2C transfer */ 417 i2c_imx_stop(i2c_imx); 418 419 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 420 (result < 0) ? "error" : "success msg", 421 (result < 0) ? result : num); 422 return (result < 0) ? result : num; 423 } 424 425 static u32 i2c_imx_func(struct i2c_adapter *adapter) 426 { 427 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 428 } 429 430 static struct i2c_algorithm i2c_imx_algo = { 431 .master_xfer = i2c_imx_xfer, 432 .functionality = i2c_imx_func, 433 }; 434 435 static int __init i2c_imx_probe(struct platform_device *pdev) 436 { 437 struct imx_i2c_struct *i2c_imx; 438 struct resource *res; 439 struct imxi2c_platform_data *pdata; 440 void __iomem *base; 441 resource_size_t res_size; 442 int irq; 443 int ret; 444 445 dev_dbg(&pdev->dev, "<%s>\n", __func__); 446 447 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 448 if (!res) { 449 dev_err(&pdev->dev, "can't get device resources\n"); 450 return -ENOENT; 451 } 452 irq = platform_get_irq(pdev, 0); 453 if (irq < 0) { 454 dev_err(&pdev->dev, "can't get irq number\n"); 455 return -ENOENT; 456 } 457 458 pdata = pdev->dev.platform_data; 459 460 if (pdata && pdata->init) { 461 ret = pdata->init(&pdev->dev); 462 if (ret) 463 return ret; 464 } 465 466 res_size = resource_size(res); 467 base = ioremap(res->start, res_size); 468 if (!base) { 469 dev_err(&pdev->dev, "ioremap failed\n"); 470 ret = -EIO; 471 goto fail0; 472 } 473 474 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL); 475 if (!i2c_imx) { 476 dev_err(&pdev->dev, "can't allocate interface\n"); 477 ret = -ENOMEM; 478 goto fail1; 479 } 480 481 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) { 482 ret = -EBUSY; 483 goto fail2; 484 } 485 486 /* Setup i2c_imx driver structure */ 487 strcpy(i2c_imx->adapter.name, pdev->name); 488 i2c_imx->adapter.owner = THIS_MODULE; 489 i2c_imx->adapter.algo = &i2c_imx_algo; 490 i2c_imx->adapter.dev.parent = &pdev->dev; 491 i2c_imx->adapter.nr = pdev->id; 492 i2c_imx->irq = irq; 493 i2c_imx->base = base; 494 i2c_imx->res = res; 495 496 /* Get I2C clock */ 497 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk"); 498 if (IS_ERR(i2c_imx->clk)) { 499 ret = PTR_ERR(i2c_imx->clk); 500 dev_err(&pdev->dev, "can't get I2C clock\n"); 501 goto fail3; 502 } 503 clk_enable(i2c_imx->clk); 504 505 /* Request IRQ */ 506 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); 507 if (ret) { 508 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq); 509 goto fail4; 510 } 511 512 /* Init queue */ 513 init_waitqueue_head(&i2c_imx->queue); 514 515 /* Set up adapter data */ 516 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 517 518 /* Set up clock divider */ 519 if (pdata && pdata->bitrate) 520 i2c_imx_set_clk(i2c_imx, pdata->bitrate); 521 else 522 i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE); 523 524 /* Set up chip registers to defaults */ 525 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 526 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 527 528 /* Add I2C adapter */ 529 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); 530 if (ret < 0) { 531 dev_err(&pdev->dev, "registration failed\n"); 532 goto fail5; 533 } 534 535 /* Set up platform driver data */ 536 platform_set_drvdata(pdev, i2c_imx); 537 538 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq); 539 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", 540 i2c_imx->res->start, i2c_imx->res->end); 541 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n", 542 res_size, i2c_imx->res->start); 543 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", 544 i2c_imx->adapter.name); 545 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 546 547 return 0; /* Return OK */ 548 549 fail5: 550 free_irq(i2c_imx->irq, i2c_imx); 551 fail4: 552 clk_disable(i2c_imx->clk); 553 clk_put(i2c_imx->clk); 554 fail3: 555 release_mem_region(i2c_imx->res->start, resource_size(res)); 556 fail2: 557 kfree(i2c_imx); 558 fail1: 559 iounmap(base); 560 fail0: 561 if (pdata && pdata->exit) 562 pdata->exit(&pdev->dev); 563 return ret; /* Return error number */ 564 } 565 566 static int __exit i2c_imx_remove(struct platform_device *pdev) 567 { 568 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); 569 struct imxi2c_platform_data *pdata = pdev->dev.platform_data; 570 571 /* remove adapter */ 572 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 573 i2c_del_adapter(&i2c_imx->adapter); 574 platform_set_drvdata(pdev, NULL); 575 576 /* free interrupt */ 577 free_irq(i2c_imx->irq, i2c_imx); 578 579 /* setup chip registers to defaults */ 580 writeb(0, i2c_imx->base + IMX_I2C_IADR); 581 writeb(0, i2c_imx->base + IMX_I2C_IFDR); 582 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 583 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 584 585 /* Shut down hardware */ 586 if (pdata && pdata->exit) 587 pdata->exit(&pdev->dev); 588 589 /* Disable I2C clock */ 590 clk_disable(i2c_imx->clk); 591 clk_put(i2c_imx->clk); 592 593 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); 594 iounmap(i2c_imx->base); 595 kfree(i2c_imx); 596 return 0; 597 } 598 599 static struct platform_driver i2c_imx_driver = { 600 .probe = i2c_imx_probe, 601 .remove = __exit_p(i2c_imx_remove), 602 .driver = { 603 .name = DRIVER_NAME, 604 .owner = THIS_MODULE, 605 } 606 }; 607 608 static int __init i2c_adap_imx_init(void) 609 { 610 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); 611 } 612 613 static void __exit i2c_adap_imx_exit(void) 614 { 615 platform_driver_unregister(&i2c_imx_driver); 616 } 617 618 module_init(i2c_adap_imx_init); 619 module_exit(i2c_adap_imx_exit); 620 621 MODULE_LICENSE("GPL"); 622 MODULE_AUTHOR("Darius Augulis"); 623 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); 624 MODULE_ALIAS("platform:" DRIVER_NAME); 625