1 /* 2 * Copyright (C) 2002 Motorola GSG-China 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 17 * USA. 18 * 19 * Author: 20 * Darius Augulis, Teltonika Inc. 21 * 22 * Desc.: 23 * Implementation of I2C Adapter/Algorithm Driver 24 * for I2C Bus integrated in Freescale i.MX/MXC processors 25 * 26 * Derived from Motorola GSG China I2C example driver 27 * 28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de 29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de 30 * Copyright (C) 2007 RightHand Technologies, Inc. 31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> 32 * 33 */ 34 35 /** Includes ******************************************************************* 36 *******************************************************************************/ 37 38 #include <linux/init.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/errno.h> 42 #include <linux/err.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/i2c.h> 46 #include <linux/io.h> 47 #include <linux/sched.h> 48 #include <linux/platform_device.h> 49 #include <linux/clk.h> 50 #include <linux/slab.h> 51 #include <linux/of.h> 52 #include <linux/of_device.h> 53 #include <linux/of_i2c.h> 54 #include <linux/pinctrl/consumer.h> 55 56 #include <mach/hardware.h> 57 #include <mach/i2c.h> 58 59 /** Defines ******************************************************************** 60 *******************************************************************************/ 61 62 /* This will be the driver name the kernel reports */ 63 #define DRIVER_NAME "imx-i2c" 64 65 /* Default value */ 66 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ 67 68 /* IMX I2C registers */ 69 #define IMX_I2C_IADR 0x00 /* i2c slave address */ 70 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ 71 #define IMX_I2C_I2CR 0x08 /* i2c control */ 72 #define IMX_I2C_I2SR 0x0C /* i2c status */ 73 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ 74 75 /* Bits of IMX I2C registers */ 76 #define I2SR_RXAK 0x01 77 #define I2SR_IIF 0x02 78 #define I2SR_SRW 0x04 79 #define I2SR_IAL 0x10 80 #define I2SR_IBB 0x20 81 #define I2SR_IAAS 0x40 82 #define I2SR_ICF 0x80 83 #define I2CR_RSTA 0x04 84 #define I2CR_TXAK 0x08 85 #define I2CR_MTX 0x10 86 #define I2CR_MSTA 0x20 87 #define I2CR_IIEN 0x40 88 #define I2CR_IEN 0x80 89 90 /** Variables ****************************************************************** 91 *******************************************************************************/ 92 93 /* 94 * sorted list of clock divider, register value pairs 95 * taken from table 26-5, p.26-9, Freescale i.MX 96 * Integrated Portable System Processor Reference Manual 97 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 98 * 99 * Duplicated divider values removed from list 100 */ 101 102 static u16 __initdata i2c_clk_div[50][2] = { 103 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, 104 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, 105 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, 106 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, 107 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, 108 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, 109 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, 110 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, 111 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, 112 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, 113 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, 114 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, 115 { 3072, 0x1E }, { 3840, 0x1F } 116 }; 117 118 struct imx_i2c_struct { 119 struct i2c_adapter adapter; 120 struct clk *clk; 121 void __iomem *base; 122 wait_queue_head_t queue; 123 unsigned long i2csr; 124 unsigned int disable_delay; 125 int stopped; 126 unsigned int ifdr; /* IMX_I2C_IFDR */ 127 }; 128 129 static const struct of_device_id i2c_imx_dt_ids[] = { 130 { .compatible = "fsl,imx1-i2c", }, 131 { /* sentinel */ } 132 }; 133 134 /** Functions for IMX I2C adapter driver *************************************** 135 *******************************************************************************/ 136 137 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) 138 { 139 unsigned long orig_jiffies = jiffies; 140 unsigned int temp; 141 142 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 143 144 while (1) { 145 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 146 if (for_busy && (temp & I2SR_IBB)) 147 break; 148 if (!for_busy && !(temp & I2SR_IBB)) 149 break; 150 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 151 dev_dbg(&i2c_imx->adapter.dev, 152 "<%s> I2C bus is busy\n", __func__); 153 return -ETIMEDOUT; 154 } 155 schedule(); 156 } 157 158 return 0; 159 } 160 161 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) 162 { 163 wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10); 164 165 if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { 166 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); 167 return -ETIMEDOUT; 168 } 169 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); 170 i2c_imx->i2csr = 0; 171 return 0; 172 } 173 174 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) 175 { 176 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { 177 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); 178 return -EIO; /* No ACK */ 179 } 180 181 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); 182 return 0; 183 } 184 185 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) 186 { 187 unsigned int temp = 0; 188 int result; 189 190 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 191 192 clk_prepare_enable(i2c_imx->clk); 193 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); 194 /* Enable I2C controller */ 195 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 196 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 197 198 /* Wait controller to be stable */ 199 udelay(50); 200 201 /* Start I2C transaction */ 202 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 203 temp |= I2CR_MSTA; 204 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 205 result = i2c_imx_bus_busy(i2c_imx, 1); 206 if (result) 207 return result; 208 i2c_imx->stopped = 0; 209 210 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 211 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 212 return result; 213 } 214 215 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 216 { 217 unsigned int temp = 0; 218 219 if (!i2c_imx->stopped) { 220 /* Stop I2C transaction */ 221 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 222 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 223 temp &= ~(I2CR_MSTA | I2CR_MTX); 224 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 225 } 226 if (cpu_is_mx1()) { 227 /* 228 * This delay caused by an i.MXL hardware bug. 229 * If no (or too short) delay, no "STOP" bit will be generated. 230 */ 231 udelay(i2c_imx->disable_delay); 232 } 233 234 if (!i2c_imx->stopped) { 235 i2c_imx_bus_busy(i2c_imx, 0); 236 i2c_imx->stopped = 1; 237 } 238 239 /* Disable I2C controller */ 240 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 241 clk_disable_unprepare(i2c_imx->clk); 242 } 243 244 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 245 unsigned int rate) 246 { 247 unsigned int i2c_clk_rate; 248 unsigned int div; 249 int i; 250 251 /* Divider value calculation */ 252 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 253 div = (i2c_clk_rate + rate - 1) / rate; 254 if (div < i2c_clk_div[0][0]) 255 i = 0; 256 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) 257 i = ARRAY_SIZE(i2c_clk_div) - 1; 258 else 259 for (i = 0; i2c_clk_div[i][0] < div; i++); 260 261 /* Store divider value */ 262 i2c_imx->ifdr = i2c_clk_div[i][1]; 263 264 /* 265 * There dummy delay is calculated. 266 * It should be about one I2C clock period long. 267 * This delay is used in I2C bus disable function 268 * to fix chip hardware bug. 269 */ 270 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0] 271 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); 272 273 /* dev_dbg() can't be used, because adapter is not yet registered */ 274 #ifdef CONFIG_I2C_DEBUG_BUS 275 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n", 276 __func__, i2c_clk_rate, div); 277 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n", 278 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]); 279 #endif 280 } 281 282 static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 283 { 284 struct imx_i2c_struct *i2c_imx = dev_id; 285 unsigned int temp; 286 287 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 288 if (temp & I2SR_IIF) { 289 /* save status register */ 290 i2c_imx->i2csr = temp; 291 temp &= ~I2SR_IIF; 292 writeb(temp, i2c_imx->base + IMX_I2C_I2SR); 293 wake_up(&i2c_imx->queue); 294 return IRQ_HANDLED; 295 } 296 297 return IRQ_NONE; 298 } 299 300 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 301 { 302 int i, result; 303 304 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", 305 __func__, msgs->addr << 1); 306 307 /* write slave address */ 308 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); 309 result = i2c_imx_trx_complete(i2c_imx); 310 if (result) 311 return result; 312 result = i2c_imx_acked(i2c_imx); 313 if (result) 314 return result; 315 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); 316 317 /* write data */ 318 for (i = 0; i < msgs->len; i++) { 319 dev_dbg(&i2c_imx->adapter.dev, 320 "<%s> write byte: B%d=0x%X\n", 321 __func__, i, msgs->buf[i]); 322 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); 323 result = i2c_imx_trx_complete(i2c_imx); 324 if (result) 325 return result; 326 result = i2c_imx_acked(i2c_imx); 327 if (result) 328 return result; 329 } 330 return 0; 331 } 332 333 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 334 { 335 int i, result; 336 unsigned int temp; 337 338 dev_dbg(&i2c_imx->adapter.dev, 339 "<%s> write slave address: addr=0x%x\n", 340 __func__, (msgs->addr << 1) | 0x01); 341 342 /* write slave address */ 343 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); 344 result = i2c_imx_trx_complete(i2c_imx); 345 if (result) 346 return result; 347 result = i2c_imx_acked(i2c_imx); 348 if (result) 349 return result; 350 351 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); 352 353 /* setup bus to read data */ 354 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 355 temp &= ~I2CR_MTX; 356 if (msgs->len - 1) 357 temp &= ~I2CR_TXAK; 358 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 359 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ 360 361 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); 362 363 /* read data */ 364 for (i = 0; i < msgs->len; i++) { 365 result = i2c_imx_trx_complete(i2c_imx); 366 if (result) 367 return result; 368 if (i == (msgs->len - 1)) { 369 /* It must generate STOP before read I2DR to prevent 370 controller from generating another clock cycle */ 371 dev_dbg(&i2c_imx->adapter.dev, 372 "<%s> clear MSTA\n", __func__); 373 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 374 temp &= ~(I2CR_MSTA | I2CR_MTX); 375 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 376 i2c_imx_bus_busy(i2c_imx, 0); 377 i2c_imx->stopped = 1; 378 } else if (i == (msgs->len - 2)) { 379 dev_dbg(&i2c_imx->adapter.dev, 380 "<%s> set TXAK\n", __func__); 381 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 382 temp |= I2CR_TXAK; 383 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 384 } 385 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); 386 dev_dbg(&i2c_imx->adapter.dev, 387 "<%s> read byte: B%d=0x%X\n", 388 __func__, i, msgs->buf[i]); 389 } 390 return 0; 391 } 392 393 static int i2c_imx_xfer(struct i2c_adapter *adapter, 394 struct i2c_msg *msgs, int num) 395 { 396 unsigned int i, temp; 397 int result; 398 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 399 400 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 401 402 /* Start I2C transfer */ 403 result = i2c_imx_start(i2c_imx); 404 if (result) 405 goto fail0; 406 407 /* read/write data */ 408 for (i = 0; i < num; i++) { 409 if (i) { 410 dev_dbg(&i2c_imx->adapter.dev, 411 "<%s> repeated start\n", __func__); 412 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 413 temp |= I2CR_RSTA; 414 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 415 result = i2c_imx_bus_busy(i2c_imx, 1); 416 if (result) 417 goto fail0; 418 } 419 dev_dbg(&i2c_imx->adapter.dev, 420 "<%s> transfer message: %d\n", __func__, i); 421 /* write/read data */ 422 #ifdef CONFIG_I2C_DEBUG_BUS 423 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 424 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 425 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 426 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 427 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 428 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 429 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 430 dev_dbg(&i2c_imx->adapter.dev, 431 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 432 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 433 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 434 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 435 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 436 (temp & I2SR_RXAK ? 1 : 0)); 437 #endif 438 if (msgs[i].flags & I2C_M_RD) 439 result = i2c_imx_read(i2c_imx, &msgs[i]); 440 else 441 result = i2c_imx_write(i2c_imx, &msgs[i]); 442 if (result) 443 goto fail0; 444 } 445 446 fail0: 447 /* Stop I2C transfer */ 448 i2c_imx_stop(i2c_imx); 449 450 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 451 (result < 0) ? "error" : "success msg", 452 (result < 0) ? result : num); 453 return (result < 0) ? result : num; 454 } 455 456 static u32 i2c_imx_func(struct i2c_adapter *adapter) 457 { 458 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 459 } 460 461 static struct i2c_algorithm i2c_imx_algo = { 462 .master_xfer = i2c_imx_xfer, 463 .functionality = i2c_imx_func, 464 }; 465 466 static int __init i2c_imx_probe(struct platform_device *pdev) 467 { 468 struct imx_i2c_struct *i2c_imx; 469 struct resource *res; 470 struct imxi2c_platform_data *pdata = pdev->dev.platform_data; 471 struct pinctrl *pinctrl; 472 void __iomem *base; 473 int irq, ret; 474 u32 bitrate; 475 476 dev_dbg(&pdev->dev, "<%s>\n", __func__); 477 478 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 479 if (!res) { 480 dev_err(&pdev->dev, "can't get device resources\n"); 481 return -ENOENT; 482 } 483 irq = platform_get_irq(pdev, 0); 484 if (irq < 0) { 485 dev_err(&pdev->dev, "can't get irq number\n"); 486 return -ENOENT; 487 } 488 489 base = devm_request_and_ioremap(&pdev->dev, res); 490 if (!base) 491 return -EBUSY; 492 493 i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct), 494 GFP_KERNEL); 495 if (!i2c_imx) { 496 dev_err(&pdev->dev, "can't allocate interface\n"); 497 return -ENOMEM; 498 } 499 500 /* Setup i2c_imx driver structure */ 501 strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); 502 i2c_imx->adapter.owner = THIS_MODULE; 503 i2c_imx->adapter.algo = &i2c_imx_algo; 504 i2c_imx->adapter.dev.parent = &pdev->dev; 505 i2c_imx->adapter.nr = pdev->id; 506 i2c_imx->adapter.dev.of_node = pdev->dev.of_node; 507 i2c_imx->base = base; 508 509 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 510 if (IS_ERR(pinctrl)) { 511 dev_err(&pdev->dev, "can't get/select pinctrl\n"); 512 return PTR_ERR(pinctrl); 513 } 514 515 /* Get I2C clock */ 516 i2c_imx->clk = devm_clk_get(&pdev->dev, NULL); 517 if (IS_ERR(i2c_imx->clk)) { 518 dev_err(&pdev->dev, "can't get I2C clock\n"); 519 return PTR_ERR(i2c_imx->clk); 520 } 521 522 /* Request IRQ */ 523 ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0, 524 pdev->name, i2c_imx); 525 if (ret) { 526 dev_err(&pdev->dev, "can't claim irq %d\n", irq); 527 return ret; 528 } 529 530 /* Init queue */ 531 init_waitqueue_head(&i2c_imx->queue); 532 533 /* Set up adapter data */ 534 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 535 536 /* Set up clock divider */ 537 bitrate = IMX_I2C_BIT_RATE; 538 ret = of_property_read_u32(pdev->dev.of_node, 539 "clock-frequency", &bitrate); 540 if (ret < 0 && pdata && pdata->bitrate) 541 bitrate = pdata->bitrate; 542 i2c_imx_set_clk(i2c_imx, bitrate); 543 544 /* Set up chip registers to defaults */ 545 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 546 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 547 548 /* Add I2C adapter */ 549 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); 550 if (ret < 0) { 551 dev_err(&pdev->dev, "registration failed\n"); 552 return ret; 553 } 554 555 of_i2c_register_devices(&i2c_imx->adapter); 556 557 /* Set up platform driver data */ 558 platform_set_drvdata(pdev, i2c_imx); 559 560 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq); 561 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", 562 res->start, res->end); 563 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x\n", 564 resource_size(res), res->start); 565 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", 566 i2c_imx->adapter.name); 567 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 568 569 return 0; /* Return OK */ 570 } 571 572 static int __exit i2c_imx_remove(struct platform_device *pdev) 573 { 574 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); 575 576 /* remove adapter */ 577 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 578 i2c_del_adapter(&i2c_imx->adapter); 579 platform_set_drvdata(pdev, NULL); 580 581 /* setup chip registers to defaults */ 582 writeb(0, i2c_imx->base + IMX_I2C_IADR); 583 writeb(0, i2c_imx->base + IMX_I2C_IFDR); 584 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 585 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 586 587 return 0; 588 } 589 590 static struct platform_driver i2c_imx_driver = { 591 .remove = __exit_p(i2c_imx_remove), 592 .driver = { 593 .name = DRIVER_NAME, 594 .owner = THIS_MODULE, 595 .of_match_table = i2c_imx_dt_ids, 596 } 597 }; 598 599 static int __init i2c_adap_imx_init(void) 600 { 601 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); 602 } 603 subsys_initcall(i2c_adap_imx_init); 604 605 static void __exit i2c_adap_imx_exit(void) 606 { 607 platform_driver_unregister(&i2c_imx_driver); 608 } 609 module_exit(i2c_adap_imx_exit); 610 611 MODULE_LICENSE("GPL"); 612 MODULE_AUTHOR("Darius Augulis"); 613 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); 614 MODULE_ALIAS("platform:" DRIVER_NAME); 615