1 /* 2 * Copyright (C) 2002 Motorola GSG-China 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 17 * USA. 18 * 19 * Author: 20 * Darius Augulis, Teltonika Inc. 21 * 22 * Desc.: 23 * Implementation of I2C Adapter/Algorithm Driver 24 * for I2C Bus integrated in Freescale i.MX/MXC processors 25 * 26 * Derived from Motorola GSG China I2C example driver 27 * 28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de 29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de 30 * Copyright (C) 2007 RightHand Technologies, Inc. 31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> 32 * 33 */ 34 35 /** Includes ******************************************************************* 36 *******************************************************************************/ 37 38 #include <linux/init.h> 39 #include <linux/kernel.h> 40 #include <linux/module.h> 41 #include <linux/errno.h> 42 #include <linux/err.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/i2c.h> 46 #include <linux/io.h> 47 #include <linux/sched.h> 48 #include <linux/platform_device.h> 49 #include <linux/clk.h> 50 #include <linux/slab.h> 51 52 #include <mach/irqs.h> 53 #include <mach/hardware.h> 54 #include <mach/i2c.h> 55 56 /** Defines ******************************************************************** 57 *******************************************************************************/ 58 59 /* This will be the driver name the kernel reports */ 60 #define DRIVER_NAME "imx-i2c" 61 62 /* Default value */ 63 #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ 64 65 /* IMX I2C registers */ 66 #define IMX_I2C_IADR 0x00 /* i2c slave address */ 67 #define IMX_I2C_IFDR 0x04 /* i2c frequency divider */ 68 #define IMX_I2C_I2CR 0x08 /* i2c control */ 69 #define IMX_I2C_I2SR 0x0C /* i2c status */ 70 #define IMX_I2C_I2DR 0x10 /* i2c transfer data */ 71 72 /* Bits of IMX I2C registers */ 73 #define I2SR_RXAK 0x01 74 #define I2SR_IIF 0x02 75 #define I2SR_SRW 0x04 76 #define I2SR_IAL 0x10 77 #define I2SR_IBB 0x20 78 #define I2SR_IAAS 0x40 79 #define I2SR_ICF 0x80 80 #define I2CR_RSTA 0x04 81 #define I2CR_TXAK 0x08 82 #define I2CR_MTX 0x10 83 #define I2CR_MSTA 0x20 84 #define I2CR_IIEN 0x40 85 #define I2CR_IEN 0x80 86 87 /** Variables ****************************************************************** 88 *******************************************************************************/ 89 90 /* 91 * sorted list of clock divider, register value pairs 92 * taken from table 26-5, p.26-9, Freescale i.MX 93 * Integrated Portable System Processor Reference Manual 94 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007 95 * 96 * Duplicated divider values removed from list 97 */ 98 99 static u16 __initdata i2c_clk_div[50][2] = { 100 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, 101 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, 102 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, 103 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, 104 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, 105 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, 106 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, 107 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, 108 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, 109 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, 110 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, 111 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, 112 { 3072, 0x1E }, { 3840, 0x1F } 113 }; 114 115 struct imx_i2c_struct { 116 struct i2c_adapter adapter; 117 struct resource *res; 118 struct clk *clk; 119 void __iomem *base; 120 int irq; 121 wait_queue_head_t queue; 122 unsigned long i2csr; 123 unsigned int disable_delay; 124 int stopped; 125 unsigned int ifdr; /* IMX_I2C_IFDR */ 126 }; 127 128 /** Functions for IMX I2C adapter driver *************************************** 129 *******************************************************************************/ 130 131 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) 132 { 133 unsigned long orig_jiffies = jiffies; 134 unsigned int temp; 135 136 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 137 138 while (1) { 139 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 140 if (for_busy && (temp & I2SR_IBB)) 141 break; 142 if (!for_busy && !(temp & I2SR_IBB)) 143 break; 144 if (signal_pending(current)) { 145 dev_dbg(&i2c_imx->adapter.dev, 146 "<%s> I2C Interrupted\n", __func__); 147 return -EINTR; 148 } 149 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 150 dev_dbg(&i2c_imx->adapter.dev, 151 "<%s> I2C bus is busy\n", __func__); 152 return -ETIMEDOUT; 153 } 154 schedule(); 155 } 156 157 return 0; 158 } 159 160 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) 161 { 162 int result; 163 164 result = wait_event_interruptible_timeout(i2c_imx->queue, 165 i2c_imx->i2csr & I2SR_IIF, HZ / 10); 166 167 if (unlikely(result < 0)) { 168 dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__); 169 return result; 170 } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { 171 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); 172 return -ETIMEDOUT; 173 } 174 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); 175 i2c_imx->i2csr = 0; 176 return 0; 177 } 178 179 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) 180 { 181 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { 182 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); 183 return -EIO; /* No ACK */ 184 } 185 186 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); 187 return 0; 188 } 189 190 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) 191 { 192 unsigned int temp = 0; 193 int result; 194 195 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 196 197 clk_enable(i2c_imx->clk); 198 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); 199 /* Enable I2C controller */ 200 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 201 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 202 203 /* Wait controller to be stable */ 204 udelay(50); 205 206 /* Start I2C transaction */ 207 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 208 temp |= I2CR_MSTA; 209 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 210 result = i2c_imx_bus_busy(i2c_imx, 1); 211 if (result) 212 return result; 213 i2c_imx->stopped = 0; 214 215 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 216 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 217 return result; 218 } 219 220 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 221 { 222 unsigned int temp = 0; 223 224 if (!i2c_imx->stopped) { 225 /* Stop I2C transaction */ 226 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 227 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 228 temp &= ~(I2CR_MSTA | I2CR_MTX); 229 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 230 } 231 if (cpu_is_mx1()) { 232 /* 233 * This delay caused by an i.MXL hardware bug. 234 * If no (or too short) delay, no "STOP" bit will be generated. 235 */ 236 udelay(i2c_imx->disable_delay); 237 } 238 239 if (!i2c_imx->stopped) { 240 i2c_imx_bus_busy(i2c_imx, 0); 241 i2c_imx->stopped = 1; 242 } 243 244 /* Disable I2C controller */ 245 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 246 clk_disable(i2c_imx->clk); 247 } 248 249 static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 250 unsigned int rate) 251 { 252 unsigned int i2c_clk_rate; 253 unsigned int div; 254 int i; 255 256 /* Divider value calculation */ 257 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 258 div = (i2c_clk_rate + rate - 1) / rate; 259 if (div < i2c_clk_div[0][0]) 260 i = 0; 261 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) 262 i = ARRAY_SIZE(i2c_clk_div) - 1; 263 else 264 for (i = 0; i2c_clk_div[i][0] < div; i++); 265 266 /* Store divider value */ 267 i2c_imx->ifdr = i2c_clk_div[i][1]; 268 269 /* 270 * There dummy delay is calculated. 271 * It should be about one I2C clock period long. 272 * This delay is used in I2C bus disable function 273 * to fix chip hardware bug. 274 */ 275 i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0] 276 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2); 277 278 /* dev_dbg() can't be used, because adapter is not yet registered */ 279 #ifdef CONFIG_I2C_DEBUG_BUS 280 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n", 281 __func__, i2c_clk_rate, div); 282 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n", 283 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]); 284 #endif 285 } 286 287 static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 288 { 289 struct imx_i2c_struct *i2c_imx = dev_id; 290 unsigned int temp; 291 292 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 293 if (temp & I2SR_IIF) { 294 /* save status register */ 295 i2c_imx->i2csr = temp; 296 temp &= ~I2SR_IIF; 297 writeb(temp, i2c_imx->base + IMX_I2C_I2SR); 298 wake_up_interruptible(&i2c_imx->queue); 299 return IRQ_HANDLED; 300 } 301 302 return IRQ_NONE; 303 } 304 305 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 306 { 307 int i, result; 308 309 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", 310 __func__, msgs->addr << 1); 311 312 /* write slave address */ 313 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR); 314 result = i2c_imx_trx_complete(i2c_imx); 315 if (result) 316 return result; 317 result = i2c_imx_acked(i2c_imx); 318 if (result) 319 return result; 320 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); 321 322 /* write data */ 323 for (i = 0; i < msgs->len; i++) { 324 dev_dbg(&i2c_imx->adapter.dev, 325 "<%s> write byte: B%d=0x%X\n", 326 __func__, i, msgs->buf[i]); 327 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR); 328 result = i2c_imx_trx_complete(i2c_imx); 329 if (result) 330 return result; 331 result = i2c_imx_acked(i2c_imx); 332 if (result) 333 return result; 334 } 335 return 0; 336 } 337 338 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 339 { 340 int i, result; 341 unsigned int temp; 342 343 dev_dbg(&i2c_imx->adapter.dev, 344 "<%s> write slave address: addr=0x%x\n", 345 __func__, (msgs->addr << 1) | 0x01); 346 347 /* write slave address */ 348 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR); 349 result = i2c_imx_trx_complete(i2c_imx); 350 if (result) 351 return result; 352 result = i2c_imx_acked(i2c_imx); 353 if (result) 354 return result; 355 356 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); 357 358 /* setup bus to read data */ 359 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 360 temp &= ~I2CR_MTX; 361 if (msgs->len - 1) 362 temp &= ~I2CR_TXAK; 363 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 364 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */ 365 366 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); 367 368 /* read data */ 369 for (i = 0; i < msgs->len; i++) { 370 result = i2c_imx_trx_complete(i2c_imx); 371 if (result) 372 return result; 373 if (i == (msgs->len - 1)) { 374 /* It must generate STOP before read I2DR to prevent 375 controller from generating another clock cycle */ 376 dev_dbg(&i2c_imx->adapter.dev, 377 "<%s> clear MSTA\n", __func__); 378 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 379 temp &= ~(I2CR_MSTA | I2CR_MTX); 380 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 381 i2c_imx_bus_busy(i2c_imx, 0); 382 i2c_imx->stopped = 1; 383 } else if (i == (msgs->len - 2)) { 384 dev_dbg(&i2c_imx->adapter.dev, 385 "<%s> set TXAK\n", __func__); 386 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 387 temp |= I2CR_TXAK; 388 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 389 } 390 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR); 391 dev_dbg(&i2c_imx->adapter.dev, 392 "<%s> read byte: B%d=0x%X\n", 393 __func__, i, msgs->buf[i]); 394 } 395 return 0; 396 } 397 398 static int i2c_imx_xfer(struct i2c_adapter *adapter, 399 struct i2c_msg *msgs, int num) 400 { 401 unsigned int i, temp; 402 int result; 403 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 404 405 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 406 407 /* Start I2C transfer */ 408 result = i2c_imx_start(i2c_imx); 409 if (result) 410 goto fail0; 411 412 /* read/write data */ 413 for (i = 0; i < num; i++) { 414 if (i) { 415 dev_dbg(&i2c_imx->adapter.dev, 416 "<%s> repeated start\n", __func__); 417 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 418 temp |= I2CR_RSTA; 419 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 420 result = i2c_imx_bus_busy(i2c_imx, 1); 421 if (result) 422 goto fail0; 423 } 424 dev_dbg(&i2c_imx->adapter.dev, 425 "<%s> transfer message: %d\n", __func__, i); 426 /* write/read data */ 427 #ifdef CONFIG_I2C_DEBUG_BUS 428 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 429 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 430 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 431 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 432 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 433 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 434 temp = readb(i2c_imx->base + IMX_I2C_I2SR); 435 dev_dbg(&i2c_imx->adapter.dev, 436 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 437 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 438 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 439 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 440 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 441 (temp & I2SR_RXAK ? 1 : 0)); 442 #endif 443 if (msgs[i].flags & I2C_M_RD) 444 result = i2c_imx_read(i2c_imx, &msgs[i]); 445 else 446 result = i2c_imx_write(i2c_imx, &msgs[i]); 447 if (result) 448 goto fail0; 449 } 450 451 fail0: 452 /* Stop I2C transfer */ 453 i2c_imx_stop(i2c_imx); 454 455 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 456 (result < 0) ? "error" : "success msg", 457 (result < 0) ? result : num); 458 return (result < 0) ? result : num; 459 } 460 461 static u32 i2c_imx_func(struct i2c_adapter *adapter) 462 { 463 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 464 } 465 466 static struct i2c_algorithm i2c_imx_algo = { 467 .master_xfer = i2c_imx_xfer, 468 .functionality = i2c_imx_func, 469 }; 470 471 static int __init i2c_imx_probe(struct platform_device *pdev) 472 { 473 struct imx_i2c_struct *i2c_imx; 474 struct resource *res; 475 struct imxi2c_platform_data *pdata; 476 void __iomem *base; 477 resource_size_t res_size; 478 int irq; 479 int ret; 480 481 dev_dbg(&pdev->dev, "<%s>\n", __func__); 482 483 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 484 if (!res) { 485 dev_err(&pdev->dev, "can't get device resources\n"); 486 return -ENOENT; 487 } 488 irq = platform_get_irq(pdev, 0); 489 if (irq < 0) { 490 dev_err(&pdev->dev, "can't get irq number\n"); 491 return -ENOENT; 492 } 493 494 pdata = pdev->dev.platform_data; 495 496 if (pdata && pdata->init) { 497 ret = pdata->init(&pdev->dev); 498 if (ret) 499 return ret; 500 } 501 502 res_size = resource_size(res); 503 504 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) { 505 ret = -EBUSY; 506 goto fail0; 507 } 508 509 base = ioremap(res->start, res_size); 510 if (!base) { 511 dev_err(&pdev->dev, "ioremap failed\n"); 512 ret = -EIO; 513 goto fail1; 514 } 515 516 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL); 517 if (!i2c_imx) { 518 dev_err(&pdev->dev, "can't allocate interface\n"); 519 ret = -ENOMEM; 520 goto fail2; 521 } 522 523 /* Setup i2c_imx driver structure */ 524 strcpy(i2c_imx->adapter.name, pdev->name); 525 i2c_imx->adapter.owner = THIS_MODULE; 526 i2c_imx->adapter.algo = &i2c_imx_algo; 527 i2c_imx->adapter.dev.parent = &pdev->dev; 528 i2c_imx->adapter.nr = pdev->id; 529 i2c_imx->irq = irq; 530 i2c_imx->base = base; 531 i2c_imx->res = res; 532 533 /* Get I2C clock */ 534 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk"); 535 if (IS_ERR(i2c_imx->clk)) { 536 ret = PTR_ERR(i2c_imx->clk); 537 dev_err(&pdev->dev, "can't get I2C clock\n"); 538 goto fail3; 539 } 540 541 /* Request IRQ */ 542 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); 543 if (ret) { 544 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq); 545 goto fail4; 546 } 547 548 /* Init queue */ 549 init_waitqueue_head(&i2c_imx->queue); 550 551 /* Set up adapter data */ 552 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 553 554 /* Set up clock divider */ 555 if (pdata && pdata->bitrate) 556 i2c_imx_set_clk(i2c_imx, pdata->bitrate); 557 else 558 i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE); 559 560 /* Set up chip registers to defaults */ 561 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 562 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 563 564 /* Add I2C adapter */ 565 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); 566 if (ret < 0) { 567 dev_err(&pdev->dev, "registration failed\n"); 568 goto fail5; 569 } 570 571 /* Set up platform driver data */ 572 platform_set_drvdata(pdev, i2c_imx); 573 574 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq); 575 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n", 576 i2c_imx->res->start, i2c_imx->res->end); 577 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n", 578 res_size, i2c_imx->res->start); 579 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", 580 i2c_imx->adapter.name); 581 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 582 583 return 0; /* Return OK */ 584 585 fail5: 586 free_irq(i2c_imx->irq, i2c_imx); 587 fail4: 588 clk_put(i2c_imx->clk); 589 fail3: 590 kfree(i2c_imx); 591 fail2: 592 iounmap(base); 593 fail1: 594 release_mem_region(res->start, resource_size(res)); 595 fail0: 596 if (pdata && pdata->exit) 597 pdata->exit(&pdev->dev); 598 return ret; /* Return error number */ 599 } 600 601 static int __exit i2c_imx_remove(struct platform_device *pdev) 602 { 603 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); 604 struct imxi2c_platform_data *pdata = pdev->dev.platform_data; 605 606 /* remove adapter */ 607 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); 608 i2c_del_adapter(&i2c_imx->adapter); 609 platform_set_drvdata(pdev, NULL); 610 611 /* free interrupt */ 612 free_irq(i2c_imx->irq, i2c_imx); 613 614 /* setup chip registers to defaults */ 615 writeb(0, i2c_imx->base + IMX_I2C_IADR); 616 writeb(0, i2c_imx->base + IMX_I2C_IFDR); 617 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 618 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 619 620 /* Shut down hardware */ 621 if (pdata && pdata->exit) 622 pdata->exit(&pdev->dev); 623 624 clk_put(i2c_imx->clk); 625 626 iounmap(i2c_imx->base); 627 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); 628 kfree(i2c_imx); 629 return 0; 630 } 631 632 static struct platform_driver i2c_imx_driver = { 633 .remove = __exit_p(i2c_imx_remove), 634 .driver = { 635 .name = DRIVER_NAME, 636 .owner = THIS_MODULE, 637 } 638 }; 639 640 static int __init i2c_adap_imx_init(void) 641 { 642 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); 643 } 644 subsys_initcall(i2c_adap_imx_init); 645 646 static void __exit i2c_adap_imx_exit(void) 647 { 648 platform_driver_unregister(&i2c_imx_driver); 649 } 650 module_exit(i2c_adap_imx_exit); 651 652 MODULE_LICENSE("GPL"); 653 MODULE_AUTHOR("Darius Augulis"); 654 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus"); 655 MODULE_ALIAS("platform:" DRIVER_NAME); 656