1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Synopsys DesignWare I2C adapter driver (slave only). 4 * 5 * Based on the Synopsys DesignWare I2C adapter driver (master). 6 * 7 * Copyright (C) 2016 Synopsys Inc. 8 */ 9 #include <linux/delay.h> 10 #include <linux/err.h> 11 #include <linux/errno.h> 12 #include <linux/i2c.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/pm_runtime.h> 17 18 #include "i2c-designware-core.h" 19 20 static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev) 21 { 22 /* Configure Tx/Rx FIFO threshold levels. */ 23 dw_writel(dev, 0, DW_IC_TX_TL); 24 dw_writel(dev, 0, DW_IC_RX_TL); 25 26 /* Configure the I2C slave. */ 27 dw_writel(dev, dev->slave_cfg, DW_IC_CON); 28 dw_writel(dev, DW_IC_INTR_SLAVE_MASK, DW_IC_INTR_MASK); 29 } 30 31 /** 32 * i2c_dw_init_slave() - Initialize the designware i2c slave hardware 33 * @dev: device private data 34 * 35 * This function configures and enables the I2C in slave mode. 36 * This function is called during I2C init function, and in case of timeout at 37 * run time. 38 */ 39 static int i2c_dw_init_slave(struct dw_i2c_dev *dev) 40 { 41 int ret; 42 43 ret = i2c_dw_acquire_lock(dev); 44 if (ret) 45 return ret; 46 47 /* Disable the adapter. */ 48 __i2c_dw_disable(dev); 49 50 /* Write SDA hold time if supported */ 51 if (dev->sda_hold_time) 52 dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD); 53 54 i2c_dw_configure_fifo_slave(dev); 55 i2c_dw_release_lock(dev); 56 57 return 0; 58 } 59 60 static int i2c_dw_reg_slave(struct i2c_client *slave) 61 { 62 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter); 63 64 if (dev->slave) 65 return -EBUSY; 66 if (slave->flags & I2C_CLIENT_TEN) 67 return -EAFNOSUPPORT; 68 pm_runtime_get_sync(dev->dev); 69 70 /* 71 * Set slave address in the IC_SAR register, 72 * the address to which the DW_apb_i2c responds. 73 */ 74 __i2c_dw_disable_nowait(dev); 75 dw_writel(dev, slave->addr, DW_IC_SAR); 76 dev->slave = slave; 77 78 __i2c_dw_enable(dev); 79 80 dev->cmd_err = 0; 81 dev->msg_write_idx = 0; 82 dev->msg_read_idx = 0; 83 dev->msg_err = 0; 84 dev->status = STATUS_IDLE; 85 dev->abort_source = 0; 86 dev->rx_outstanding = 0; 87 88 return 0; 89 } 90 91 static int i2c_dw_unreg_slave(struct i2c_client *slave) 92 { 93 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter); 94 95 dev->disable_int(dev); 96 dev->disable(dev); 97 dev->slave = NULL; 98 pm_runtime_put(dev->dev); 99 100 return 0; 101 } 102 103 static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev) 104 { 105 u32 stat; 106 107 /* 108 * The IC_INTR_STAT register just indicates "enabled" interrupts. 109 * Ths unmasked raw version of interrupt status bits are available 110 * in the IC_RAW_INTR_STAT register. 111 * 112 * That is, 113 * stat = dw_readl(IC_INTR_STAT); 114 * equals to, 115 * stat = dw_readl(IC_RAW_INTR_STAT) & dw_readl(IC_INTR_MASK); 116 * 117 * The raw version might be useful for debugging purposes. 118 */ 119 stat = dw_readl(dev, DW_IC_INTR_STAT); 120 121 /* 122 * Do not use the IC_CLR_INTR register to clear interrupts, or 123 * you'll miss some interrupts, triggered during the period from 124 * dw_readl(IC_INTR_STAT) to dw_readl(IC_CLR_INTR). 125 * 126 * Instead, use the separately-prepared IC_CLR_* registers. 127 */ 128 if (stat & DW_IC_INTR_TX_ABRT) 129 dw_readl(dev, DW_IC_CLR_TX_ABRT); 130 if (stat & DW_IC_INTR_RX_UNDER) 131 dw_readl(dev, DW_IC_CLR_RX_UNDER); 132 if (stat & DW_IC_INTR_RX_OVER) 133 dw_readl(dev, DW_IC_CLR_RX_OVER); 134 if (stat & DW_IC_INTR_TX_OVER) 135 dw_readl(dev, DW_IC_CLR_TX_OVER); 136 if (stat & DW_IC_INTR_RX_DONE) 137 dw_readl(dev, DW_IC_CLR_RX_DONE); 138 if (stat & DW_IC_INTR_ACTIVITY) 139 dw_readl(dev, DW_IC_CLR_ACTIVITY); 140 if (stat & DW_IC_INTR_STOP_DET) 141 dw_readl(dev, DW_IC_CLR_STOP_DET); 142 if (stat & DW_IC_INTR_START_DET) 143 dw_readl(dev, DW_IC_CLR_START_DET); 144 if (stat & DW_IC_INTR_GEN_CALL) 145 dw_readl(dev, DW_IC_CLR_GEN_CALL); 146 147 return stat; 148 } 149 150 /* 151 * Interrupt service routine. This gets called whenever an I2C slave interrupt 152 * occurs. 153 */ 154 155 static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev) 156 { 157 u32 raw_stat, stat, enabled; 158 u8 val, slave_activity; 159 160 stat = dw_readl(dev, DW_IC_INTR_STAT); 161 enabled = dw_readl(dev, DW_IC_ENABLE); 162 raw_stat = dw_readl(dev, DW_IC_RAW_INTR_STAT); 163 slave_activity = ((dw_readl(dev, DW_IC_STATUS) & 164 DW_IC_STATUS_SLAVE_ACTIVITY) >> 6); 165 166 if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave) 167 return 0; 168 169 dev_dbg(dev->dev, 170 "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n", 171 enabled, slave_activity, raw_stat, stat); 172 173 if ((stat & DW_IC_INTR_RX_FULL) && (stat & DW_IC_INTR_STOP_DET)) 174 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val); 175 176 if (stat & DW_IC_INTR_RD_REQ) { 177 if (slave_activity) { 178 if (stat & DW_IC_INTR_RX_FULL) { 179 val = dw_readl(dev, DW_IC_DATA_CMD); 180 181 if (!i2c_slave_event(dev->slave, 182 I2C_SLAVE_WRITE_RECEIVED, 183 &val)) { 184 dev_vdbg(dev->dev, "Byte %X acked!", 185 val); 186 } 187 dw_readl(dev, DW_IC_CLR_RD_REQ); 188 stat = i2c_dw_read_clear_intrbits_slave(dev); 189 } else { 190 dw_readl(dev, DW_IC_CLR_RD_REQ); 191 dw_readl(dev, DW_IC_CLR_RX_UNDER); 192 stat = i2c_dw_read_clear_intrbits_slave(dev); 193 } 194 if (!i2c_slave_event(dev->slave, 195 I2C_SLAVE_READ_REQUESTED, 196 &val)) 197 dw_writel(dev, val, DW_IC_DATA_CMD); 198 } 199 } 200 201 if (stat & DW_IC_INTR_RX_DONE) { 202 if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED, 203 &val)) 204 dw_readl(dev, DW_IC_CLR_RX_DONE); 205 206 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val); 207 stat = i2c_dw_read_clear_intrbits_slave(dev); 208 return 1; 209 } 210 211 if (stat & DW_IC_INTR_RX_FULL) { 212 val = dw_readl(dev, DW_IC_DATA_CMD); 213 if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, 214 &val)) 215 dev_vdbg(dev->dev, "Byte %X acked!", val); 216 } else { 217 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val); 218 stat = i2c_dw_read_clear_intrbits_slave(dev); 219 } 220 221 return 1; 222 } 223 224 static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id) 225 { 226 struct dw_i2c_dev *dev = dev_id; 227 int ret; 228 229 i2c_dw_read_clear_intrbits_slave(dev); 230 ret = i2c_dw_irq_handler_slave(dev); 231 if (ret > 0) 232 complete(&dev->cmd_complete); 233 234 return IRQ_RETVAL(ret); 235 } 236 237 static const struct i2c_algorithm i2c_dw_algo = { 238 .functionality = i2c_dw_func, 239 .reg_slave = i2c_dw_reg_slave, 240 .unreg_slave = i2c_dw_unreg_slave, 241 }; 242 243 int i2c_dw_probe_slave(struct dw_i2c_dev *dev) 244 { 245 struct i2c_adapter *adap = &dev->adapter; 246 int ret; 247 248 init_completion(&dev->cmd_complete); 249 250 dev->init = i2c_dw_init_slave; 251 dev->disable = i2c_dw_disable; 252 dev->disable_int = i2c_dw_disable_int; 253 254 ret = i2c_dw_set_reg_access(dev); 255 if (ret) 256 return ret; 257 258 ret = i2c_dw_set_sda_hold(dev); 259 if (ret) 260 return ret; 261 262 ret = dev->init(dev); 263 if (ret) 264 return ret; 265 266 snprintf(adap->name, sizeof(adap->name), 267 "Synopsys DesignWare I2C Slave adapter"); 268 adap->retries = 3; 269 adap->algo = &i2c_dw_algo; 270 adap->dev.parent = dev->dev; 271 i2c_set_adapdata(adap, dev); 272 273 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave, 274 IRQF_SHARED, dev_name(dev->dev), dev); 275 if (ret) { 276 dev_err(dev->dev, "failure requesting irq %i: %d\n", 277 dev->irq, ret); 278 return ret; 279 } 280 281 ret = i2c_add_numbered_adapter(adap); 282 if (ret) 283 dev_err(dev->dev, "failure adding adapter: %d\n", ret); 284 285 return ret; 286 } 287 EXPORT_SYMBOL_GPL(i2c_dw_probe_slave); 288 289 MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>"); 290 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter"); 291 MODULE_LICENSE("GPL v2"); 292