1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver. 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 */ 11 #include <linux/acpi.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/dmi.h> 16 #include <linux/err.h> 17 #include <linux/errno.h> 18 #include <linux/i2c.h> 19 #include <linux/interrupt.h> 20 #include <linux/io.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/syscon.h> 23 #include <linux/module.h> 24 #include <linux/of.h> 25 #include <linux/platform_data/i2c-designware.h> 26 #include <linux/platform_device.h> 27 #include <linux/pm.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/property.h> 30 #include <linux/regmap.h> 31 #include <linux/reset.h> 32 #include <linux/sched.h> 33 #include <linux/slab.h> 34 #include <linux/suspend.h> 35 36 #include "i2c-designware-core.h" 37 38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 39 { 40 return clk_get_rate(dev->clk)/1000; 41 } 42 43 #ifdef CONFIG_ACPI 44 static const struct acpi_device_id dw_i2c_acpi_match[] = { 45 { "INT33C2", 0 }, 46 { "INT33C3", 0 }, 47 { "INT3432", 0 }, 48 { "INT3433", 0 }, 49 { "80860F41", ACCESS_NO_IRQ_SUSPEND }, 50 { "808622C1", ACCESS_NO_IRQ_SUSPEND }, 51 { "AMD0010", ACCESS_INTR_MASK }, 52 { "AMDI0010", ACCESS_INTR_MASK }, 53 { "AMDI0510", 0 }, 54 { "APMC0D0F", 0 }, 55 { "HISI02A1", 0 }, 56 { "HISI02A2", 0 }, 57 { "HISI02A3", 0 }, 58 { } 59 }; 60 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); 61 #endif 62 63 #ifdef CONFIG_OF 64 #define BT1_I2C_CTL 0x100 65 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) 66 #define BT1_I2C_CTL_WR BIT(8) 67 #define BT1_I2C_CTL_GO BIT(31) 68 #define BT1_I2C_DI 0x104 69 #define BT1_I2C_DO 0x108 70 71 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) 72 { 73 struct dw_i2c_dev *dev = context; 74 int ret; 75 76 /* 77 * Note these methods shouldn't ever fail because the system controller 78 * registers are memory mapped. We check the return value just in case. 79 */ 80 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, 81 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); 82 if (ret) 83 return ret; 84 85 return regmap_read(dev->sysmap, BT1_I2C_DO, val); 86 } 87 88 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) 89 { 90 struct dw_i2c_dev *dev = context; 91 int ret; 92 93 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); 94 if (ret) 95 return ret; 96 97 return regmap_write(dev->sysmap, BT1_I2C_CTL, 98 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); 99 } 100 101 static struct regmap_config bt1_i2c_cfg = { 102 .reg_bits = 32, 103 .val_bits = 32, 104 .reg_stride = 4, 105 .fast_io = true, 106 .reg_read = bt1_i2c_read, 107 .reg_write = bt1_i2c_write, 108 .max_register = DW_IC_COMP_TYPE, 109 }; 110 111 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 112 { 113 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent); 114 if (IS_ERR(dev->sysmap)) 115 return PTR_ERR(dev->sysmap); 116 117 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); 118 return PTR_ERR_OR_ZERO(dev->map); 119 } 120 121 #define MSCC_ICPU_CFG_TWI_DELAY 0x0 122 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0) 123 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4 124 125 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev) 126 { 127 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE, 128 dev->ext + MSCC_ICPU_CFG_TWI_DELAY); 129 130 return 0; 131 } 132 133 static int dw_i2c_of_configure(struct platform_device *pdev) 134 { 135 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 136 137 switch (dev->flags & MODEL_MASK) { 138 case MODEL_MSCC_OCELOT: 139 dev->ext = devm_platform_ioremap_resource(pdev, 1); 140 if (!IS_ERR(dev->ext)) 141 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time; 142 break; 143 default: 144 break; 145 } 146 147 return 0; 148 } 149 150 static const struct of_device_id dw_i2c_of_match[] = { 151 { .compatible = "snps,designware-i2c", }, 152 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, 153 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, 154 {}, 155 }; 156 MODULE_DEVICE_TABLE(of, dw_i2c_of_match); 157 #else 158 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 159 { 160 return -ENODEV; 161 } 162 163 static inline int dw_i2c_of_configure(struct platform_device *pdev) 164 { 165 return -ENODEV; 166 } 167 #endif 168 169 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev) 170 { 171 pm_runtime_disable(dev->dev); 172 173 if (dev->shared_with_punit) 174 pm_runtime_put_noidle(dev->dev); 175 } 176 177 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) 178 { 179 struct platform_device *pdev = to_platform_device(dev->dev); 180 int ret; 181 182 switch (dev->flags & MODEL_MASK) { 183 case MODEL_BAIKAL_BT1: 184 ret = bt1_i2c_request_regs(dev); 185 break; 186 default: 187 dev->base = devm_platform_ioremap_resource(pdev, 0); 188 ret = PTR_ERR_OR_ZERO(dev->base); 189 break; 190 } 191 192 return ret; 193 } 194 195 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = { 196 { 197 .ident = "Qtechnology QT5222", 198 .matches = { 199 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"), 200 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"), 201 }, 202 }, 203 { } /* terminate list */ 204 }; 205 206 static int dw_i2c_plat_probe(struct platform_device *pdev) 207 { 208 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); 209 struct i2c_adapter *adap; 210 struct dw_i2c_dev *dev; 211 struct i2c_timings *t; 212 int irq, ret; 213 214 irq = platform_get_irq(pdev, 0); 215 if (irq < 0) 216 return irq; 217 218 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 219 if (!dev) 220 return -ENOMEM; 221 222 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev); 223 dev->dev = &pdev->dev; 224 dev->irq = irq; 225 platform_set_drvdata(pdev, dev); 226 227 ret = dw_i2c_plat_request_regs(dev); 228 if (ret) 229 return ret; 230 231 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); 232 if (IS_ERR(dev->rst)) 233 return PTR_ERR(dev->rst); 234 235 reset_control_deassert(dev->rst); 236 237 t = &dev->timings; 238 if (pdata) 239 t->bus_freq_hz = pdata->i2c_scl_freq; 240 else 241 i2c_parse_fw_timings(&pdev->dev, t, false); 242 243 i2c_dw_adjust_bus_speed(dev); 244 245 if (pdev->dev.of_node) 246 dw_i2c_of_configure(pdev); 247 248 if (has_acpi_companion(&pdev->dev)) 249 i2c_dw_acpi_configure(&pdev->dev); 250 251 ret = i2c_dw_validate_speed(dev); 252 if (ret) 253 goto exit_reset; 254 255 ret = i2c_dw_probe_lock_support(dev); 256 if (ret) 257 goto exit_reset; 258 259 i2c_dw_configure(dev); 260 261 /* Optional interface clock */ 262 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 263 if (IS_ERR(dev->pclk)) { 264 ret = PTR_ERR(dev->pclk); 265 goto exit_reset; 266 } 267 268 dev->clk = devm_clk_get(&pdev->dev, NULL); 269 if (!i2c_dw_prepare_clk(dev, true)) { 270 u64 clk_khz; 271 272 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 273 clk_khz = dev->get_clk_rate_khz(dev); 274 275 if (!dev->sda_hold_time && t->sda_hold_ns) 276 dev->sda_hold_time = 277 div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000); 278 } 279 280 adap = &dev->adapter; 281 adap->owner = THIS_MODULE; 282 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ? 283 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED; 284 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 285 adap->dev.of_node = pdev->dev.of_node; 286 adap->nr = -1; 287 288 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { 289 dev_pm_set_driver_flags(&pdev->dev, 290 DPM_FLAG_SMART_PREPARE | 291 DPM_FLAG_MAY_SKIP_RESUME); 292 } else { 293 dev_pm_set_driver_flags(&pdev->dev, 294 DPM_FLAG_SMART_PREPARE | 295 DPM_FLAG_SMART_SUSPEND | 296 DPM_FLAG_MAY_SKIP_RESUME); 297 } 298 299 /* The code below assumes runtime PM to be disabled. */ 300 WARN_ON(pm_runtime_enabled(&pdev->dev)); 301 302 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 303 pm_runtime_use_autosuspend(&pdev->dev); 304 pm_runtime_set_active(&pdev->dev); 305 306 if (dev->shared_with_punit) 307 pm_runtime_get_noresume(&pdev->dev); 308 309 pm_runtime_enable(&pdev->dev); 310 311 ret = i2c_dw_probe(dev); 312 if (ret) 313 goto exit_probe; 314 315 return ret; 316 317 exit_probe: 318 dw_i2c_plat_pm_cleanup(dev); 319 exit_reset: 320 reset_control_assert(dev->rst); 321 return ret; 322 } 323 324 static int dw_i2c_plat_remove(struct platform_device *pdev) 325 { 326 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 327 328 pm_runtime_get_sync(&pdev->dev); 329 330 i2c_del_adapter(&dev->adapter); 331 332 dev->disable(dev); 333 334 pm_runtime_dont_use_autosuspend(&pdev->dev); 335 pm_runtime_put_sync(&pdev->dev); 336 dw_i2c_plat_pm_cleanup(dev); 337 338 reset_control_assert(dev->rst); 339 340 return 0; 341 } 342 343 #ifdef CONFIG_PM_SLEEP 344 static int dw_i2c_plat_prepare(struct device *dev) 345 { 346 /* 347 * If the ACPI companion device object is present for this device, it 348 * may be accessed during suspend and resume of other devices via I2C 349 * operation regions, so tell the PM core and middle layers to avoid 350 * skipping system suspend/resume callbacks for it in that case. 351 */ 352 return !has_acpi_companion(dev); 353 } 354 355 static void dw_i2c_plat_complete(struct device *dev) 356 { 357 /* 358 * The device can only be in runtime suspend at this point if it has not 359 * been resumed throughout the ending system suspend/resume cycle, so if 360 * the platform firmware might mess up with it, request the runtime PM 361 * framework to resume it. 362 */ 363 if (pm_runtime_suspended(dev) && pm_resume_via_firmware()) 364 pm_request_resume(dev); 365 } 366 #else 367 #define dw_i2c_plat_prepare NULL 368 #define dw_i2c_plat_complete NULL 369 #endif 370 371 #ifdef CONFIG_PM 372 static int dw_i2c_plat_suspend(struct device *dev) 373 { 374 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 375 376 i_dev->suspended = true; 377 378 if (i_dev->shared_with_punit) 379 return 0; 380 381 i_dev->disable(i_dev); 382 i2c_dw_prepare_clk(i_dev, false); 383 384 return 0; 385 } 386 387 static int dw_i2c_plat_resume(struct device *dev) 388 { 389 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 390 391 if (!i_dev->shared_with_punit) 392 i2c_dw_prepare_clk(i_dev, true); 393 394 i_dev->init(i_dev); 395 i_dev->suspended = false; 396 397 return 0; 398 } 399 400 static const struct dev_pm_ops dw_i2c_dev_pm_ops = { 401 .prepare = dw_i2c_plat_prepare, 402 .complete = dw_i2c_plat_complete, 403 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) 404 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL) 405 }; 406 407 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops) 408 #else 409 #define DW_I2C_DEV_PMOPS NULL 410 #endif 411 412 /* Work with hotplug and coldplug */ 413 MODULE_ALIAS("platform:i2c_designware"); 414 415 static struct platform_driver dw_i2c_driver = { 416 .probe = dw_i2c_plat_probe, 417 .remove = dw_i2c_plat_remove, 418 .driver = { 419 .name = "i2c_designware", 420 .of_match_table = of_match_ptr(dw_i2c_of_match), 421 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), 422 .pm = DW_I2C_DEV_PMOPS, 423 }, 424 }; 425 426 static int __init dw_i2c_init_driver(void) 427 { 428 return platform_driver_register(&dw_i2c_driver); 429 } 430 subsys_initcall(dw_i2c_init_driver); 431 432 static void __exit dw_i2c_exit_driver(void) 433 { 434 platform_driver_unregister(&dw_i2c_driver); 435 } 436 module_exit(dw_i2c_exit_driver); 437 438 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 439 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); 440 MODULE_LICENSE("GPL"); 441