1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver. 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 */ 11 #include <linux/acpi.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/err.h> 16 #include <linux/errno.h> 17 #include <linux/i2c.h> 18 #include <linux/interrupt.h> 19 #include <linux/io.h> 20 #include <linux/kernel.h> 21 #include <linux/mfd/syscon.h> 22 #include <linux/module.h> 23 #include <linux/of.h> 24 #include <linux/platform_data/i2c-designware.h> 25 #include <linux/platform_device.h> 26 #include <linux/pm.h> 27 #include <linux/pm_runtime.h> 28 #include <linux/property.h> 29 #include <linux/regmap.h> 30 #include <linux/reset.h> 31 #include <linux/sched.h> 32 #include <linux/slab.h> 33 #include <linux/suspend.h> 34 35 #include "i2c-designware-core.h" 36 37 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 38 { 39 return clk_get_rate(dev->clk)/1000; 40 } 41 42 #ifdef CONFIG_ACPI 43 static const struct acpi_device_id dw_i2c_acpi_match[] = { 44 { "INT33C2", 0 }, 45 { "INT33C3", 0 }, 46 { "INT3432", 0 }, 47 { "INT3433", 0 }, 48 { "80860F41", ACCESS_NO_IRQ_SUSPEND }, 49 { "808622C1", ACCESS_NO_IRQ_SUSPEND }, 50 { "AMD0010", ACCESS_INTR_MASK }, 51 { "AMDI0010", ACCESS_INTR_MASK }, 52 { "AMDI0510", 0 }, 53 { "APMC0D0F", 0 }, 54 { "HISI02A1", 0 }, 55 { "HISI02A2", 0 }, 56 { "HISI02A3", 0 }, 57 { } 58 }; 59 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); 60 #endif 61 62 #ifdef CONFIG_OF 63 #define BT1_I2C_CTL 0x100 64 #define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) 65 #define BT1_I2C_CTL_WR BIT(8) 66 #define BT1_I2C_CTL_GO BIT(31) 67 #define BT1_I2C_DI 0x104 68 #define BT1_I2C_DO 0x108 69 70 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) 71 { 72 struct dw_i2c_dev *dev = context; 73 int ret; 74 75 /* 76 * Note these methods shouldn't ever fail because the system controller 77 * registers are memory mapped. We check the return value just in case. 78 */ 79 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, 80 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); 81 if (ret) 82 return ret; 83 84 return regmap_read(dev->sysmap, BT1_I2C_DO, val); 85 } 86 87 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) 88 { 89 struct dw_i2c_dev *dev = context; 90 int ret; 91 92 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); 93 if (ret) 94 return ret; 95 96 return regmap_write(dev->sysmap, BT1_I2C_CTL, 97 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); 98 } 99 100 static struct regmap_config bt1_i2c_cfg = { 101 .reg_bits = 32, 102 .val_bits = 32, 103 .reg_stride = 4, 104 .fast_io = true, 105 .reg_read = bt1_i2c_read, 106 .reg_write = bt1_i2c_write, 107 .max_register = DW_IC_COMP_TYPE, 108 }; 109 110 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 111 { 112 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent); 113 if (IS_ERR(dev->sysmap)) 114 return PTR_ERR(dev->sysmap); 115 116 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); 117 return PTR_ERR_OR_ZERO(dev->map); 118 } 119 120 #define MSCC_ICPU_CFG_TWI_DELAY 0x0 121 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0) 122 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4 123 124 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev) 125 { 126 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE, 127 dev->ext + MSCC_ICPU_CFG_TWI_DELAY); 128 129 return 0; 130 } 131 132 static int dw_i2c_of_configure(struct platform_device *pdev) 133 { 134 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 135 136 switch (dev->flags & MODEL_MASK) { 137 case MODEL_MSCC_OCELOT: 138 dev->ext = devm_platform_ioremap_resource(pdev, 1); 139 if (!IS_ERR(dev->ext)) 140 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time; 141 break; 142 default: 143 break; 144 } 145 146 return 0; 147 } 148 149 static const struct of_device_id dw_i2c_of_match[] = { 150 { .compatible = "snps,designware-i2c", }, 151 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, 152 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, 153 {}, 154 }; 155 MODULE_DEVICE_TABLE(of, dw_i2c_of_match); 156 #else 157 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) 158 { 159 return -ENODEV; 160 } 161 162 static inline int dw_i2c_of_configure(struct platform_device *pdev) 163 { 164 return -ENODEV; 165 } 166 #endif 167 168 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev) 169 { 170 pm_runtime_disable(dev->dev); 171 172 if (dev->shared_with_punit) 173 pm_runtime_put_noidle(dev->dev); 174 } 175 176 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) 177 { 178 struct platform_device *pdev = to_platform_device(dev->dev); 179 int ret; 180 181 switch (dev->flags & MODEL_MASK) { 182 case MODEL_BAIKAL_BT1: 183 ret = bt1_i2c_request_regs(dev); 184 break; 185 default: 186 dev->base = devm_platform_ioremap_resource(pdev, 0); 187 ret = PTR_ERR_OR_ZERO(dev->base); 188 break; 189 } 190 191 return ret; 192 } 193 194 static int dw_i2c_plat_probe(struct platform_device *pdev) 195 { 196 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); 197 struct i2c_adapter *adap; 198 struct dw_i2c_dev *dev; 199 struct i2c_timings *t; 200 int irq, ret; 201 202 irq = platform_get_irq(pdev, 0); 203 if (irq < 0) 204 return irq; 205 206 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 207 if (!dev) 208 return -ENOMEM; 209 210 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev); 211 dev->dev = &pdev->dev; 212 dev->irq = irq; 213 platform_set_drvdata(pdev, dev); 214 215 ret = dw_i2c_plat_request_regs(dev); 216 if (ret) 217 return ret; 218 219 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); 220 if (IS_ERR(dev->rst)) 221 return PTR_ERR(dev->rst); 222 223 reset_control_deassert(dev->rst); 224 225 t = &dev->timings; 226 if (pdata) 227 t->bus_freq_hz = pdata->i2c_scl_freq; 228 else 229 i2c_parse_fw_timings(&pdev->dev, t, false); 230 231 i2c_dw_acpi_adjust_bus_speed(&pdev->dev); 232 233 if (pdev->dev.of_node) 234 dw_i2c_of_configure(pdev); 235 236 if (has_acpi_companion(&pdev->dev)) 237 i2c_dw_acpi_configure(&pdev->dev); 238 239 ret = i2c_dw_validate_speed(dev); 240 if (ret) 241 goto exit_reset; 242 243 ret = i2c_dw_probe_lock_support(dev); 244 if (ret) 245 goto exit_reset; 246 247 i2c_dw_configure(dev); 248 249 /* Optional interface clock */ 250 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk"); 251 if (IS_ERR(dev->pclk)) { 252 ret = PTR_ERR(dev->pclk); 253 goto exit_reset; 254 } 255 256 dev->clk = devm_clk_get(&pdev->dev, NULL); 257 if (!i2c_dw_prepare_clk(dev, true)) { 258 u64 clk_khz; 259 260 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 261 clk_khz = dev->get_clk_rate_khz(dev); 262 263 if (!dev->sda_hold_time && t->sda_hold_ns) 264 dev->sda_hold_time = 265 div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000); 266 } 267 268 adap = &dev->adapter; 269 adap->owner = THIS_MODULE; 270 adap->class = I2C_CLASS_DEPRECATED; 271 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 272 adap->dev.of_node = pdev->dev.of_node; 273 adap->nr = -1; 274 275 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { 276 dev_pm_set_driver_flags(&pdev->dev, 277 DPM_FLAG_SMART_PREPARE | 278 DPM_FLAG_MAY_SKIP_RESUME); 279 } else { 280 dev_pm_set_driver_flags(&pdev->dev, 281 DPM_FLAG_SMART_PREPARE | 282 DPM_FLAG_SMART_SUSPEND | 283 DPM_FLAG_MAY_SKIP_RESUME); 284 } 285 286 /* The code below assumes runtime PM to be disabled. */ 287 WARN_ON(pm_runtime_enabled(&pdev->dev)); 288 289 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 290 pm_runtime_use_autosuspend(&pdev->dev); 291 pm_runtime_set_active(&pdev->dev); 292 293 if (dev->shared_with_punit) 294 pm_runtime_get_noresume(&pdev->dev); 295 296 pm_runtime_enable(&pdev->dev); 297 298 ret = i2c_dw_probe(dev); 299 if (ret) 300 goto exit_probe; 301 302 return ret; 303 304 exit_probe: 305 dw_i2c_plat_pm_cleanup(dev); 306 exit_reset: 307 reset_control_assert(dev->rst); 308 return ret; 309 } 310 311 static int dw_i2c_plat_remove(struct platform_device *pdev) 312 { 313 struct dw_i2c_dev *dev = platform_get_drvdata(pdev); 314 315 pm_runtime_get_sync(&pdev->dev); 316 317 i2c_del_adapter(&dev->adapter); 318 319 dev->disable(dev); 320 321 pm_runtime_dont_use_autosuspend(&pdev->dev); 322 pm_runtime_put_sync(&pdev->dev); 323 dw_i2c_plat_pm_cleanup(dev); 324 325 reset_control_assert(dev->rst); 326 327 return 0; 328 } 329 330 #ifdef CONFIG_PM_SLEEP 331 static int dw_i2c_plat_prepare(struct device *dev) 332 { 333 /* 334 * If the ACPI companion device object is present for this device, it 335 * may be accessed during suspend and resume of other devices via I2C 336 * operation regions, so tell the PM core and middle layers to avoid 337 * skipping system suspend/resume callbacks for it in that case. 338 */ 339 return !has_acpi_companion(dev); 340 } 341 342 static void dw_i2c_plat_complete(struct device *dev) 343 { 344 /* 345 * The device can only be in runtime suspend at this point if it has not 346 * been resumed throughout the ending system suspend/resume cycle, so if 347 * the platform firmware might mess up with it, request the runtime PM 348 * framework to resume it. 349 */ 350 if (pm_runtime_suspended(dev) && pm_resume_via_firmware()) 351 pm_request_resume(dev); 352 } 353 #else 354 #define dw_i2c_plat_prepare NULL 355 #define dw_i2c_plat_complete NULL 356 #endif 357 358 #ifdef CONFIG_PM 359 static int dw_i2c_plat_suspend(struct device *dev) 360 { 361 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 362 363 i_dev->suspended = true; 364 365 if (i_dev->shared_with_punit) 366 return 0; 367 368 i_dev->disable(i_dev); 369 i2c_dw_prepare_clk(i_dev, false); 370 371 return 0; 372 } 373 374 static int dw_i2c_plat_resume(struct device *dev) 375 { 376 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 377 378 if (!i_dev->shared_with_punit) 379 i2c_dw_prepare_clk(i_dev, true); 380 381 i_dev->init(i_dev); 382 i_dev->suspended = false; 383 384 return 0; 385 } 386 387 static const struct dev_pm_ops dw_i2c_dev_pm_ops = { 388 .prepare = dw_i2c_plat_prepare, 389 .complete = dw_i2c_plat_complete, 390 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) 391 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL) 392 }; 393 394 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops) 395 #else 396 #define DW_I2C_DEV_PMOPS NULL 397 #endif 398 399 /* Work with hotplug and coldplug */ 400 MODULE_ALIAS("platform:i2c_designware"); 401 402 static struct platform_driver dw_i2c_driver = { 403 .probe = dw_i2c_plat_probe, 404 .remove = dw_i2c_plat_remove, 405 .driver = { 406 .name = "i2c_designware", 407 .of_match_table = of_match_ptr(dw_i2c_of_match), 408 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), 409 .pm = DW_I2C_DEV_PMOPS, 410 }, 411 }; 412 413 static int __init dw_i2c_init_driver(void) 414 { 415 return platform_driver_register(&dw_i2c_driver); 416 } 417 subsys_initcall(dw_i2c_init_driver); 418 419 static void __exit dw_i2c_exit_driver(void) 420 { 421 platform_driver_unregister(&dw_i2c_driver); 422 } 423 module_exit(dw_i2c_exit_driver); 424 425 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 426 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); 427 MODULE_LICENSE("GPL"); 428