1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver (master only). 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 * Copyright (C) 2011, 2015, 2016 Intel Corporation. 11 */ 12 #include <linux/acpi.h> 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/errno.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/io.h> 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/pci.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/sched.h> 24 #include <linux/slab.h> 25 26 #include "i2c-designware-core.h" 27 28 #define DRIVER_NAME "i2c-designware-pci" 29 30 enum dw_pci_ctl_id_t { 31 medfield, 32 merrifield, 33 baytrail, 34 cherrytrail, 35 haswell, 36 elkhartlake, 37 }; 38 39 struct dw_scl_sda_cfg { 40 u32 ss_hcnt; 41 u32 fs_hcnt; 42 u32 ss_lcnt; 43 u32 fs_lcnt; 44 u32 sda_hold; 45 }; 46 47 struct dw_pci_controller { 48 u32 bus_num; 49 u32 flags; 50 struct dw_scl_sda_cfg *scl_sda_cfg; 51 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); 52 u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev); 53 }; 54 55 /* Merrifield HCNT/LCNT/SDA hold time */ 56 static struct dw_scl_sda_cfg mrfld_config = { 57 .ss_hcnt = 0x2f8, 58 .fs_hcnt = 0x87, 59 .ss_lcnt = 0x37b, 60 .fs_lcnt = 0x10a, 61 }; 62 63 /* BayTrail HCNT/LCNT/SDA hold time */ 64 static struct dw_scl_sda_cfg byt_config = { 65 .ss_hcnt = 0x200, 66 .fs_hcnt = 0x55, 67 .ss_lcnt = 0x200, 68 .fs_lcnt = 0x99, 69 .sda_hold = 0x6, 70 }; 71 72 /* Haswell HCNT/LCNT/SDA hold time */ 73 static struct dw_scl_sda_cfg hsw_config = { 74 .ss_hcnt = 0x01b0, 75 .fs_hcnt = 0x48, 76 .ss_lcnt = 0x01fb, 77 .fs_lcnt = 0xa0, 78 .sda_hold = 0x9, 79 }; 80 81 static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev) 82 { 83 return 25000; 84 } 85 86 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 87 { 88 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); 89 90 switch (pdev->device) { 91 case 0x0817: 92 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; 93 fallthrough; 94 case 0x0818: 95 case 0x0819: 96 c->bus_num = pdev->device - 0x817 + 3; 97 return 0; 98 case 0x082C: 99 case 0x082D: 100 case 0x082E: 101 c->bus_num = pdev->device - 0x82C + 0; 102 return 0; 103 } 104 return -ENODEV; 105 } 106 107 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 108 { 109 /* 110 * On Intel Merrifield the user visible i2c buses are enumerated 111 * [1..7]. So, we add 1 to shift the default range. Besides that the 112 * first PCI slot provides 4 functions, that's why we have to add 0 to 113 * the first slot and 4 to the next one. 114 */ 115 switch (PCI_SLOT(pdev->devfn)) { 116 case 8: 117 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1; 118 return 0; 119 case 9: 120 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1; 121 return 0; 122 } 123 return -ENODEV; 124 } 125 126 static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev) 127 { 128 return 100000; 129 } 130 131 static struct dw_pci_controller dw_pci_controllers[] = { 132 [medfield] = { 133 .bus_num = -1, 134 .setup = mfld_setup, 135 .get_clk_rate_khz = mfld_get_clk_rate_khz, 136 }, 137 [merrifield] = { 138 .bus_num = -1, 139 .scl_sda_cfg = &mrfld_config, 140 .setup = mrfld_setup, 141 }, 142 [baytrail] = { 143 .bus_num = -1, 144 .scl_sda_cfg = &byt_config, 145 }, 146 [haswell] = { 147 .bus_num = -1, 148 .scl_sda_cfg = &hsw_config, 149 }, 150 [cherrytrail] = { 151 .bus_num = -1, 152 .scl_sda_cfg = &byt_config, 153 }, 154 [elkhartlake] = { 155 .bus_num = -1, 156 .get_clk_rate_khz = ehl_get_clk_rate_khz, 157 }, 158 }; 159 160 #ifdef CONFIG_PM 161 static int i2c_dw_pci_suspend(struct device *dev) 162 { 163 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 164 165 i_dev->suspended = true; 166 i_dev->disable(i_dev); 167 168 return 0; 169 } 170 171 static int i2c_dw_pci_resume(struct device *dev) 172 { 173 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 174 int ret; 175 176 ret = i_dev->init(i_dev); 177 i_dev->suspended = false; 178 179 return ret; 180 } 181 #endif 182 183 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend, 184 i2c_dw_pci_resume, NULL); 185 186 static int i2c_dw_pci_probe(struct pci_dev *pdev, 187 const struct pci_device_id *id) 188 { 189 struct dw_i2c_dev *dev; 190 struct i2c_adapter *adap; 191 int r; 192 struct dw_pci_controller *controller; 193 struct dw_scl_sda_cfg *cfg; 194 195 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { 196 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__, 197 id->driver_data); 198 return -EINVAL; 199 } 200 201 controller = &dw_pci_controllers[id->driver_data]; 202 203 r = pcim_enable_device(pdev); 204 if (r) { 205 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n", 206 r); 207 return r; 208 } 209 210 pci_set_master(pdev); 211 212 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); 213 if (r) { 214 dev_err(&pdev->dev, "I/O memory remapping failed\n"); 215 return r; 216 } 217 218 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 219 if (!dev) 220 return -ENOMEM; 221 222 r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 223 if (r < 0) 224 return r; 225 226 dev->get_clk_rate_khz = controller->get_clk_rate_khz; 227 dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; 228 dev->base = pcim_iomap_table(pdev)[0]; 229 dev->dev = &pdev->dev; 230 dev->irq = pci_irq_vector(pdev, 0); 231 dev->flags |= controller->flags; 232 233 pci_set_drvdata(pdev, dev); 234 235 if (controller->setup) { 236 r = controller->setup(pdev, controller); 237 if (r) { 238 pci_free_irq_vectors(pdev); 239 return r; 240 } 241 } 242 243 i2c_dw_adjust_bus_speed(dev); 244 245 if (has_acpi_companion(&pdev->dev)) 246 i2c_dw_acpi_configure(&pdev->dev); 247 248 r = i2c_dw_validate_speed(dev); 249 if (r) { 250 pci_free_irq_vectors(pdev); 251 return r; 252 } 253 254 i2c_dw_configure(dev); 255 256 if (controller->scl_sda_cfg) { 257 cfg = controller->scl_sda_cfg; 258 dev->ss_hcnt = cfg->ss_hcnt; 259 dev->fs_hcnt = cfg->fs_hcnt; 260 dev->ss_lcnt = cfg->ss_lcnt; 261 dev->fs_lcnt = cfg->fs_lcnt; 262 dev->sda_hold_time = cfg->sda_hold; 263 } 264 265 adap = &dev->adapter; 266 adap->owner = THIS_MODULE; 267 adap->class = 0; 268 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 269 adap->nr = controller->bus_num; 270 271 r = i2c_dw_probe(dev); 272 if (r) { 273 pci_free_irq_vectors(pdev); 274 return r; 275 } 276 277 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 278 pm_runtime_use_autosuspend(&pdev->dev); 279 pm_runtime_put_autosuspend(&pdev->dev); 280 pm_runtime_allow(&pdev->dev); 281 282 return 0; 283 } 284 285 static void i2c_dw_pci_remove(struct pci_dev *pdev) 286 { 287 struct dw_i2c_dev *dev = pci_get_drvdata(pdev); 288 289 dev->disable(dev); 290 pm_runtime_forbid(&pdev->dev); 291 pm_runtime_get_noresume(&pdev->dev); 292 293 i2c_del_adapter(&dev->adapter); 294 devm_free_irq(&pdev->dev, dev->irq, dev); 295 pci_free_irq_vectors(pdev); 296 } 297 298 /* work with hotplug and coldplug */ 299 MODULE_ALIAS("i2c_designware-pci"); 300 301 static const struct pci_device_id i2_designware_pci_ids[] = { 302 /* Medfield */ 303 { PCI_VDEVICE(INTEL, 0x0817), medfield }, 304 { PCI_VDEVICE(INTEL, 0x0818), medfield }, 305 { PCI_VDEVICE(INTEL, 0x0819), medfield }, 306 { PCI_VDEVICE(INTEL, 0x082C), medfield }, 307 { PCI_VDEVICE(INTEL, 0x082D), medfield }, 308 { PCI_VDEVICE(INTEL, 0x082E), medfield }, 309 /* Merrifield */ 310 { PCI_VDEVICE(INTEL, 0x1195), merrifield }, 311 { PCI_VDEVICE(INTEL, 0x1196), merrifield }, 312 /* Baytrail */ 313 { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, 314 { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, 315 { PCI_VDEVICE(INTEL, 0x0F43), baytrail }, 316 { PCI_VDEVICE(INTEL, 0x0F44), baytrail }, 317 { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, 318 { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, 319 { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, 320 /* Haswell */ 321 { PCI_VDEVICE(INTEL, 0x9c61), haswell }, 322 { PCI_VDEVICE(INTEL, 0x9c62), haswell }, 323 /* Braswell / Cherrytrail */ 324 { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail }, 325 { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail }, 326 { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail }, 327 { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail }, 328 { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail }, 329 { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail }, 330 { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail }, 331 /* Elkhart Lake (PSE I2C) */ 332 { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake }, 333 { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake }, 334 { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake }, 335 { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake }, 336 { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake }, 337 { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake }, 338 { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake }, 339 { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake }, 340 { 0,} 341 }; 342 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 343 344 static struct pci_driver dw_i2c_driver = { 345 .name = DRIVER_NAME, 346 .id_table = i2_designware_pci_ids, 347 .probe = i2c_dw_pci_probe, 348 .remove = i2c_dw_pci_remove, 349 .driver = { 350 .pm = &i2c_dw_pm_ops, 351 }, 352 }; 353 354 module_pci_driver(dw_i2c_driver); 355 356 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 357 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); 358 MODULE_LICENSE("GPL"); 359