1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Synopsys DesignWare I2C adapter driver (master only). 4 * 5 * Based on the TI DAVINCI I2C adapter driver. 6 * 7 * Copyright (C) 2006 Texas Instruments. 8 * Copyright (C) 2007 MontaVista Software Inc. 9 * Copyright (C) 2009 Provigent Ltd. 10 * Copyright (C) 2011, 2015, 2016 Intel Corporation. 11 */ 12 #include <linux/acpi.h> 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/errno.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/io.h> 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/pci.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/sched.h> 24 #include <linux/slab.h> 25 26 #include "i2c-designware-core.h" 27 28 #define DRIVER_NAME "i2c-designware-pci" 29 30 enum dw_pci_ctl_id_t { 31 medfield, 32 merrifield, 33 baytrail, 34 cherrytrail, 35 haswell, 36 elkhartlake, 37 }; 38 39 struct dw_scl_sda_cfg { 40 u32 ss_hcnt; 41 u32 fs_hcnt; 42 u32 ss_lcnt; 43 u32 fs_lcnt; 44 u32 sda_hold; 45 }; 46 47 struct dw_pci_controller { 48 u32 bus_num; 49 u32 bus_cfg; 50 u32 tx_fifo_depth; 51 u32 rx_fifo_depth; 52 u32 clk_khz; 53 u32 functionality; 54 u32 flags; 55 struct dw_scl_sda_cfg *scl_sda_cfg; 56 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); 57 }; 58 59 #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ 60 DW_IC_CON_SLAVE_DISABLE | \ 61 DW_IC_CON_RESTART_EN) 62 63 /* Merrifield HCNT/LCNT/SDA hold time */ 64 static struct dw_scl_sda_cfg mrfld_config = { 65 .ss_hcnt = 0x2f8, 66 .fs_hcnt = 0x87, 67 .ss_lcnt = 0x37b, 68 .fs_lcnt = 0x10a, 69 }; 70 71 /* BayTrail HCNT/LCNT/SDA hold time */ 72 static struct dw_scl_sda_cfg byt_config = { 73 .ss_hcnt = 0x200, 74 .fs_hcnt = 0x55, 75 .ss_lcnt = 0x200, 76 .fs_lcnt = 0x99, 77 .sda_hold = 0x6, 78 }; 79 80 /* Haswell HCNT/LCNT/SDA hold time */ 81 static struct dw_scl_sda_cfg hsw_config = { 82 .ss_hcnt = 0x01b0, 83 .fs_hcnt = 0x48, 84 .ss_lcnt = 0x01fb, 85 .fs_lcnt = 0xa0, 86 .sda_hold = 0x9, 87 }; 88 89 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 90 { 91 switch (pdev->device) { 92 case 0x0817: 93 c->bus_cfg &= ~DW_IC_CON_SPEED_MASK; 94 c->bus_cfg |= DW_IC_CON_SPEED_STD; 95 /* fall through */ 96 case 0x0818: 97 case 0x0819: 98 c->bus_num = pdev->device - 0x817 + 3; 99 return 0; 100 case 0x082C: 101 case 0x082D: 102 case 0x082E: 103 c->bus_num = pdev->device - 0x82C + 0; 104 return 0; 105 } 106 return -ENODEV; 107 } 108 109 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 110 { 111 /* 112 * On Intel Merrifield the user visible i2c buses are enumerated 113 * [1..7]. So, we add 1 to shift the default range. Besides that the 114 * first PCI slot provides 4 functions, that's why we have to add 0 to 115 * the first slot and 4 to the next one. 116 */ 117 switch (PCI_SLOT(pdev->devfn)) { 118 case 8: 119 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1; 120 return 0; 121 case 9: 122 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1; 123 return 0; 124 } 125 return -ENODEV; 126 } 127 128 static struct dw_pci_controller dw_pci_controllers[] = { 129 [medfield] = { 130 .bus_num = -1, 131 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 132 .tx_fifo_depth = 32, 133 .rx_fifo_depth = 32, 134 .functionality = I2C_FUNC_10BIT_ADDR, 135 .clk_khz = 25000, 136 .setup = mfld_setup, 137 }, 138 [merrifield] = { 139 .bus_num = -1, 140 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 141 .tx_fifo_depth = 64, 142 .rx_fifo_depth = 64, 143 .functionality = I2C_FUNC_10BIT_ADDR, 144 .scl_sda_cfg = &mrfld_config, 145 .setup = mrfld_setup, 146 }, 147 [baytrail] = { 148 .bus_num = -1, 149 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 150 .tx_fifo_depth = 32, 151 .rx_fifo_depth = 32, 152 .functionality = I2C_FUNC_10BIT_ADDR, 153 .scl_sda_cfg = &byt_config, 154 }, 155 [haswell] = { 156 .bus_num = -1, 157 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 158 .tx_fifo_depth = 32, 159 .rx_fifo_depth = 32, 160 .functionality = I2C_FUNC_10BIT_ADDR, 161 .scl_sda_cfg = &hsw_config, 162 }, 163 [cherrytrail] = { 164 .bus_num = -1, 165 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 166 .tx_fifo_depth = 32, 167 .rx_fifo_depth = 32, 168 .functionality = I2C_FUNC_10BIT_ADDR, 169 .flags = MODEL_CHERRYTRAIL, 170 .scl_sda_cfg = &byt_config, 171 }, 172 [elkhartlake] = { 173 .bus_num = -1, 174 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 175 .tx_fifo_depth = 32, 176 .rx_fifo_depth = 32, 177 .functionality = I2C_FUNC_10BIT_ADDR, 178 .clk_khz = 100000, 179 }, 180 }; 181 182 #ifdef CONFIG_PM 183 static int i2c_dw_pci_suspend(struct device *dev) 184 { 185 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 186 187 i_dev->suspended = true; 188 i_dev->disable(i_dev); 189 190 return 0; 191 } 192 193 static int i2c_dw_pci_resume(struct device *dev) 194 { 195 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev); 196 int ret; 197 198 ret = i_dev->init(i_dev); 199 i_dev->suspended = false; 200 201 return ret; 202 } 203 #endif 204 205 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend, 206 i2c_dw_pci_resume, NULL); 207 208 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 209 { 210 return dev->controller->clk_khz; 211 } 212 213 static int i2c_dw_pci_probe(struct pci_dev *pdev, 214 const struct pci_device_id *id) 215 { 216 struct dw_i2c_dev *dev; 217 struct i2c_adapter *adap; 218 int r; 219 struct dw_pci_controller *controller; 220 struct dw_scl_sda_cfg *cfg; 221 222 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { 223 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__, 224 id->driver_data); 225 return -EINVAL; 226 } 227 228 controller = &dw_pci_controllers[id->driver_data]; 229 230 r = pcim_enable_device(pdev); 231 if (r) { 232 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n", 233 r); 234 return r; 235 } 236 237 pci_set_master(pdev); 238 239 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); 240 if (r) { 241 dev_err(&pdev->dev, "I/O memory remapping failed\n"); 242 return r; 243 } 244 245 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 246 if (!dev) 247 return -ENOMEM; 248 249 r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 250 if (r < 0) 251 return r; 252 253 dev->clk = NULL; 254 dev->controller = controller; 255 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 256 dev->base = pcim_iomap_table(pdev)[0]; 257 dev->dev = &pdev->dev; 258 dev->irq = pci_irq_vector(pdev, 0); 259 dev->flags |= controller->flags; 260 261 if (controller->setup) { 262 r = controller->setup(pdev, controller); 263 if (r) { 264 pci_free_irq_vectors(pdev); 265 return r; 266 } 267 } 268 269 dev->functionality = controller->functionality | 270 DW_IC_DEFAULT_FUNCTIONALITY; 271 272 dev->master_cfg = controller->bus_cfg; 273 if (controller->scl_sda_cfg) { 274 cfg = controller->scl_sda_cfg; 275 dev->ss_hcnt = cfg->ss_hcnt; 276 dev->fs_hcnt = cfg->fs_hcnt; 277 dev->ss_lcnt = cfg->ss_lcnt; 278 dev->fs_lcnt = cfg->fs_lcnt; 279 dev->sda_hold_time = cfg->sda_hold; 280 } 281 282 pci_set_drvdata(pdev, dev); 283 284 dev->tx_fifo_depth = controller->tx_fifo_depth; 285 dev->rx_fifo_depth = controller->rx_fifo_depth; 286 287 adap = &dev->adapter; 288 adap->owner = THIS_MODULE; 289 adap->class = 0; 290 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 291 adap->nr = controller->bus_num; 292 293 r = i2c_dw_probe(dev); 294 if (r) { 295 pci_free_irq_vectors(pdev); 296 return r; 297 } 298 299 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 300 pm_runtime_use_autosuspend(&pdev->dev); 301 pm_runtime_put_autosuspend(&pdev->dev); 302 pm_runtime_allow(&pdev->dev); 303 304 return 0; 305 } 306 307 static void i2c_dw_pci_remove(struct pci_dev *pdev) 308 { 309 struct dw_i2c_dev *dev = pci_get_drvdata(pdev); 310 311 dev->disable(dev); 312 pm_runtime_forbid(&pdev->dev); 313 pm_runtime_get_noresume(&pdev->dev); 314 315 i2c_del_adapter(&dev->adapter); 316 devm_free_irq(&pdev->dev, dev->irq, dev); 317 pci_free_irq_vectors(pdev); 318 } 319 320 /* work with hotplug and coldplug */ 321 MODULE_ALIAS("i2c_designware-pci"); 322 323 static const struct pci_device_id i2_designware_pci_ids[] = { 324 /* Medfield */ 325 { PCI_VDEVICE(INTEL, 0x0817), medfield }, 326 { PCI_VDEVICE(INTEL, 0x0818), medfield }, 327 { PCI_VDEVICE(INTEL, 0x0819), medfield }, 328 { PCI_VDEVICE(INTEL, 0x082C), medfield }, 329 { PCI_VDEVICE(INTEL, 0x082D), medfield }, 330 { PCI_VDEVICE(INTEL, 0x082E), medfield }, 331 /* Merrifield */ 332 { PCI_VDEVICE(INTEL, 0x1195), merrifield }, 333 { PCI_VDEVICE(INTEL, 0x1196), merrifield }, 334 /* Baytrail */ 335 { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, 336 { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, 337 { PCI_VDEVICE(INTEL, 0x0F43), baytrail }, 338 { PCI_VDEVICE(INTEL, 0x0F44), baytrail }, 339 { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, 340 { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, 341 { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, 342 /* Haswell */ 343 { PCI_VDEVICE(INTEL, 0x9c61), haswell }, 344 { PCI_VDEVICE(INTEL, 0x9c62), haswell }, 345 /* Braswell / Cherrytrail */ 346 { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail }, 347 { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail }, 348 { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail }, 349 { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail }, 350 { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail }, 351 { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail }, 352 { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail }, 353 /* Elkhart Lake (PSE I2C) */ 354 { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake }, 355 { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake }, 356 { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake }, 357 { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake }, 358 { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake }, 359 { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake }, 360 { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake }, 361 { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake }, 362 { 0,} 363 }; 364 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 365 366 static struct pci_driver dw_i2c_driver = { 367 .name = DRIVER_NAME, 368 .id_table = i2_designware_pci_ids, 369 .probe = i2c_dw_pci_probe, 370 .remove = i2c_dw_pci_remove, 371 .driver = { 372 .pm = &i2c_dw_pm_ops, 373 }, 374 }; 375 376 module_pci_driver(dw_i2c_driver); 377 378 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 379 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); 380 MODULE_LICENSE("GPL"); 381