1 /* 2 * Synopsys DesignWare I2C adapter driver (master only). 3 * 4 * Based on the TI DAVINCI I2C adapter driver. 5 * 6 * Copyright (C) 2006 Texas Instruments. 7 * Copyright (C) 2007 MontaVista Software Inc. 8 * Copyright (C) 2009 Provigent Ltd. 9 * Copyright (C) 2011, 2015, 2016 Intel Corporation. 10 * 11 * ---------------------------------------------------------------------------- 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * ---------------------------------------------------------------------------- 23 * 24 */ 25 26 #include <linux/acpi.h> 27 #include <linux/delay.h> 28 #include <linux/err.h> 29 #include <linux/errno.h> 30 #include <linux/i2c.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/kernel.h> 34 #include <linux/module.h> 35 #include <linux/pci.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/sched.h> 38 #include <linux/slab.h> 39 40 #include "i2c-designware-core.h" 41 42 #define DRIVER_NAME "i2c-designware-pci" 43 44 enum dw_pci_ctl_id_t { 45 medfield, 46 merrifield, 47 baytrail, 48 haswell, 49 }; 50 51 struct dw_scl_sda_cfg { 52 u32 ss_hcnt; 53 u32 fs_hcnt; 54 u32 ss_lcnt; 55 u32 fs_lcnt; 56 u32 sda_hold; 57 }; 58 59 struct dw_pci_controller { 60 u32 bus_num; 61 u32 bus_cfg; 62 u32 tx_fifo_depth; 63 u32 rx_fifo_depth; 64 u32 clk_khz; 65 u32 functionality; 66 struct dw_scl_sda_cfg *scl_sda_cfg; 67 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); 68 }; 69 70 #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ 71 DW_IC_CON_SLAVE_DISABLE | \ 72 DW_IC_CON_RESTART_EN) 73 74 /* Merrifield HCNT/LCNT/SDA hold time */ 75 static struct dw_scl_sda_cfg mrfld_config = { 76 .ss_hcnt = 0x2f8, 77 .fs_hcnt = 0x87, 78 .ss_lcnt = 0x37b, 79 .fs_lcnt = 0x10a, 80 }; 81 82 /* BayTrail HCNT/LCNT/SDA hold time */ 83 static struct dw_scl_sda_cfg byt_config = { 84 .ss_hcnt = 0x200, 85 .fs_hcnt = 0x55, 86 .ss_lcnt = 0x200, 87 .fs_lcnt = 0x99, 88 .sda_hold = 0x6, 89 }; 90 91 /* Haswell HCNT/LCNT/SDA hold time */ 92 static struct dw_scl_sda_cfg hsw_config = { 93 .ss_hcnt = 0x01b0, 94 .fs_hcnt = 0x48, 95 .ss_lcnt = 0x01fb, 96 .fs_lcnt = 0xa0, 97 .sda_hold = 0x9, 98 }; 99 100 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 101 { 102 switch (pdev->device) { 103 case 0x0817: 104 c->bus_cfg &= ~DW_IC_CON_SPEED_MASK; 105 c->bus_cfg |= DW_IC_CON_SPEED_STD; 106 case 0x0818: 107 case 0x0819: 108 c->bus_num = pdev->device - 0x817 + 3; 109 return 0; 110 case 0x082C: 111 case 0x082D: 112 case 0x082E: 113 c->bus_num = pdev->device - 0x82C + 0; 114 return 0; 115 } 116 return -ENODEV; 117 } 118 119 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) 120 { 121 /* 122 * On Intel Merrifield the user visible i2c busses are enumerated 123 * [1..7]. So, we add 1 to shift the default range. Besides that the 124 * first PCI slot provides 4 functions, that's why we have to add 0 to 125 * the first slot and 4 to the next one. 126 */ 127 switch (PCI_SLOT(pdev->devfn)) { 128 case 8: 129 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1; 130 return 0; 131 case 9: 132 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1; 133 return 0; 134 } 135 return -ENODEV; 136 } 137 138 static struct dw_pci_controller dw_pci_controllers[] = { 139 [medfield] = { 140 .bus_num = -1, 141 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 142 .tx_fifo_depth = 32, 143 .rx_fifo_depth = 32, 144 .functionality = I2C_FUNC_10BIT_ADDR, 145 .clk_khz = 25000, 146 .setup = mfld_setup, 147 }, 148 [merrifield] = { 149 .bus_num = -1, 150 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 151 .tx_fifo_depth = 64, 152 .rx_fifo_depth = 64, 153 .functionality = I2C_FUNC_10BIT_ADDR, 154 .scl_sda_cfg = &mrfld_config, 155 .setup = mrfld_setup, 156 }, 157 [baytrail] = { 158 .bus_num = -1, 159 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 160 .tx_fifo_depth = 32, 161 .rx_fifo_depth = 32, 162 .functionality = I2C_FUNC_10BIT_ADDR, 163 .scl_sda_cfg = &byt_config, 164 }, 165 [haswell] = { 166 .bus_num = -1, 167 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 168 .tx_fifo_depth = 32, 169 .rx_fifo_depth = 32, 170 .functionality = I2C_FUNC_10BIT_ADDR, 171 .scl_sda_cfg = &hsw_config, 172 }, 173 }; 174 175 #ifdef CONFIG_PM 176 static int i2c_dw_pci_suspend(struct device *dev) 177 { 178 struct pci_dev *pdev = to_pci_dev(dev); 179 180 i2c_dw_disable(pci_get_drvdata(pdev)); 181 return 0; 182 } 183 184 static int i2c_dw_pci_resume(struct device *dev) 185 { 186 struct pci_dev *pdev = to_pci_dev(dev); 187 188 return i2c_dw_init(pci_get_drvdata(pdev)); 189 } 190 #endif 191 192 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend, 193 i2c_dw_pci_resume, NULL); 194 195 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) 196 { 197 return dev->controller->clk_khz; 198 } 199 200 static int i2c_dw_pci_probe(struct pci_dev *pdev, 201 const struct pci_device_id *id) 202 { 203 struct dw_i2c_dev *dev; 204 struct i2c_adapter *adap; 205 int r; 206 struct dw_pci_controller *controller; 207 struct dw_scl_sda_cfg *cfg; 208 209 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { 210 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__, 211 id->driver_data); 212 return -EINVAL; 213 } 214 215 controller = &dw_pci_controllers[id->driver_data]; 216 217 r = pcim_enable_device(pdev); 218 if (r) { 219 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n", 220 r); 221 return r; 222 } 223 224 r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); 225 if (r) { 226 dev_err(&pdev->dev, "I/O memory remapping failed\n"); 227 return r; 228 } 229 230 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); 231 if (!dev) 232 return -ENOMEM; 233 234 dev->clk = NULL; 235 dev->controller = controller; 236 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; 237 dev->base = pcim_iomap_table(pdev)[0]; 238 dev->dev = &pdev->dev; 239 dev->irq = pdev->irq; 240 241 if (controller->setup) { 242 r = controller->setup(pdev, controller); 243 if (r) 244 return r; 245 } 246 247 dev->functionality = controller->functionality | 248 DW_IC_DEFAULT_FUNCTIONALITY; 249 250 dev->master_cfg = controller->bus_cfg; 251 if (controller->scl_sda_cfg) { 252 cfg = controller->scl_sda_cfg; 253 dev->ss_hcnt = cfg->ss_hcnt; 254 dev->fs_hcnt = cfg->fs_hcnt; 255 dev->ss_lcnt = cfg->ss_lcnt; 256 dev->fs_lcnt = cfg->fs_lcnt; 257 dev->sda_hold_time = cfg->sda_hold; 258 } 259 260 pci_set_drvdata(pdev, dev); 261 262 dev->tx_fifo_depth = controller->tx_fifo_depth; 263 dev->rx_fifo_depth = controller->rx_fifo_depth; 264 265 adap = &dev->adapter; 266 adap->owner = THIS_MODULE; 267 adap->class = 0; 268 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); 269 adap->nr = controller->bus_num; 270 271 r = i2c_dw_probe(dev); 272 if (r) 273 return r; 274 275 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 276 pm_runtime_use_autosuspend(&pdev->dev); 277 pm_runtime_put_autosuspend(&pdev->dev); 278 pm_runtime_allow(&pdev->dev); 279 280 return 0; 281 } 282 283 static void i2c_dw_pci_remove(struct pci_dev *pdev) 284 { 285 struct dw_i2c_dev *dev = pci_get_drvdata(pdev); 286 287 i2c_dw_disable(dev); 288 pm_runtime_forbid(&pdev->dev); 289 pm_runtime_get_noresume(&pdev->dev); 290 291 i2c_del_adapter(&dev->adapter); 292 } 293 294 /* work with hotplug and coldplug */ 295 MODULE_ALIAS("i2c_designware-pci"); 296 297 static const struct pci_device_id i2_designware_pci_ids[] = { 298 /* Medfield */ 299 { PCI_VDEVICE(INTEL, 0x0817), medfield }, 300 { PCI_VDEVICE(INTEL, 0x0818), medfield }, 301 { PCI_VDEVICE(INTEL, 0x0819), medfield }, 302 { PCI_VDEVICE(INTEL, 0x082C), medfield }, 303 { PCI_VDEVICE(INTEL, 0x082D), medfield }, 304 { PCI_VDEVICE(INTEL, 0x082E), medfield }, 305 /* Merrifield */ 306 { PCI_VDEVICE(INTEL, 0x1195), merrifield }, 307 { PCI_VDEVICE(INTEL, 0x1196), merrifield }, 308 /* Baytrail */ 309 { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, 310 { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, 311 { PCI_VDEVICE(INTEL, 0x0F43), baytrail }, 312 { PCI_VDEVICE(INTEL, 0x0F44), baytrail }, 313 { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, 314 { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, 315 { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, 316 /* Haswell */ 317 { PCI_VDEVICE(INTEL, 0x9c61), haswell }, 318 { PCI_VDEVICE(INTEL, 0x9c62), haswell }, 319 /* Braswell / Cherrytrail */ 320 { PCI_VDEVICE(INTEL, 0x22C1), baytrail }, 321 { PCI_VDEVICE(INTEL, 0x22C2), baytrail }, 322 { PCI_VDEVICE(INTEL, 0x22C3), baytrail }, 323 { PCI_VDEVICE(INTEL, 0x22C4), baytrail }, 324 { PCI_VDEVICE(INTEL, 0x22C5), baytrail }, 325 { PCI_VDEVICE(INTEL, 0x22C6), baytrail }, 326 { PCI_VDEVICE(INTEL, 0x22C7), baytrail }, 327 { 0,} 328 }; 329 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 330 331 static struct pci_driver dw_i2c_driver = { 332 .name = DRIVER_NAME, 333 .id_table = i2_designware_pci_ids, 334 .probe = i2c_dw_pci_probe, 335 .remove = i2c_dw_pci_remove, 336 .driver = { 337 .pm = &i2c_dw_pm_ops, 338 }, 339 }; 340 341 module_pci_driver(dw_i2c_driver); 342 343 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 344 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); 345 MODULE_LICENSE("GPL"); 346