1 /* 2 * Synopsys DesignWare I2C adapter driver (master only). 3 * 4 * Based on the TI DAVINCI I2C adapter driver. 5 * 6 * Copyright (C) 2006 Texas Instruments. 7 * Copyright (C) 2007 MontaVista Software Inc. 8 * Copyright (C) 2009 Provigent Ltd. 9 * 10 * ---------------------------------------------------------------------------- 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * ---------------------------------------------------------------------------- 26 * 27 */ 28 29 30 #define DW_IC_CON_MASTER 0x1 31 #define DW_IC_CON_SPEED_STD 0x2 32 #define DW_IC_CON_SPEED_FAST 0x4 33 #define DW_IC_CON_10BITADDR_MASTER 0x10 34 #define DW_IC_CON_RESTART_EN 0x20 35 #define DW_IC_CON_SLAVE_DISABLE 0x40 36 37 38 /** 39 * struct dw_i2c_dev - private i2c-designware data 40 * @dev: driver model device node 41 * @base: IO registers pointer 42 * @cmd_complete: tx completion indicator 43 * @lock: protect this struct and IO registers 44 * @clk: input reference clock 45 * @cmd_err: run time hadware error code 46 * @msgs: points to an array of messages currently being transfered 47 * @msgs_num: the number of elements in msgs 48 * @msg_write_idx: the element index of the current tx message in the msgs 49 * array 50 * @tx_buf_len: the length of the current tx buffer 51 * @tx_buf: the current tx buffer 52 * @msg_read_idx: the element index of the current rx message in the msgs 53 * array 54 * @rx_buf_len: the length of the current rx buffer 55 * @rx_buf: the current rx buffer 56 * @msg_err: error status of the current transfer 57 * @status: i2c master status, one of STATUS_* 58 * @abort_source: copy of the TX_ABRT_SOURCE register 59 * @irq: interrupt number for the i2c master 60 * @adapter: i2c subsystem adapter node 61 * @tx_fifo_depth: depth of the hardware tx fifo 62 * @rx_fifo_depth: depth of the hardware rx fifo 63 * @rx_outstanding: current master-rx elements in tx fifo 64 */ 65 struct dw_i2c_dev { 66 struct device *dev; 67 void __iomem *base; 68 struct completion cmd_complete; 69 struct mutex lock; 70 struct clk *clk; 71 u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); 72 struct dw_pci_controller *controller; 73 int cmd_err; 74 struct i2c_msg *msgs; 75 int msgs_num; 76 int msg_write_idx; 77 u32 tx_buf_len; 78 u8 *tx_buf; 79 int msg_read_idx; 80 u32 rx_buf_len; 81 u8 *rx_buf; 82 int msg_err; 83 unsigned int status; 84 u32 abort_source; 85 int irq; 86 u32 accessor_flags; 87 struct i2c_adapter adapter; 88 u32 functionality; 89 u32 master_cfg; 90 unsigned int tx_fifo_depth; 91 unsigned int rx_fifo_depth; 92 int rx_outstanding; 93 }; 94 95 #define ACCESS_SWAP 0x00000001 96 #define ACCESS_16BIT 0x00000002 97 98 extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); 99 extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); 100 extern int i2c_dw_init(struct dw_i2c_dev *dev); 101 extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], 102 int num); 103 extern u32 i2c_dw_func(struct i2c_adapter *adap); 104 extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); 105 extern void i2c_dw_enable(struct dw_i2c_dev *dev); 106 extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev); 107 extern void i2c_dw_disable(struct dw_i2c_dev *dev); 108 extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); 109 extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); 110 extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); 111