xref: /openbmc/linux/drivers/i2c/busses/i2c-amd756.c (revision a09d2831)
1 /*
2     Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
3 
4     Shamelessly ripped from i2c-piix4.c:
5 
6     Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
7     Philip Edelbrock <phil@netroedge.com>
8 
9     This program is free software; you can redistribute it and/or modify
10     it under the terms of the GNU General Public License as published by
11     the Free Software Foundation; either version 2 of the License, or
12     (at your option) any later version.
13 
14     This program is distributed in the hope that it will be useful,
15     but WITHOUT ANY WARRANTY; without even the implied warranty of
16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17     GNU General Public License for more details.
18 
19     You should have received a copy of the GNU General Public License
20     along with this program; if not, write to the Free Software
21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23 
24 /*
25     2002-04-08: Added nForce support. (Csaba Halasz)
26     2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
27     2002-12-28: Rewritten into something that resembles a Linux driver (hch)
28     2003-11-29: Added back AMD8111 removed by the previous rewrite.
29                 (Philip Pokorny)
30 */
31 
32 /*
33    Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
34    Note: we assume there can only be one device, with one SMBus interface.
35 */
36 
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/kernel.h>
40 #include <linux/delay.h>
41 #include <linux/stddef.h>
42 #include <linux/ioport.h>
43 #include <linux/i2c.h>
44 #include <linux/init.h>
45 #include <linux/acpi.h>
46 #include <asm/io.h>
47 
48 /* AMD756 SMBus address offsets */
49 #define SMB_ADDR_OFFSET		0xE0
50 #define SMB_IOSIZE		16
51 #define SMB_GLOBAL_STATUS	(0x0 + amd756_ioport)
52 #define SMB_GLOBAL_ENABLE	(0x2 + amd756_ioport)
53 #define SMB_HOST_ADDRESS	(0x4 + amd756_ioport)
54 #define SMB_HOST_DATA		(0x6 + amd756_ioport)
55 #define SMB_HOST_COMMAND	(0x8 + amd756_ioport)
56 #define SMB_HOST_BLOCK_DATA	(0x9 + amd756_ioport)
57 #define SMB_HAS_DATA		(0xA + amd756_ioport)
58 #define SMB_HAS_DEVICE_ADDRESS	(0xC + amd756_ioport)
59 #define SMB_HAS_HOST_ADDRESS	(0xE + amd756_ioport)
60 #define SMB_SNOOP_ADDRESS	(0xF + amd756_ioport)
61 
62 /* PCI Address Constants */
63 
64 /* address of I/O space */
65 #define SMBBA		0x058		/* mh */
66 #define SMBBANFORCE	0x014
67 
68 /* general configuration */
69 #define SMBGCFG		0x041		/* mh */
70 
71 /* silicon revision code */
72 #define SMBREV		0x008
73 
74 /* Other settings */
75 #define MAX_TIMEOUT	500
76 
77 /* AMD756 constants */
78 #define AMD756_QUICK		0x00
79 #define AMD756_BYTE		0x01
80 #define AMD756_BYTE_DATA	0x02
81 #define AMD756_WORD_DATA	0x03
82 #define AMD756_PROCESS_CALL	0x04
83 #define AMD756_BLOCK_DATA	0x05
84 
85 static struct pci_driver amd756_driver;
86 static unsigned short amd756_ioport;
87 
88 /*
89   SMBUS event = I/O 28-29 bit 11
90      see E0 for the status bits and enabled in E2
91 
92 */
93 #define GS_ABRT_STS	(1 << 0)
94 #define GS_COL_STS	(1 << 1)
95 #define GS_PRERR_STS	(1 << 2)
96 #define GS_HST_STS	(1 << 3)
97 #define GS_HCYC_STS	(1 << 4)
98 #define GS_TO_STS	(1 << 5)
99 #define GS_SMB_STS	(1 << 11)
100 
101 #define GS_CLEAR_STS	(GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
102 			 GS_HCYC_STS | GS_TO_STS )
103 
104 #define GE_CYC_TYPE_MASK	(7)
105 #define GE_HOST_STC		(1 << 3)
106 #define GE_ABORT		(1 << 5)
107 
108 
109 static int amd756_transaction(struct i2c_adapter *adap)
110 {
111 	int temp;
112 	int result = 0;
113 	int timeout = 0;
114 
115 	dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
116 		"DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
117 		inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
118 		inb_p(SMB_HOST_DATA));
119 
120 	/* Make sure the SMBus host is ready to start transmitting */
121 	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
122 		dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
123 		do {
124 			msleep(1);
125 			temp = inw_p(SMB_GLOBAL_STATUS);
126 		} while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
127 		         (timeout++ < MAX_TIMEOUT));
128 		/* If the SMBus is still busy, we give up */
129 		if (timeout > MAX_TIMEOUT) {
130 			dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
131 			goto abort;
132 		}
133 		timeout = 0;
134 	}
135 
136 	/* start the transaction by setting the start bit */
137 	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);
138 
139 	/* We will always wait for a fraction of a second! */
140 	do {
141 		msleep(1);
142 		temp = inw_p(SMB_GLOBAL_STATUS);
143 	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
144 
145 	/* If the SMBus is still busy, we give up */
146 	if (timeout > MAX_TIMEOUT) {
147 		dev_dbg(&adap->dev, "Completion timeout!\n");
148 		goto abort;
149 	}
150 
151 	if (temp & GS_PRERR_STS) {
152 		result = -ENXIO;
153 		dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
154 	}
155 
156 	if (temp & GS_COL_STS) {
157 		result = -EIO;
158 		dev_warn(&adap->dev, "SMBus collision!\n");
159 	}
160 
161 	if (temp & GS_TO_STS) {
162 		result = -ETIMEDOUT;
163 		dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
164 	}
165 
166 	if (temp & GS_HCYC_STS)
167 		dev_dbg(&adap->dev, "SMBus protocol success!\n");
168 
169 	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
170 
171 #ifdef DEBUG
172 	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
173 		dev_dbg(&adap->dev,
174 			"Failed reset at end of transaction (%04x)\n", temp);
175 	}
176 #endif
177 
178 	dev_dbg(&adap->dev,
179 		"Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
180 		inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
181 		inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
182 
183 	return result;
184 
185  abort:
186 	dev_warn(&adap->dev, "Sending abort\n");
187 	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
188 	msleep(100);
189 	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
190 	return -EIO;
191 }
192 
193 /* Return negative errno on error. */
194 static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
195 		  unsigned short flags, char read_write,
196 		  u8 command, int size, union i2c_smbus_data * data)
197 {
198 	int i, len;
199 	int status;
200 
201 	switch (size) {
202 	case I2C_SMBUS_QUICK:
203 		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
204 		       SMB_HOST_ADDRESS);
205 		size = AMD756_QUICK;
206 		break;
207 	case I2C_SMBUS_BYTE:
208 		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
209 		       SMB_HOST_ADDRESS);
210 		if (read_write == I2C_SMBUS_WRITE)
211 			outb_p(command, SMB_HOST_DATA);
212 		size = AMD756_BYTE;
213 		break;
214 	case I2C_SMBUS_BYTE_DATA:
215 		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
216 		       SMB_HOST_ADDRESS);
217 		outb_p(command, SMB_HOST_COMMAND);
218 		if (read_write == I2C_SMBUS_WRITE)
219 			outw_p(data->byte, SMB_HOST_DATA);
220 		size = AMD756_BYTE_DATA;
221 		break;
222 	case I2C_SMBUS_WORD_DATA:
223 		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
224 		       SMB_HOST_ADDRESS);
225 		outb_p(command, SMB_HOST_COMMAND);
226 		if (read_write == I2C_SMBUS_WRITE)
227 			outw_p(data->word, SMB_HOST_DATA);	/* TODO: endian???? */
228 		size = AMD756_WORD_DATA;
229 		break;
230 	case I2C_SMBUS_BLOCK_DATA:
231 		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
232 		       SMB_HOST_ADDRESS);
233 		outb_p(command, SMB_HOST_COMMAND);
234 		if (read_write == I2C_SMBUS_WRITE) {
235 			len = data->block[0];
236 			if (len < 0)
237 				len = 0;
238 			if (len > 32)
239 				len = 32;
240 			outw_p(len, SMB_HOST_DATA);
241 			/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
242 			for (i = 1; i <= len; i++)
243 				outb_p(data->block[i],
244 				       SMB_HOST_BLOCK_DATA);
245 		}
246 		size = AMD756_BLOCK_DATA;
247 		break;
248 	default:
249 		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
250 		return -EOPNOTSUPP;
251 	}
252 
253 	/* How about enabling interrupts... */
254 	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
255 
256 	status = amd756_transaction(adap);
257 	if (status)
258 		return status;
259 
260 	if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
261 		return 0;
262 
263 
264 	switch (size) {
265 	case AMD756_BYTE:
266 		data->byte = inw_p(SMB_HOST_DATA);
267 		break;
268 	case AMD756_BYTE_DATA:
269 		data->byte = inw_p(SMB_HOST_DATA);
270 		break;
271 	case AMD756_WORD_DATA:
272 		data->word = inw_p(SMB_HOST_DATA);	/* TODO: endian???? */
273 		break;
274 	case AMD756_BLOCK_DATA:
275 		data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
276 		if(data->block[0] > 32)
277 			data->block[0] = 32;
278 		/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
279 		for (i = 1; i <= data->block[0]; i++)
280 			data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
281 		break;
282 	}
283 
284 	return 0;
285 }
286 
287 static u32 amd756_func(struct i2c_adapter *adapter)
288 {
289 	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
290 	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
291 	    I2C_FUNC_SMBUS_BLOCK_DATA;
292 }
293 
294 static const struct i2c_algorithm smbus_algorithm = {
295 	.smbus_xfer	= amd756_access,
296 	.functionality	= amd756_func,
297 };
298 
299 struct i2c_adapter amd756_smbus = {
300 	.owner		= THIS_MODULE,
301 	.class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
302 	.algo		= &smbus_algorithm,
303 };
304 
305 enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
306 static const char* chipname[] = {
307 	"AMD756", "AMD766", "AMD768",
308 	"nVidia nForce", "AMD8111",
309 };
310 
311 static struct pci_device_id amd756_ids[] = {
312 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
313 	  .driver_data = AMD756 },
314 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
315 	  .driver_data = AMD766 },
316 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
317 	  .driver_data = AMD768 },
318 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
319 	  .driver_data = AMD8111 },
320 	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
321 	  .driver_data = NFORCE },
322 	{ 0, }
323 };
324 
325 MODULE_DEVICE_TABLE (pci, amd756_ids);
326 
327 static int __devinit amd756_probe(struct pci_dev *pdev,
328 				  const struct pci_device_id *id)
329 {
330 	int nforce = (id->driver_data == NFORCE);
331 	int error;
332 	u8 temp;
333 
334 	if (amd756_ioport) {
335 		dev_err(&pdev->dev, "Only one device supported "
336 		       "(you have a strange motherboard, btw)\n");
337 		return -ENODEV;
338 	}
339 
340 	if (nforce) {
341 		if (PCI_FUNC(pdev->devfn) != 1)
342 			return -ENODEV;
343 
344 		pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
345 		amd756_ioport &= 0xfffc;
346 	} else { /* amd */
347 		if (PCI_FUNC(pdev->devfn) != 3)
348 			return -ENODEV;
349 
350 		pci_read_config_byte(pdev, SMBGCFG, &temp);
351 		if ((temp & 128) == 0) {
352 			dev_err(&pdev->dev,
353 				"Error: SMBus controller I/O not enabled!\n");
354 			return -ENODEV;
355 		}
356 
357 		/* Determine the address of the SMBus areas */
358 		/* Technically it is a dword but... */
359 		pci_read_config_word(pdev, SMBBA, &amd756_ioport);
360 		amd756_ioport &= 0xff00;
361 		amd756_ioport += SMB_ADDR_OFFSET;
362 	}
363 
364 	error = acpi_check_region(amd756_ioport, SMB_IOSIZE,
365 				  amd756_driver.name);
366 	if (error)
367 		return -ENODEV;
368 
369 	if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
370 		dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
371 			amd756_ioport);
372 		return -ENODEV;
373 	}
374 
375 	pci_read_config_byte(pdev, SMBREV, &temp);
376 	dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
377 	dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);
378 
379 	/* set up the sysfs linkage to our parent device */
380 	amd756_smbus.dev.parent = &pdev->dev;
381 
382 	snprintf(amd756_smbus.name, sizeof(amd756_smbus.name),
383 		 "SMBus %s adapter at %04x", chipname[id->driver_data],
384 		 amd756_ioport);
385 
386 	error = i2c_add_adapter(&amd756_smbus);
387 	if (error) {
388 		dev_err(&pdev->dev,
389 			"Adapter registration failed, module not inserted\n");
390 		goto out_err;
391 	}
392 
393 	return 0;
394 
395  out_err:
396 	release_region(amd756_ioport, SMB_IOSIZE);
397 	return error;
398 }
399 
400 static void __devexit amd756_remove(struct pci_dev *dev)
401 {
402 	i2c_del_adapter(&amd756_smbus);
403 	release_region(amd756_ioport, SMB_IOSIZE);
404 }
405 
406 static struct pci_driver amd756_driver = {
407 	.name		= "amd756_smbus",
408 	.id_table	= amd756_ids,
409 	.probe		= amd756_probe,
410 	.remove		= __devexit_p(amd756_remove),
411 };
412 
413 static int __init amd756_init(void)
414 {
415 	return pci_register_driver(&amd756_driver);
416 }
417 
418 static void __exit amd756_exit(void)
419 {
420 	pci_unregister_driver(&amd756_driver);
421 }
422 
423 MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
424 MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
425 MODULE_LICENSE("GPL");
426 
427 EXPORT_SYMBOL(amd756_smbus);
428 
429 module_init(amd756_init)
430 module_exit(amd756_exit)
431