1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * AMD MP2 PCIe communication driver
4  *
5  * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
6  *          Elie Morisse <syniurge@gmail.com>
7  */
8 
9 #include <linux/dma-mapping.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 
15 #include "i2c-amd-mp2.h"
16 
17 #include <linux/io-64-nonatomic-lo-hi.h>
18 
19 static void amd_mp2_c2p_mutex_lock(struct amd_i2c_common *i2c_common)
20 {
21 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
22 
23 	/* there is only one data mailbox for two i2c adapters */
24 	mutex_lock(&privdata->c2p_lock);
25 	privdata->c2p_lock_busid = i2c_common->bus_id;
26 }
27 
28 static void amd_mp2_c2p_mutex_unlock(struct amd_i2c_common *i2c_common)
29 {
30 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
31 
32 	if (unlikely(privdata->c2p_lock_busid != i2c_common->bus_id)) {
33 		pci_warn(privdata->pci_dev,
34 			 "bus %d attempting to unlock C2P locked by bus %d\n",
35 			 i2c_common->bus_id, privdata->c2p_lock_busid);
36 		return;
37 	}
38 
39 	mutex_unlock(&privdata->c2p_lock);
40 }
41 
42 static int amd_mp2_cmd(struct amd_i2c_common *i2c_common,
43 		       union i2c_cmd_base i2c_cmd_base)
44 {
45 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
46 	void __iomem *reg;
47 
48 	i2c_common->reqcmd = i2c_cmd_base.s.i2c_cmd;
49 
50 	reg = privdata->mmio + ((i2c_cmd_base.s.bus_id == 1) ?
51 				AMD_C2P_MSG1 : AMD_C2P_MSG0);
52 	writel(i2c_cmd_base.ul, reg);
53 
54 	return 0;
55 }
56 
57 int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable)
58 {
59 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
60 	union i2c_cmd_base i2c_cmd_base;
61 
62 	pci_dbg(privdata->pci_dev, "id: %d\n", i2c_common->bus_id);
63 
64 	i2c_cmd_base.ul = 0;
65 	i2c_cmd_base.s.i2c_cmd = enable ? i2c_enable : i2c_disable;
66 	i2c_cmd_base.s.bus_id = i2c_common->bus_id;
67 	i2c_cmd_base.s.i2c_speed = i2c_common->i2c_speed;
68 
69 	amd_mp2_c2p_mutex_lock(i2c_common);
70 
71 	return amd_mp2_cmd(i2c_common, i2c_cmd_base);
72 }
73 EXPORT_SYMBOL_GPL(amd_mp2_bus_enable_set);
74 
75 static void amd_mp2_cmd_rw_fill(struct amd_i2c_common *i2c_common,
76 				union i2c_cmd_base *i2c_cmd_base,
77 				enum i2c_cmd reqcmd)
78 {
79 	i2c_cmd_base->s.i2c_cmd = reqcmd;
80 	i2c_cmd_base->s.bus_id = i2c_common->bus_id;
81 	i2c_cmd_base->s.i2c_speed = i2c_common->i2c_speed;
82 	i2c_cmd_base->s.slave_addr = i2c_common->msg->addr;
83 	i2c_cmd_base->s.length = i2c_common->msg->len;
84 }
85 
86 int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd)
87 {
88 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
89 	union i2c_cmd_base i2c_cmd_base;
90 
91 	amd_mp2_cmd_rw_fill(i2c_common, &i2c_cmd_base, reqcmd);
92 	amd_mp2_c2p_mutex_lock(i2c_common);
93 
94 	if (i2c_common->msg->len <= 32) {
95 		i2c_cmd_base.s.mem_type = use_c2pmsg;
96 		if (reqcmd == i2c_write)
97 			memcpy_toio(privdata->mmio + AMD_C2P_MSG2,
98 				    i2c_common->msg->buf,
99 				    i2c_common->msg->len);
100 	} else {
101 		i2c_cmd_base.s.mem_type = use_dram;
102 		writeq((u64)i2c_common->dma_addr,
103 		       privdata->mmio + AMD_C2P_MSG2);
104 	}
105 
106 	return amd_mp2_cmd(i2c_common, i2c_cmd_base);
107 }
108 EXPORT_SYMBOL_GPL(amd_mp2_rw);
109 
110 static void amd_mp2_pci_check_rw_event(struct amd_i2c_common *i2c_common)
111 {
112 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
113 	struct pci_dev *pdev = privdata->pci_dev;
114 	int len = i2c_common->eventval.r.length;
115 	u32 slave_addr = i2c_common->eventval.r.slave_addr;
116 	bool err = false;
117 
118 	if (unlikely(len != i2c_common->msg->len)) {
119 		pci_err(pdev, "length %d in event doesn't match buffer length %d!\n",
120 			len, i2c_common->msg->len);
121 		err = true;
122 	}
123 
124 	if (unlikely(slave_addr != i2c_common->msg->addr)) {
125 		pci_err(pdev, "unexpected slave address %x (expected: %x)!\n",
126 			slave_addr, i2c_common->msg->addr);
127 		err = true;
128 	}
129 
130 	if (!err)
131 		i2c_common->cmd_success = true;
132 }
133 
134 static void __amd_mp2_process_event(struct amd_i2c_common *i2c_common)
135 {
136 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
137 	struct pci_dev *pdev = privdata->pci_dev;
138 	enum status_type sts = i2c_common->eventval.r.status;
139 	enum response_type res = i2c_common->eventval.r.response;
140 	int len = i2c_common->eventval.r.length;
141 
142 	if (res != command_success) {
143 		if (res != command_failed)
144 			pci_err(pdev, "invalid response to i2c command!\n");
145 		return;
146 	}
147 
148 	switch (i2c_common->reqcmd) {
149 	case i2c_read:
150 		if (sts == i2c_readcomplete_event) {
151 			amd_mp2_pci_check_rw_event(i2c_common);
152 			if (len <= 32)
153 				memcpy_fromio(i2c_common->msg->buf,
154 					      privdata->mmio + AMD_C2P_MSG2,
155 					      len);
156 		} else if (sts != i2c_readfail_event) {
157 			pci_err(pdev, "invalid i2c status after read (%d)!\n", sts);
158 		}
159 		break;
160 	case i2c_write:
161 		if (sts == i2c_writecomplete_event)
162 			amd_mp2_pci_check_rw_event(i2c_common);
163 		else if (sts != i2c_writefail_event)
164 			pci_err(pdev, "invalid i2c status after write (%d)!\n", sts);
165 		break;
166 	case i2c_enable:
167 		if (sts == i2c_busenable_complete)
168 			i2c_common->cmd_success = true;
169 		else if (sts != i2c_busenable_failed)
170 			pci_err(pdev, "invalid i2c status after bus enable (%d)!\n", sts);
171 		break;
172 	case i2c_disable:
173 		if (sts == i2c_busdisable_complete)
174 			i2c_common->cmd_success = true;
175 		else if (sts != i2c_busdisable_failed)
176 			pci_err(pdev, "invalid i2c status after bus disable (%d)!\n", sts);
177 		break;
178 	default:
179 		break;
180 	}
181 }
182 
183 void amd_mp2_process_event(struct amd_i2c_common *i2c_common)
184 {
185 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
186 	struct pci_dev *pdev = privdata->pci_dev;
187 
188 	if (unlikely(i2c_common->reqcmd == i2c_none)) {
189 		pci_warn(pdev, "received msg but no cmd was sent (bus = %d)!\n",
190 			 i2c_common->bus_id);
191 		return;
192 	}
193 
194 	__amd_mp2_process_event(i2c_common);
195 
196 	i2c_common->reqcmd = i2c_none;
197 	amd_mp2_c2p_mutex_unlock(i2c_common);
198 }
199 EXPORT_SYMBOL_GPL(amd_mp2_process_event);
200 
201 static irqreturn_t amd_mp2_irq_isr(int irq, void *dev)
202 {
203 	struct amd_mp2_dev *privdata = dev;
204 	struct pci_dev *pdev = privdata->pci_dev;
205 	struct amd_i2c_common *i2c_common;
206 	u32 val;
207 	unsigned int bus_id;
208 	void __iomem *reg;
209 	enum irqreturn ret = IRQ_NONE;
210 
211 	for (bus_id = 0; bus_id < 2; bus_id++) {
212 		i2c_common = privdata->busses[bus_id];
213 		if (!i2c_common)
214 			continue;
215 
216 		reg = privdata->mmio + ((bus_id == 0) ?
217 					AMD_P2C_MSG1 : AMD_P2C_MSG2);
218 		val = readl(reg);
219 		if (val != 0) {
220 			writel(0, reg);
221 			writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
222 			i2c_common->eventval.ul = val;
223 			i2c_common->cmd_completion(i2c_common);
224 
225 			ret = IRQ_HANDLED;
226 		}
227 	}
228 
229 	if (ret != IRQ_HANDLED) {
230 		val = readl(privdata->mmio + AMD_P2C_MSG_INTEN);
231 		if (val != 0) {
232 			writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
233 			pci_warn(pdev, "received irq without message\n");
234 			ret = IRQ_HANDLED;
235 		}
236 	}
237 
238 	return ret;
239 }
240 
241 void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common)
242 {
243 	i2c_common->reqcmd = i2c_none;
244 	amd_mp2_c2p_mutex_unlock(i2c_common);
245 }
246 EXPORT_SYMBOL_GPL(amd_mp2_rw_timeout);
247 
248 int amd_mp2_register_cb(struct amd_i2c_common *i2c_common)
249 {
250 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
251 	struct pci_dev *pdev = privdata->pci_dev;
252 
253 	if (i2c_common->bus_id > 1)
254 		return -EINVAL;
255 
256 	if (privdata->busses[i2c_common->bus_id]) {
257 		pci_err(pdev, "Bus %d already taken!\n", i2c_common->bus_id);
258 		return -EINVAL;
259 	}
260 
261 	privdata->busses[i2c_common->bus_id] = i2c_common;
262 
263 	return 0;
264 }
265 EXPORT_SYMBOL_GPL(amd_mp2_register_cb);
266 
267 int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common)
268 {
269 	struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
270 
271 	privdata->busses[i2c_common->bus_id] = NULL;
272 
273 	return 0;
274 }
275 EXPORT_SYMBOL_GPL(amd_mp2_unregister_cb);
276 
277 static void amd_mp2_clear_reg(struct amd_mp2_dev *privdata)
278 {
279 	int reg;
280 
281 	for (reg = AMD_C2P_MSG0; reg <= AMD_C2P_MSG9; reg += 4)
282 		writel(0, privdata->mmio + reg);
283 
284 	for (reg = AMD_P2C_MSG1; reg <= AMD_P2C_MSG2; reg += 4)
285 		writel(0, privdata->mmio + reg);
286 }
287 
288 static int amd_mp2_pci_init(struct amd_mp2_dev *privdata,
289 			    struct pci_dev *pci_dev)
290 {
291 	int irq_flag = 0, rc;
292 
293 	pci_set_drvdata(pci_dev, privdata);
294 
295 	rc = pcim_enable_device(pci_dev);
296 	if (rc) {
297 		pci_err(pci_dev, "Failed to enable MP2 PCI device\n");
298 		goto err_pci_enable;
299 	}
300 
301 	rc = pcim_iomap_regions(pci_dev, 1 << 2, pci_name(pci_dev));
302 	if (rc) {
303 		pci_err(pci_dev, "I/O memory remapping failed\n");
304 		goto err_pci_enable;
305 	}
306 	privdata->mmio = pcim_iomap_table(pci_dev)[2];
307 
308 	pci_set_master(pci_dev);
309 
310 	rc = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(64));
311 	if (rc)
312 		goto err_dma_mask;
313 
314 	/* request and enable interrupt */
315 	writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
316 	rc = pci_alloc_irq_vectors(pci_dev, 1, 1, PCI_IRQ_ALL_TYPES);
317 	if (rc < 0) {
318 		dev_err(&pci_dev->dev, "Failed to allocate single IRQ err=%d\n", rc);
319 		goto err_dma_mask;
320 	}
321 
322 	privdata->dev_irq = pci_irq_vector(pci_dev, 0);
323 	if (!pci_dev->msix_enabled && !pci_dev->msi_enabled)
324 		irq_flag = IRQF_SHARED;
325 
326 	rc = devm_request_irq(&pci_dev->dev, privdata->dev_irq,
327 			      amd_mp2_irq_isr, irq_flag, dev_name(&pci_dev->dev), privdata);
328 	if (rc) {
329 		pci_err(pci_dev, "Failure requesting irq %i: %d\n", privdata->dev_irq, rc);
330 		goto free_irq_vectors;
331 	}
332 
333 	return rc;
334 
335 free_irq_vectors:
336 	free_irq(privdata->dev_irq, privdata);
337 err_dma_mask:
338 	pci_clear_master(pci_dev);
339 err_pci_enable:
340 	pci_set_drvdata(pci_dev, NULL);
341 	return rc;
342 }
343 
344 static int amd_mp2_pci_probe(struct pci_dev *pci_dev,
345 			     const struct pci_device_id *id)
346 {
347 	struct amd_mp2_dev *privdata;
348 	int rc;
349 
350 	privdata = devm_kzalloc(&pci_dev->dev, sizeof(*privdata), GFP_KERNEL);
351 	if (!privdata)
352 		return -ENOMEM;
353 
354 	privdata->pci_dev = pci_dev;
355 	rc = amd_mp2_pci_init(privdata, pci_dev);
356 	if (rc)
357 		return rc;
358 
359 	mutex_init(&privdata->c2p_lock);
360 
361 	pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
362 	pm_runtime_use_autosuspend(&pci_dev->dev);
363 	pm_runtime_put_autosuspend(&pci_dev->dev);
364 	pm_runtime_allow(&pci_dev->dev);
365 
366 	privdata->probed = true;
367 
368 	pci_info(pci_dev, "MP2 device registered.\n");
369 	return 0;
370 }
371 
372 static void amd_mp2_pci_remove(struct pci_dev *pci_dev)
373 {
374 	struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
375 
376 	pm_runtime_forbid(&pci_dev->dev);
377 	pm_runtime_get_noresume(&pci_dev->dev);
378 
379 	free_irq(privdata->dev_irq, privdata);
380 	pci_clear_master(pci_dev);
381 
382 	amd_mp2_clear_reg(privdata);
383 }
384 
385 #ifdef CONFIG_PM
386 static int amd_mp2_pci_suspend(struct device *dev)
387 {
388 	struct pci_dev *pci_dev = to_pci_dev(dev);
389 	struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
390 	struct amd_i2c_common *i2c_common;
391 	unsigned int bus_id;
392 	int ret = 0;
393 
394 	for (bus_id = 0; bus_id < 2; bus_id++) {
395 		i2c_common = privdata->busses[bus_id];
396 		if (i2c_common)
397 			i2c_common->suspend(i2c_common);
398 	}
399 
400 	ret = pci_save_state(pci_dev);
401 	if (ret) {
402 		pci_err(pci_dev, "pci_save_state failed = %d\n", ret);
403 		return ret;
404 	}
405 
406 	pci_disable_device(pci_dev);
407 	return ret;
408 }
409 
410 static int amd_mp2_pci_resume(struct device *dev)
411 {
412 	struct pci_dev *pci_dev = to_pci_dev(dev);
413 	struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
414 	struct amd_i2c_common *i2c_common;
415 	unsigned int bus_id;
416 	int ret = 0;
417 
418 	pci_restore_state(pci_dev);
419 	ret = pci_enable_device(pci_dev);
420 	if (ret < 0) {
421 		pci_err(pci_dev, "pci_enable_device failed = %d\n", ret);
422 		return ret;
423 	}
424 
425 	for (bus_id = 0; bus_id < 2; bus_id++) {
426 		i2c_common = privdata->busses[bus_id];
427 		if (i2c_common) {
428 			ret = i2c_common->resume(i2c_common);
429 			if (ret < 0)
430 				return ret;
431 		}
432 	}
433 
434 	return ret;
435 }
436 
437 static UNIVERSAL_DEV_PM_OPS(amd_mp2_pci_pm_ops, amd_mp2_pci_suspend,
438 			    amd_mp2_pci_resume, NULL);
439 #endif /* CONFIG_PM */
440 
441 static const struct pci_device_id amd_mp2_pci_tbl[] = {
442 	{PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2)},
443 	{0}
444 };
445 MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
446 
447 static struct pci_driver amd_mp2_pci_driver = {
448 	.name		= "i2c_amd_mp2",
449 	.id_table	= amd_mp2_pci_tbl,
450 	.probe		= amd_mp2_pci_probe,
451 	.remove		= amd_mp2_pci_remove,
452 #ifdef CONFIG_PM
453 	.driver = {
454 		.pm	= &amd_mp2_pci_pm_ops,
455 	},
456 #endif
457 };
458 module_pci_driver(amd_mp2_pci_driver);
459 
460 struct amd_mp2_dev *amd_mp2_find_device(void)
461 {
462 	struct device *dev;
463 	struct pci_dev *pci_dev;
464 
465 	dev = driver_find_next_device(&amd_mp2_pci_driver.driver, NULL);
466 	if (!dev)
467 		return NULL;
468 
469 	pci_dev = to_pci_dev(dev);
470 	return (struct amd_mp2_dev *)pci_get_drvdata(pci_dev);
471 }
472 EXPORT_SYMBOL_GPL(amd_mp2_find_device);
473 
474 MODULE_DESCRIPTION("AMD(R) PCI-E MP2 I2C Controller Driver");
475 MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>");
476 MODULE_AUTHOR("Elie Morisse <syniurge@gmail.com>");
477 MODULE_LICENSE("Dual BSD/GPL");
478