xref: /openbmc/linux/drivers/i2c/algos/i2c-algo-pca.c (revision b285d2ae)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
4  *    Copyright (C) 2004 Arcom Control Systems
5  *    Copyright (C) 2008 Pengutronix
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/moduleparam.h>
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/errno.h>
14 #include <linux/i2c.h>
15 #include <linux/i2c-algo-pca.h>
16 
17 #define DEB1(fmt, args...) do { if (i2c_debug >= 1)			\
18 				 printk(KERN_DEBUG fmt, ## args); } while (0)
19 #define DEB2(fmt, args...) do { if (i2c_debug >= 2)			\
20 				 printk(KERN_DEBUG fmt, ## args); } while (0)
21 #define DEB3(fmt, args...) do { if (i2c_debug >= 3)			\
22 				 printk(KERN_DEBUG fmt, ## args); } while (0)
23 
24 static int i2c_debug;
25 
26 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
27 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
28 
29 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
30 #define pca_clock(adap) adap->i2c_clock
31 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
32 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
33 #define pca_wait(adap) adap->wait_for_completion(adap->data)
34 
35 static void pca_reset(struct i2c_algo_pca_data *adap)
36 {
37 	if (adap->chip == I2C_PCA_CHIP_9665) {
38 		/* Ignore the reset function from the module,
39 		 * we can use the parallel bus reset.
40 		 */
41 		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
42 		pca_outw(adap, I2C_PCA_IND, 0xA5);
43 		pca_outw(adap, I2C_PCA_IND, 0x5A);
44 	} else {
45 		adap->reset_chip(adap->data);
46 	}
47 }
48 
49 /*
50  * Generate a start condition on the i2c bus.
51  *
52  * returns after the start condition has occurred
53  */
54 static int pca_start(struct i2c_algo_pca_data *adap)
55 {
56 	int sta = pca_get_con(adap);
57 	DEB2("=== START\n");
58 	sta |= I2C_PCA_CON_STA;
59 	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
60 	pca_set_con(adap, sta);
61 	return pca_wait(adap);
62 }
63 
64 /*
65  * Generate a repeated start condition on the i2c bus
66  *
67  * return after the repeated start condition has occurred
68  */
69 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
70 {
71 	int sta = pca_get_con(adap);
72 	DEB2("=== REPEATED START\n");
73 	sta |= I2C_PCA_CON_STA;
74 	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
75 	pca_set_con(adap, sta);
76 	return pca_wait(adap);
77 }
78 
79 /*
80  * Generate a stop condition on the i2c bus
81  *
82  * returns after the stop condition has been generated
83  *
84  * STOPs do not generate an interrupt or set the SI flag, since the
85  * part returns the idle state (0xf8). Hence we don't need to
86  * pca_wait here.
87  */
88 static void pca_stop(struct i2c_algo_pca_data *adap)
89 {
90 	int sta = pca_get_con(adap);
91 	DEB2("=== STOP\n");
92 	sta |= I2C_PCA_CON_STO;
93 	sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
94 	pca_set_con(adap, sta);
95 }
96 
97 /*
98  * Send the slave address and R/W bit
99  *
100  * returns after the address has been sent
101  */
102 static int pca_address(struct i2c_algo_pca_data *adap,
103 		       struct i2c_msg *msg)
104 {
105 	int sta = pca_get_con(adap);
106 	int addr = i2c_8bit_addr_from_msg(msg);
107 
108 	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
109 	     msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
110 
111 	pca_outw(adap, I2C_PCA_DAT, addr);
112 
113 	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
114 	pca_set_con(adap, sta);
115 
116 	return pca_wait(adap);
117 }
118 
119 /*
120  * Transmit a byte.
121  *
122  * Returns after the byte has been transmitted
123  */
124 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
125 		       __u8 b)
126 {
127 	int sta = pca_get_con(adap);
128 	DEB2("=== WRITE %#04x\n", b);
129 	pca_outw(adap, I2C_PCA_DAT, b);
130 
131 	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
132 	pca_set_con(adap, sta);
133 
134 	return pca_wait(adap);
135 }
136 
137 /*
138  * Receive a byte
139  *
140  * returns immediately.
141  */
142 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
143 			__u8 *b, int ack)
144 {
145 	*b = pca_inw(adap, I2C_PCA_DAT);
146 	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
147 }
148 
149 /*
150  * Setup ACK or NACK for next received byte and wait for it to arrive.
151  *
152  * Returns after next byte has arrived.
153  */
154 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
155 		      int ack)
156 {
157 	int sta = pca_get_con(adap);
158 
159 	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
160 
161 	if (ack)
162 		sta |= I2C_PCA_CON_AA;
163 
164 	pca_set_con(adap, sta);
165 	return pca_wait(adap);
166 }
167 
168 static int pca_xfer(struct i2c_adapter *i2c_adap,
169 		    struct i2c_msg *msgs,
170 		    int num)
171 {
172 	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
173 	struct i2c_msg *msg = NULL;
174 	int curmsg;
175 	int numbytes = 0;
176 	int state;
177 	int ret;
178 	int completed = 1;
179 	unsigned long timeout = jiffies + i2c_adap->timeout;
180 
181 	while ((state = pca_status(adap)) != 0xf8) {
182 		if (time_before(jiffies, timeout)) {
183 			msleep(10);
184 		} else {
185 			dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
186 				"%#04x\n", state);
187 			return -EBUSY;
188 		}
189 	}
190 
191 	DEB1("{{{ XFER %d messages\n", num);
192 
193 	if (i2c_debug >= 2) {
194 		for (curmsg = 0; curmsg < num; curmsg++) {
195 			int addr, i;
196 			msg = &msgs[curmsg];
197 
198 			addr = (0x7f & msg->addr) ;
199 
200 			if (msg->flags & I2C_M_RD)
201 				printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
202 				       curmsg, msg->len, addr, (addr << 1) | 1);
203 			else {
204 				printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
205 				       curmsg, msg->len, addr, addr << 1,
206 				       msg->len == 0 ? "" : ", ");
207 				for (i = 0; i < msg->len; i++)
208 					printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
209 				printk("]\n");
210 			}
211 		}
212 	}
213 
214 	curmsg = 0;
215 	ret = -EIO;
216 	while (curmsg < num) {
217 		state = pca_status(adap);
218 
219 		DEB3("STATE is 0x%02x\n", state);
220 		msg = &msgs[curmsg];
221 
222 		switch (state) {
223 		case 0xf8: /* On reset or stop the bus is idle */
224 			completed = pca_start(adap);
225 			break;
226 
227 		case 0x08: /* A START condition has been transmitted */
228 		case 0x10: /* A repeated start condition has been transmitted */
229 			completed = pca_address(adap, msg);
230 			break;
231 
232 		case 0x18: /* SLA+W has been transmitted; ACK has been received */
233 		case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
234 			if (numbytes < msg->len) {
235 				completed = pca_tx_byte(adap,
236 							msg->buf[numbytes]);
237 				numbytes++;
238 				break;
239 			}
240 			curmsg++; numbytes = 0;
241 			if (curmsg == num)
242 				pca_stop(adap);
243 			else
244 				completed = pca_repeated_start(adap);
245 			break;
246 
247 		case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
248 			DEB2("NOT ACK received after SLA+W\n");
249 			pca_stop(adap);
250 			ret = -ENXIO;
251 			goto out;
252 
253 		case 0x40: /* SLA+R has been transmitted; ACK has been received */
254 			completed = pca_rx_ack(adap, msg->len > 1);
255 			break;
256 
257 		case 0x50: /* Data bytes has been received; ACK has been returned */
258 			if (numbytes < msg->len) {
259 				pca_rx_byte(adap, &msg->buf[numbytes], 1);
260 				numbytes++;
261 				completed = pca_rx_ack(adap,
262 						       numbytes < msg->len - 1);
263 				break;
264 			}
265 			curmsg++; numbytes = 0;
266 			if (curmsg == num)
267 				pca_stop(adap);
268 			else
269 				completed = pca_repeated_start(adap);
270 			break;
271 
272 		case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
273 			DEB2("NOT ACK received after SLA+R\n");
274 			pca_stop(adap);
275 			ret = -ENXIO;
276 			goto out;
277 
278 		case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
279 			DEB2("NOT ACK received after data byte\n");
280 			pca_stop(adap);
281 			goto out;
282 
283 		case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
284 			DEB2("Arbitration lost\n");
285 			/*
286 			 * The PCA9564 data sheet (2006-09-01) says "A
287 			 * START condition will be transmitted when the
288 			 * bus becomes free (STOP or SCL and SDA high)"
289 			 * when the STA bit is set (p. 11).
290 			 *
291 			 * In case this won't work, try pca_reset()
292 			 * instead.
293 			 */
294 			pca_start(adap);
295 			goto out;
296 
297 		case 0x58: /* Data byte has been received; NOT ACK has been returned */
298 			if (numbytes == msg->len - 1) {
299 				pca_rx_byte(adap, &msg->buf[numbytes], 0);
300 				curmsg++; numbytes = 0;
301 				if (curmsg == num)
302 					pca_stop(adap);
303 				else
304 					completed = pca_repeated_start(adap);
305 			} else {
306 				DEB2("NOT ACK sent after data byte received. "
307 				     "Not final byte. numbytes %d. len %d\n",
308 				     numbytes, msg->len);
309 				pca_stop(adap);
310 				goto out;
311 			}
312 			break;
313 		case 0x70: /* Bus error - SDA stuck low */
314 			DEB2("BUS ERROR - SDA Stuck low\n");
315 			pca_reset(adap);
316 			goto out;
317 		case 0x78: /* Bus error - SCL stuck low (PCA9665) */
318 		case 0x90: /* Bus error - SCL stuck low (PCA9564) */
319 			DEB2("BUS ERROR - SCL Stuck low\n");
320 			pca_reset(adap);
321 			goto out;
322 		case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
323 			DEB2("BUS ERROR - Illegal START or STOP\n");
324 			pca_reset(adap);
325 			goto out;
326 		default:
327 			dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
328 			break;
329 		}
330 
331 		if (!completed)
332 			goto out;
333 	}
334 
335 	ret = curmsg;
336  out:
337 	DEB1("}}} transferred %d/%d messages. "
338 	     "status is %#04x. control is %#04x\n",
339 	     curmsg, num, pca_status(adap),
340 	     pca_get_con(adap));
341 	return ret;
342 }
343 
344 static u32 pca_func(struct i2c_adapter *adap)
345 {
346 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
347 }
348 
349 static const struct i2c_algorithm pca_algo = {
350 	.master_xfer	= pca_xfer,
351 	.functionality	= pca_func,
352 };
353 
354 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
355 {
356 	struct i2c_algo_pca_data *pca_data = adap->algo_data;
357 	/* The trick here is to check if there is an indirect register
358 	 * available. If there is one, we will read the value we first
359 	 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
360 	 * we wrote on I2C_PCA_ADR
361 	 */
362 	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
363 	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
364 	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
365 	pca_outw(pca_data, I2C_PCA_IND, 0x00);
366 	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
367 	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
368 		printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
369 		pca_data->chip = I2C_PCA_CHIP_9665;
370 	} else {
371 		printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
372 		pca_data->chip = I2C_PCA_CHIP_9564;
373 	}
374 	return pca_data->chip;
375 }
376 
377 static int pca_init(struct i2c_adapter *adap)
378 {
379 	struct i2c_algo_pca_data *pca_data = adap->algo_data;
380 
381 	adap->algo = &pca_algo;
382 
383 	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
384 		static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
385 		int clock;
386 
387 		if (pca_data->i2c_clock > 7) {
388 			switch (pca_data->i2c_clock) {
389 			case 330000:
390 				pca_data->i2c_clock = I2C_PCA_CON_330kHz;
391 				break;
392 			case 288000:
393 				pca_data->i2c_clock = I2C_PCA_CON_288kHz;
394 				break;
395 			case 217000:
396 				pca_data->i2c_clock = I2C_PCA_CON_217kHz;
397 				break;
398 			case 146000:
399 				pca_data->i2c_clock = I2C_PCA_CON_146kHz;
400 				break;
401 			case 88000:
402 				pca_data->i2c_clock = I2C_PCA_CON_88kHz;
403 				break;
404 			case 59000:
405 				pca_data->i2c_clock = I2C_PCA_CON_59kHz;
406 				break;
407 			case 44000:
408 				pca_data->i2c_clock = I2C_PCA_CON_44kHz;
409 				break;
410 			case 36000:
411 				pca_data->i2c_clock = I2C_PCA_CON_36kHz;
412 				break;
413 			default:
414 				printk(KERN_WARNING
415 					"%s: Invalid I2C clock speed selected."
416 					" Using default 59kHz.\n", adap->name);
417 			pca_data->i2c_clock = I2C_PCA_CON_59kHz;
418 			}
419 		} else {
420 			printk(KERN_WARNING "%s: "
421 				"Choosing the clock frequency based on "
422 				"index is deprecated."
423 				" Use the nominal frequency.\n", adap->name);
424 		}
425 
426 		pca_reset(pca_data);
427 
428 		clock = pca_clock(pca_data);
429 		printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
430 		     adap->name, freqs[clock]);
431 
432 		pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
433 	} else {
434 		int clock;
435 		int mode;
436 		int tlow, thi;
437 		/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
438 		int min_tlow, min_thi;
439 		/* These values are the maximum raise and fall values allowed
440 		 * by the I2C operation mode (Standard, Fast or Fast+)
441 		 * They are used (added) below to calculate the clock dividers
442 		 * of PCA9665. Note that they are slightly different of the
443 		 * real maximum, to allow the change on mode exactly on the
444 		 * maximum clock rate for each mode
445 		 */
446 		int raise_fall_time;
447 
448 		if (pca_data->i2c_clock > 1265800) {
449 			printk(KERN_WARNING "%s: I2C clock speed too high."
450 				" Using 1265.8kHz.\n", adap->name);
451 			pca_data->i2c_clock = 1265800;
452 		}
453 
454 		if (pca_data->i2c_clock < 60300) {
455 			printk(KERN_WARNING "%s: I2C clock speed too low."
456 				" Using 60.3kHz.\n", adap->name);
457 			pca_data->i2c_clock = 60300;
458 		}
459 
460 		/* To avoid integer overflow, use clock/100 for calculations */
461 		clock = pca_clock(pca_data) / 100;
462 
463 		if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_PLUS_FREQ) {
464 			mode = I2C_PCA_MODE_TURBO;
465 			min_tlow = 14;
466 			min_thi  = 5;
467 			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
468 		} else if (pca_data->i2c_clock > I2C_MAX_FAST_MODE_FREQ) {
469 			mode = I2C_PCA_MODE_FASTP;
470 			min_tlow = 17;
471 			min_thi  = 9;
472 			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
473 		} else if (pca_data->i2c_clock > I2C_MAX_STANDARD_MODE_FREQ) {
474 			mode = I2C_PCA_MODE_FAST;
475 			min_tlow = 44;
476 			min_thi  = 20;
477 			raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
478 		} else {
479 			mode = I2C_PCA_MODE_STD;
480 			min_tlow = 157;
481 			min_thi  = 134;
482 			raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
483 		}
484 
485 		/* The minimum clock that respects the thi/tlow = 134/157 is
486 		 * 64800 Hz. Below that, we have to fix the tlow to 255 and
487 		 * calculate the thi factor.
488 		 */
489 		if (clock < 648) {
490 			tlow = 255;
491 			thi = 1000000 - clock * raise_fall_time;
492 			thi /= (I2C_PCA_OSC_PER * clock) - tlow;
493 		} else {
494 			tlow = (1000000 - clock * raise_fall_time) * min_tlow;
495 			tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
496 			thi = tlow * min_thi / min_tlow;
497 		}
498 
499 		pca_reset(pca_data);
500 
501 		printk(KERN_INFO
502 		     "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
503 
504 		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
505 		pca_outw(pca_data, I2C_PCA_IND, mode);
506 		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
507 		pca_outw(pca_data, I2C_PCA_IND, tlow);
508 		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
509 		pca_outw(pca_data, I2C_PCA_IND, thi);
510 
511 		pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
512 	}
513 	udelay(500); /* 500 us for oscillator to stabilise */
514 
515 	return 0;
516 }
517 
518 /*
519  * registering functions to load algorithms at runtime
520  */
521 int i2c_pca_add_bus(struct i2c_adapter *adap)
522 {
523 	int rval;
524 
525 	rval = pca_init(adap);
526 	if (rval)
527 		return rval;
528 
529 	return i2c_add_adapter(adap);
530 }
531 EXPORT_SYMBOL(i2c_pca_add_bus);
532 
533 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
534 {
535 	int rval;
536 
537 	rval = pca_init(adap);
538 	if (rval)
539 		return rval;
540 
541 	return i2c_add_numbered_adapter(adap);
542 }
543 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
544 
545 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
546 MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
547 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
548 MODULE_LICENSE("GPL");
549 
550 module_param(i2c_debug, int, 0);
551