1 /* 2 * Intel(R) Trace Hub data structures 3 * 4 * Copyright (C) 2014-2015 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #ifndef __INTEL_TH_H__ 17 #define __INTEL_TH_H__ 18 19 /* intel_th_device device types */ 20 enum { 21 /* Devices that generate trace data */ 22 INTEL_TH_SOURCE = 0, 23 /* Output ports (MSC, PTI) */ 24 INTEL_TH_OUTPUT, 25 /* Switch, the Global Trace Hub (GTH) */ 26 INTEL_TH_SWITCH, 27 }; 28 29 /** 30 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices 31 * @port: output port number, assigned by the switch 32 * @type: GTH_{MSU,CTP,PTI} 33 * @scratchpad: scratchpad bits to flag when this output is enabled 34 * @multiblock: true for multiblock output configuration 35 * @active: true when this output is enabled 36 * 37 * Output port descriptor, used by switch driver to tell which output 38 * port this output device corresponds to. Filled in at output device's 39 * probe time by switch::assign(). Passed from output device driver to 40 * switch related code to enable/disable its port. 41 */ 42 struct intel_th_output { 43 int port; 44 unsigned int type; 45 unsigned int scratchpad; 46 bool multiblock; 47 bool active; 48 }; 49 50 /** 51 * struct intel_th_device - device on the intel_th bus 52 * @dev: device 53 * @resource: array of resources available to this device 54 * @num_resources: number of resources in @resource array 55 * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH} 56 * @id: device instance or -1 57 * @output: output descriptor for INTEL_TH_OUTPUT devices 58 * @name: device name to match the driver 59 */ 60 struct intel_th_device { 61 struct device dev; 62 struct resource *resource; 63 unsigned int num_resources; 64 unsigned int type; 65 int id; 66 67 /* INTEL_TH_OUTPUT specific */ 68 struct intel_th_output output; 69 70 char name[]; 71 }; 72 73 #define to_intel_th_device(_d) \ 74 container_of((_d), struct intel_th_device, dev) 75 76 /** 77 * intel_th_device_get_resource() - obtain @num'th resource of type @type 78 * @thdev: the device to search the resource for 79 * @type: resource type 80 * @num: number of the resource 81 */ 82 static inline struct resource * 83 intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type, 84 unsigned int num) 85 { 86 int i; 87 88 for (i = 0; i < thdev->num_resources; i++) 89 if (resource_type(&thdev->resource[i]) == type && !num--) 90 return &thdev->resource[i]; 91 92 return NULL; 93 } 94 95 /** 96 * intel_th_output_assigned() - if an output device is assigned to a switch port 97 * @thdev: the output device 98 * 99 * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port 100 */ 101 static inline bool 102 intel_th_output_assigned(struct intel_th_device *thdev) 103 { 104 return thdev->type == INTEL_TH_OUTPUT && 105 thdev->output.port >= 0; 106 } 107 108 /** 109 * struct intel_th_driver - driver for an intel_th_device device 110 * @driver: generic driver 111 * @probe: probe method 112 * @remove: remove method 113 * @assign: match a given output type device against available outputs 114 * @unassign: deassociate an output type device from an output port 115 * @enable: enable tracing for a given output device 116 * @disable: disable tracing for a given output device 117 * @fops: file operations for device nodes 118 * @attr_group: attributes provided by the driver 119 * 120 * Callbacks @probe and @remove are required for all device types. 121 * Switch device driver needs to fill in @assign, @enable and @disable 122 * callbacks. 123 */ 124 struct intel_th_driver { 125 struct device_driver driver; 126 int (*probe)(struct intel_th_device *thdev); 127 void (*remove)(struct intel_th_device *thdev); 128 /* switch (GTH) ops */ 129 int (*assign)(struct intel_th_device *thdev, 130 struct intel_th_device *othdev); 131 void (*unassign)(struct intel_th_device *thdev, 132 struct intel_th_device *othdev); 133 void (*enable)(struct intel_th_device *thdev, 134 struct intel_th_output *output); 135 void (*disable)(struct intel_th_device *thdev, 136 struct intel_th_output *output); 137 /* output ops */ 138 void (*irq)(struct intel_th_device *thdev); 139 int (*activate)(struct intel_th_device *thdev); 140 void (*deactivate)(struct intel_th_device *thdev); 141 /* file_operations for those who want a device node */ 142 const struct file_operations *fops; 143 /* optional attributes */ 144 struct attribute_group *attr_group; 145 146 /* source ops */ 147 int (*set_output)(struct intel_th_device *thdev, 148 unsigned int master); 149 }; 150 151 #define to_intel_th_driver(_d) \ 152 container_of((_d), struct intel_th_driver, driver) 153 154 #define to_intel_th_driver_or_null(_d) \ 155 ((_d) ? to_intel_th_driver(_d) : NULL) 156 157 static inline struct intel_th_device * 158 to_intel_th_hub(struct intel_th_device *thdev) 159 { 160 struct device *parent = thdev->dev.parent; 161 162 if (!parent) 163 return NULL; 164 165 return to_intel_th_device(parent); 166 } 167 168 struct intel_th * 169 intel_th_alloc(struct device *dev, struct resource *devres, 170 unsigned int ndevres, int irq); 171 void intel_th_free(struct intel_th *th); 172 173 int intel_th_driver_register(struct intel_th_driver *thdrv); 174 void intel_th_driver_unregister(struct intel_th_driver *thdrv); 175 176 int intel_th_trace_enable(struct intel_th_device *thdev); 177 int intel_th_trace_disable(struct intel_th_device *thdev); 178 int intel_th_set_output(struct intel_th_device *thdev, 179 unsigned int master); 180 181 enum { 182 TH_MMIO_CONFIG = 0, 183 TH_MMIO_SW = 2, 184 TH_MMIO_END, 185 }; 186 187 #define TH_SUBDEVICE_MAX 6 188 #define TH_POSSIBLE_OUTPUTS 8 189 #define TH_CONFIGURABLE_MASTERS 256 190 #define TH_MSC_MAX 2 191 192 /** 193 * struct intel_th - Intel TH controller 194 * @dev: driver core's device 195 * @thdev: subdevices 196 * @hub: "switch" subdevice (GTH) 197 * @id: this Intel TH controller's device ID in the system 198 * @major: device node major for output devices 199 */ 200 struct intel_th { 201 struct device *dev; 202 203 struct intel_th_device *thdev[TH_SUBDEVICE_MAX]; 204 struct intel_th_device *hub; 205 206 int id; 207 int major; 208 #ifdef CONFIG_INTEL_TH_DEBUG 209 struct dentry *dbg; 210 #endif 211 }; 212 213 /* 214 * Register windows 215 */ 216 enum { 217 /* Global Trace Hub (GTH) */ 218 REG_GTH_OFFSET = 0x0000, 219 REG_GTH_LENGTH = 0x2000, 220 221 /* Software Trace Hub (STH) [0x4000..0x4fff] */ 222 REG_STH_OFFSET = 0x4000, 223 REG_STH_LENGTH = 0x2000, 224 225 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */ 226 REG_MSU_OFFSET = 0xa0000, 227 REG_MSU_LENGTH = 0x02000, 228 229 /* Internal MSU trace buffer [0x80000..0x9ffff] */ 230 BUF_MSU_OFFSET = 0x80000, 231 BUF_MSU_LENGTH = 0x20000, 232 233 /* PTI output == same window as GTH */ 234 REG_PTI_OFFSET = REG_GTH_OFFSET, 235 REG_PTI_LENGTH = REG_GTH_LENGTH, 236 237 /* DCI Handler (DCIH) == some window as MSU */ 238 REG_DCIH_OFFSET = REG_MSU_OFFSET, 239 REG_DCIH_LENGTH = REG_MSU_LENGTH, 240 }; 241 242 /* 243 * GTH, output ports configuration 244 */ 245 enum { 246 GTH_NONE = 0, 247 GTH_MSU, /* memory/usb */ 248 GTH_CTP, /* Common Trace Port */ 249 GTH_PTI = 4, /* MIPI-PTI */ 250 }; 251 252 /* 253 * Scratchpad bits: tell firmware and external debuggers 254 * what we are up to. 255 */ 256 enum { 257 /* Memory is the primary destination */ 258 SCRPD_MEM_IS_PRIM_DEST = BIT(0), 259 /* XHCI DbC is the primary destination */ 260 SCRPD_DBC_IS_PRIM_DEST = BIT(1), 261 /* PTI is the primary destination */ 262 SCRPD_PTI_IS_PRIM_DEST = BIT(2), 263 /* BSSB is the primary destination */ 264 SCRPD_BSSB_IS_PRIM_DEST = BIT(3), 265 /* PTI is the alternate destination */ 266 SCRPD_PTI_IS_ALT_DEST = BIT(4), 267 /* BSSB is the alternate destination */ 268 SCRPD_BSSB_IS_ALT_DEST = BIT(5), 269 /* DeepSx exit occurred */ 270 SCRPD_DEEPSX_EXIT = BIT(6), 271 /* S4 exit occurred */ 272 SCRPD_S4_EXIT = BIT(7), 273 /* S5 exit occurred */ 274 SCRPD_S5_EXIT = BIT(8), 275 /* MSU controller 0/1 is enabled */ 276 SCRPD_MSC0_IS_ENABLED = BIT(9), 277 SCRPD_MSC1_IS_ENABLED = BIT(10), 278 /* Sx exit occurred */ 279 SCRPD_SX_EXIT = BIT(11), 280 /* Trigger Unit is enabled */ 281 SCRPD_TRIGGER_IS_ENABLED = BIT(12), 282 SCRPD_ODLA_IS_ENABLED = BIT(13), 283 SCRPD_SOCHAP_IS_ENABLED = BIT(14), 284 SCRPD_STH_IS_ENABLED = BIT(15), 285 SCRPD_DCIH_IS_ENABLED = BIT(16), 286 SCRPD_VER_IS_ENABLED = BIT(17), 287 /* External debugger is using Intel TH */ 288 SCRPD_DEBUGGER_IN_USE = BIT(24), 289 }; 290 291 #endif 292