1 /* 2 * Intel(R) Trace Hub data structures 3 * 4 * Copyright (C) 2014-2015 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #ifndef __INTEL_TH_H__ 17 #define __INTEL_TH_H__ 18 19 /* intel_th_device device types */ 20 enum { 21 /* Devices that generate trace data */ 22 INTEL_TH_SOURCE = 0, 23 /* Output ports (MSC, PTI) */ 24 INTEL_TH_OUTPUT, 25 /* Switch, the Global Trace Hub (GTH) */ 26 INTEL_TH_SWITCH, 27 }; 28 29 /** 30 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices 31 * @port: output port number, assigned by the switch 32 * @type: GTH_{MSU,CTP,PTI} 33 * @scratchpad: scratchpad bits to flag when this output is enabled 34 * @multiblock: true for multiblock output configuration 35 * @active: true when this output is enabled 36 * 37 * Output port descriptor, used by switch driver to tell which output 38 * port this output device corresponds to. Filled in at output device's 39 * probe time by switch::assign(). Passed from output device driver to 40 * switch related code to enable/disable its port. 41 */ 42 struct intel_th_output { 43 int port; 44 unsigned int type; 45 unsigned int scratchpad; 46 bool multiblock; 47 bool active; 48 }; 49 50 /** 51 * struct intel_th_device - device on the intel_th bus 52 * @dev: device 53 * @resource: array of resources available to this device 54 * @num_resources: number of resources in @resource array 55 * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH} 56 * @id: device instance or -1 57 * @host_mode: Intel TH is controlled by an external debug host 58 * @output: output descriptor for INTEL_TH_OUTPUT devices 59 * @name: device name to match the driver 60 */ 61 struct intel_th_device { 62 struct device dev; 63 struct resource *resource; 64 unsigned int num_resources; 65 unsigned int type; 66 int id; 67 68 /* INTEL_TH_SWITCH specific */ 69 bool host_mode; 70 71 /* INTEL_TH_OUTPUT specific */ 72 struct intel_th_output output; 73 74 char name[]; 75 }; 76 77 #define to_intel_th_device(_d) \ 78 container_of((_d), struct intel_th_device, dev) 79 80 /** 81 * intel_th_device_get_resource() - obtain @num'th resource of type @type 82 * @thdev: the device to search the resource for 83 * @type: resource type 84 * @num: number of the resource 85 */ 86 static inline struct resource * 87 intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type, 88 unsigned int num) 89 { 90 int i; 91 92 for (i = 0; i < thdev->num_resources; i++) 93 if (resource_type(&thdev->resource[i]) == type && !num--) 94 return &thdev->resource[i]; 95 96 return NULL; 97 } 98 99 /** 100 * intel_th_output_assigned() - if an output device is assigned to a switch port 101 * @thdev: the output device 102 * 103 * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port 104 */ 105 static inline bool 106 intel_th_output_assigned(struct intel_th_device *thdev) 107 { 108 return thdev->type == INTEL_TH_OUTPUT && 109 thdev->output.port >= 0; 110 } 111 112 /** 113 * struct intel_th_driver - driver for an intel_th_device device 114 * @driver: generic driver 115 * @probe: probe method 116 * @remove: remove method 117 * @assign: match a given output type device against available outputs 118 * @unassign: deassociate an output type device from an output port 119 * @enable: enable tracing for a given output device 120 * @disable: disable tracing for a given output device 121 * @irq: interrupt callback 122 * @activate: enable tracing on the output's side 123 * @deactivate: disable tracing on the output's side 124 * @fops: file operations for device nodes 125 * @attr_group: attributes provided by the driver 126 * 127 * Callbacks @probe and @remove are required for all device types. 128 * Switch device driver needs to fill in @assign, @enable and @disable 129 * callbacks. 130 */ 131 struct intel_th_driver { 132 struct device_driver driver; 133 int (*probe)(struct intel_th_device *thdev); 134 void (*remove)(struct intel_th_device *thdev); 135 /* switch (GTH) ops */ 136 int (*assign)(struct intel_th_device *thdev, 137 struct intel_th_device *othdev); 138 void (*unassign)(struct intel_th_device *thdev, 139 struct intel_th_device *othdev); 140 void (*enable)(struct intel_th_device *thdev, 141 struct intel_th_output *output); 142 void (*disable)(struct intel_th_device *thdev, 143 struct intel_th_output *output); 144 /* output ops */ 145 void (*irq)(struct intel_th_device *thdev); 146 int (*activate)(struct intel_th_device *thdev); 147 void (*deactivate)(struct intel_th_device *thdev); 148 /* file_operations for those who want a device node */ 149 const struct file_operations *fops; 150 /* optional attributes */ 151 struct attribute_group *attr_group; 152 153 /* source ops */ 154 int (*set_output)(struct intel_th_device *thdev, 155 unsigned int master); 156 }; 157 158 #define to_intel_th_driver(_d) \ 159 container_of((_d), struct intel_th_driver, driver) 160 161 #define to_intel_th_driver_or_null(_d) \ 162 ((_d) ? to_intel_th_driver(_d) : NULL) 163 164 static inline struct intel_th_device * 165 to_intel_th_hub(struct intel_th_device *thdev) 166 { 167 struct device *parent = thdev->dev.parent; 168 169 if (!parent) 170 return NULL; 171 172 return to_intel_th_device(parent); 173 } 174 175 struct intel_th * 176 intel_th_alloc(struct device *dev, struct resource *devres, 177 unsigned int ndevres, int irq); 178 void intel_th_free(struct intel_th *th); 179 180 int intel_th_driver_register(struct intel_th_driver *thdrv); 181 void intel_th_driver_unregister(struct intel_th_driver *thdrv); 182 183 int intel_th_trace_enable(struct intel_th_device *thdev); 184 int intel_th_trace_disable(struct intel_th_device *thdev); 185 int intel_th_set_output(struct intel_th_device *thdev, 186 unsigned int master); 187 188 enum { 189 TH_MMIO_CONFIG = 0, 190 TH_MMIO_SW = 2, 191 TH_MMIO_END, 192 }; 193 194 #define TH_SUBDEVICE_MAX 6 195 #define TH_POSSIBLE_OUTPUTS 8 196 #define TH_CONFIGURABLE_MASTERS 256 197 #define TH_MSC_MAX 2 198 199 /** 200 * struct intel_th - Intel TH controller 201 * @dev: driver core's device 202 * @thdev: subdevices 203 * @hub: "switch" subdevice (GTH) 204 * @id: this Intel TH controller's device ID in the system 205 * @major: device node major for output devices 206 */ 207 struct intel_th { 208 struct device *dev; 209 210 struct intel_th_device *thdev[TH_SUBDEVICE_MAX]; 211 struct intel_th_device *hub; 212 213 int id; 214 int major; 215 #ifdef CONFIG_MODULES 216 struct work_struct request_module_work; 217 #endif /* CONFIG_MODULES */ 218 #ifdef CONFIG_INTEL_TH_DEBUG 219 struct dentry *dbg; 220 #endif 221 }; 222 223 /* 224 * Register windows 225 */ 226 enum { 227 /* Global Trace Hub (GTH) */ 228 REG_GTH_OFFSET = 0x0000, 229 REG_GTH_LENGTH = 0x2000, 230 231 /* Software Trace Hub (STH) [0x4000..0x4fff] */ 232 REG_STH_OFFSET = 0x4000, 233 REG_STH_LENGTH = 0x2000, 234 235 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */ 236 REG_MSU_OFFSET = 0xa0000, 237 REG_MSU_LENGTH = 0x02000, 238 239 /* Internal MSU trace buffer [0x80000..0x9ffff] */ 240 BUF_MSU_OFFSET = 0x80000, 241 BUF_MSU_LENGTH = 0x20000, 242 243 /* PTI output == same window as GTH */ 244 REG_PTI_OFFSET = REG_GTH_OFFSET, 245 REG_PTI_LENGTH = REG_GTH_LENGTH, 246 247 /* DCI Handler (DCIH) == some window as MSU */ 248 REG_DCIH_OFFSET = REG_MSU_OFFSET, 249 REG_DCIH_LENGTH = REG_MSU_LENGTH, 250 }; 251 252 /* 253 * GTH, output ports configuration 254 */ 255 enum { 256 GTH_NONE = 0, 257 GTH_MSU, /* memory/usb */ 258 GTH_CTP, /* Common Trace Port */ 259 GTH_PTI = 4, /* MIPI-PTI */ 260 }; 261 262 /* 263 * Scratchpad bits: tell firmware and external debuggers 264 * what we are up to. 265 */ 266 enum { 267 /* Memory is the primary destination */ 268 SCRPD_MEM_IS_PRIM_DEST = BIT(0), 269 /* XHCI DbC is the primary destination */ 270 SCRPD_DBC_IS_PRIM_DEST = BIT(1), 271 /* PTI is the primary destination */ 272 SCRPD_PTI_IS_PRIM_DEST = BIT(2), 273 /* BSSB is the primary destination */ 274 SCRPD_BSSB_IS_PRIM_DEST = BIT(3), 275 /* PTI is the alternate destination */ 276 SCRPD_PTI_IS_ALT_DEST = BIT(4), 277 /* BSSB is the alternate destination */ 278 SCRPD_BSSB_IS_ALT_DEST = BIT(5), 279 /* DeepSx exit occurred */ 280 SCRPD_DEEPSX_EXIT = BIT(6), 281 /* S4 exit occurred */ 282 SCRPD_S4_EXIT = BIT(7), 283 /* S5 exit occurred */ 284 SCRPD_S5_EXIT = BIT(8), 285 /* MSU controller 0/1 is enabled */ 286 SCRPD_MSC0_IS_ENABLED = BIT(9), 287 SCRPD_MSC1_IS_ENABLED = BIT(10), 288 /* Sx exit occurred */ 289 SCRPD_SX_EXIT = BIT(11), 290 /* Trigger Unit is enabled */ 291 SCRPD_TRIGGER_IS_ENABLED = BIT(12), 292 SCRPD_ODLA_IS_ENABLED = BIT(13), 293 SCRPD_SOCHAP_IS_ENABLED = BIT(14), 294 SCRPD_STH_IS_ENABLED = BIT(15), 295 SCRPD_DCIH_IS_ENABLED = BIT(16), 296 SCRPD_VER_IS_ENABLED = BIT(17), 297 /* External debugger is using Intel TH */ 298 SCRPD_DEBUGGER_IN_USE = BIT(24), 299 }; 300 301 #endif 302