1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Intel(R) Trace Hub data structures 4 * 5 * Copyright (C) 2014-2015 Intel Corporation. 6 */ 7 8 #ifndef __INTEL_TH_H__ 9 #define __INTEL_TH_H__ 10 11 /* intel_th_device device types */ 12 enum { 13 /* Devices that generate trace data */ 14 INTEL_TH_SOURCE = 0, 15 /* Output ports (MSC, PTI) */ 16 INTEL_TH_OUTPUT, 17 /* Switch, the Global Trace Hub (GTH) */ 18 INTEL_TH_SWITCH, 19 }; 20 21 /** 22 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices 23 * @port: output port number, assigned by the switch 24 * @type: GTH_{MSU,CTP,PTI} 25 * @scratchpad: scratchpad bits to flag when this output is enabled 26 * @multiblock: true for multiblock output configuration 27 * @active: true when this output is enabled 28 * 29 * Output port descriptor, used by switch driver to tell which output 30 * port this output device corresponds to. Filled in at output device's 31 * probe time by switch::assign(). Passed from output device driver to 32 * switch related code to enable/disable its port. 33 */ 34 struct intel_th_output { 35 int port; 36 unsigned int type; 37 unsigned int scratchpad; 38 bool multiblock; 39 bool active; 40 }; 41 42 /** 43 * struct intel_th_drvdata - describes hardware capabilities and quirks 44 * @tscu_enable: device needs SW to enable time stamping unit 45 * @host_mode_only: device can only operate in 'host debugger' mode 46 */ 47 struct intel_th_drvdata { 48 unsigned int tscu_enable : 1, 49 host_mode_only : 1; 50 }; 51 52 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0) 53 54 /** 55 * struct intel_th_device - device on the intel_th bus 56 * @dev: device 57 * @drvdata: hardware capabilities/quirks 58 * @resource: array of resources available to this device 59 * @num_resources: number of resources in @resource array 60 * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH} 61 * @id: device instance or -1 62 * @host_mode: Intel TH is controlled by an external debug host 63 * @output: output descriptor for INTEL_TH_OUTPUT devices 64 * @name: device name to match the driver 65 */ 66 struct intel_th_device { 67 struct device dev; 68 struct intel_th_drvdata *drvdata; 69 struct resource *resource; 70 unsigned int num_resources; 71 unsigned int type; 72 int id; 73 74 /* INTEL_TH_SWITCH specific */ 75 bool host_mode; 76 77 /* INTEL_TH_OUTPUT specific */ 78 struct intel_th_output output; 79 80 char name[]; 81 }; 82 83 #define to_intel_th_device(_d) \ 84 container_of((_d), struct intel_th_device, dev) 85 86 /** 87 * intel_th_device_get_resource() - obtain @num'th resource of type @type 88 * @thdev: the device to search the resource for 89 * @type: resource type 90 * @num: number of the resource 91 */ 92 static inline struct resource * 93 intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type, 94 unsigned int num) 95 { 96 int i; 97 98 for (i = 0; i < thdev->num_resources; i++) 99 if (resource_type(&thdev->resource[i]) == type && !num--) 100 return &thdev->resource[i]; 101 102 return NULL; 103 } 104 105 /* 106 * GTH, output ports configuration 107 */ 108 enum { 109 GTH_NONE = 0, 110 GTH_MSU, /* memory/usb */ 111 GTH_CTP, /* Common Trace Port */ 112 GTH_LPP, /* Low Power Path */ 113 GTH_PTI, /* MIPI-PTI */ 114 }; 115 116 /** 117 * intel_th_output_assigned() - if an output device is assigned to a switch port 118 * @thdev: the output device 119 * 120 * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port 121 */ 122 static inline bool 123 intel_th_output_assigned(struct intel_th_device *thdev) 124 { 125 return thdev->type == INTEL_TH_OUTPUT && 126 (thdev->output.port >= 0 || 127 thdev->output.type == GTH_NONE); 128 } 129 130 /** 131 * struct intel_th_driver - driver for an intel_th_device device 132 * @driver: generic driver 133 * @probe: probe method 134 * @remove: remove method 135 * @assign: match a given output type device against available outputs 136 * @unassign: deassociate an output type device from an output port 137 * @enable: enable tracing for a given output device 138 * @disable: disable tracing for a given output device 139 * @irq: interrupt callback 140 * @activate: enable tracing on the output's side 141 * @deactivate: disable tracing on the output's side 142 * @fops: file operations for device nodes 143 * @attr_group: attributes provided by the driver 144 * 145 * Callbacks @probe and @remove are required for all device types. 146 * Switch device driver needs to fill in @assign, @enable and @disable 147 * callbacks. 148 */ 149 struct intel_th_driver { 150 struct device_driver driver; 151 int (*probe)(struct intel_th_device *thdev); 152 void (*remove)(struct intel_th_device *thdev); 153 /* switch (GTH) ops */ 154 int (*assign)(struct intel_th_device *thdev, 155 struct intel_th_device *othdev); 156 void (*unassign)(struct intel_th_device *thdev, 157 struct intel_th_device *othdev); 158 void (*enable)(struct intel_th_device *thdev, 159 struct intel_th_output *output); 160 void (*disable)(struct intel_th_device *thdev, 161 struct intel_th_output *output); 162 /* output ops */ 163 void (*irq)(struct intel_th_device *thdev); 164 int (*activate)(struct intel_th_device *thdev); 165 void (*deactivate)(struct intel_th_device *thdev); 166 /* file_operations for those who want a device node */ 167 const struct file_operations *fops; 168 /* optional attributes */ 169 struct attribute_group *attr_group; 170 171 /* source ops */ 172 int (*set_output)(struct intel_th_device *thdev, 173 unsigned int master); 174 }; 175 176 #define to_intel_th_driver(_d) \ 177 container_of((_d), struct intel_th_driver, driver) 178 179 #define to_intel_th_driver_or_null(_d) \ 180 ((_d) ? to_intel_th_driver(_d) : NULL) 181 182 /* 183 * Subdevice tree structure is as follows: 184 * + struct intel_th device (pci; dev_{get,set}_drvdata() 185 * + struct intel_th_device INTEL_TH_SWITCH (GTH) 186 * + struct intel_th_device INTEL_TH_OUTPUT (MSU, PTI) 187 * + struct intel_th_device INTEL_TH_SOURCE (STH) 188 * 189 * In other words, INTEL_TH_OUTPUT devices are children of INTEL_TH_SWITCH; 190 * INTEL_TH_SWITCH and INTEL_TH_SOURCE are children of the intel_th device. 191 */ 192 static inline struct intel_th_device * 193 to_intel_th_parent(struct intel_th_device *thdev) 194 { 195 struct device *parent = thdev->dev.parent; 196 197 if (!parent) 198 return NULL; 199 200 return to_intel_th_device(parent); 201 } 202 203 static inline struct intel_th *to_intel_th(struct intel_th_device *thdev) 204 { 205 if (thdev->type == INTEL_TH_OUTPUT) 206 thdev = to_intel_th_parent(thdev); 207 208 if (WARN_ON_ONCE(!thdev || thdev->type == INTEL_TH_OUTPUT)) 209 return NULL; 210 211 return dev_get_drvdata(thdev->dev.parent); 212 } 213 214 struct intel_th * 215 intel_th_alloc(struct device *dev, struct intel_th_drvdata *drvdata, 216 struct resource *devres, unsigned int ndevres, int irq); 217 void intel_th_free(struct intel_th *th); 218 219 int intel_th_driver_register(struct intel_th_driver *thdrv); 220 void intel_th_driver_unregister(struct intel_th_driver *thdrv); 221 222 int intel_th_trace_enable(struct intel_th_device *thdev); 223 int intel_th_trace_disable(struct intel_th_device *thdev); 224 int intel_th_set_output(struct intel_th_device *thdev, 225 unsigned int master); 226 int intel_th_output_enable(struct intel_th *th, unsigned int otype); 227 228 enum { 229 TH_MMIO_CONFIG = 0, 230 TH_MMIO_SW = 2, 231 TH_MMIO_END, 232 }; 233 234 #define TH_POSSIBLE_OUTPUTS 8 235 /* Total number of possible subdevices: outputs + GTH + STH */ 236 #define TH_SUBDEVICE_MAX (TH_POSSIBLE_OUTPUTS + 2) 237 #define TH_CONFIGURABLE_MASTERS 256 238 #define TH_MSC_MAX 2 239 240 /** 241 * struct intel_th - Intel TH controller 242 * @dev: driver core's device 243 * @thdev: subdevices 244 * @hub: "switch" subdevice (GTH) 245 * @resource: resources of the entire controller 246 * @num_thdevs: number of devices in the @thdev array 247 * @num_resources: number or resources in the @resource array 248 * @irq: irq number 249 * @id: this Intel TH controller's device ID in the system 250 * @major: device node major for output devices 251 */ 252 struct intel_th { 253 struct device *dev; 254 255 struct intel_th_device *thdev[TH_SUBDEVICE_MAX]; 256 struct intel_th_device *hub; 257 struct intel_th_drvdata *drvdata; 258 259 struct resource *resource; 260 int (*activate)(struct intel_th *); 261 void (*deactivate)(struct intel_th *); 262 unsigned int num_thdevs; 263 unsigned int num_resources; 264 int irq; 265 266 int id; 267 int major; 268 #ifdef CONFIG_MODULES 269 struct work_struct request_module_work; 270 #endif /* CONFIG_MODULES */ 271 #ifdef CONFIG_INTEL_TH_DEBUG 272 struct dentry *dbg; 273 #endif 274 }; 275 276 static inline struct intel_th_device * 277 to_intel_th_hub(struct intel_th_device *thdev) 278 { 279 if (thdev->type == INTEL_TH_SWITCH) 280 return thdev; 281 else if (thdev->type == INTEL_TH_OUTPUT) 282 return to_intel_th_parent(thdev); 283 284 return to_intel_th(thdev)->hub; 285 } 286 287 /* 288 * Register windows 289 */ 290 enum { 291 /* Global Trace Hub (GTH) */ 292 REG_GTH_OFFSET = 0x0000, 293 REG_GTH_LENGTH = 0x2000, 294 295 /* Timestamp counter unit (TSCU) */ 296 REG_TSCU_OFFSET = 0x2000, 297 REG_TSCU_LENGTH = 0x1000, 298 299 /* Software Trace Hub (STH) [0x4000..0x4fff] */ 300 REG_STH_OFFSET = 0x4000, 301 REG_STH_LENGTH = 0x2000, 302 303 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */ 304 REG_MSU_OFFSET = 0xa0000, 305 REG_MSU_LENGTH = 0x02000, 306 307 /* Internal MSU trace buffer [0x80000..0x9ffff] */ 308 BUF_MSU_OFFSET = 0x80000, 309 BUF_MSU_LENGTH = 0x20000, 310 311 /* PTI output == same window as GTH */ 312 REG_PTI_OFFSET = REG_GTH_OFFSET, 313 REG_PTI_LENGTH = REG_GTH_LENGTH, 314 315 /* DCI Handler (DCIH) == some window as MSU */ 316 REG_DCIH_OFFSET = REG_MSU_OFFSET, 317 REG_DCIH_LENGTH = REG_MSU_LENGTH, 318 }; 319 320 /* 321 * Scratchpad bits: tell firmware and external debuggers 322 * what we are up to. 323 */ 324 enum { 325 /* Memory is the primary destination */ 326 SCRPD_MEM_IS_PRIM_DEST = BIT(0), 327 /* XHCI DbC is the primary destination */ 328 SCRPD_DBC_IS_PRIM_DEST = BIT(1), 329 /* PTI is the primary destination */ 330 SCRPD_PTI_IS_PRIM_DEST = BIT(2), 331 /* BSSB is the primary destination */ 332 SCRPD_BSSB_IS_PRIM_DEST = BIT(3), 333 /* PTI is the alternate destination */ 334 SCRPD_PTI_IS_ALT_DEST = BIT(4), 335 /* BSSB is the alternate destination */ 336 SCRPD_BSSB_IS_ALT_DEST = BIT(5), 337 /* DeepSx exit occurred */ 338 SCRPD_DEEPSX_EXIT = BIT(6), 339 /* S4 exit occurred */ 340 SCRPD_S4_EXIT = BIT(7), 341 /* S5 exit occurred */ 342 SCRPD_S5_EXIT = BIT(8), 343 /* MSU controller 0/1 is enabled */ 344 SCRPD_MSC0_IS_ENABLED = BIT(9), 345 SCRPD_MSC1_IS_ENABLED = BIT(10), 346 /* Sx exit occurred */ 347 SCRPD_SX_EXIT = BIT(11), 348 /* Trigger Unit is enabled */ 349 SCRPD_TRIGGER_IS_ENABLED = BIT(12), 350 SCRPD_ODLA_IS_ENABLED = BIT(13), 351 SCRPD_SOCHAP_IS_ENABLED = BIT(14), 352 SCRPD_STH_IS_ENABLED = BIT(15), 353 SCRPD_DCIH_IS_ENABLED = BIT(16), 354 SCRPD_VER_IS_ENABLED = BIT(17), 355 /* External debugger is using Intel TH */ 356 SCRPD_DEBUGGER_IN_USE = BIT(24), 357 }; 358 359 #endif 360