1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
239f40346SAlexander Shishkinconfig INTEL_TH
339f40346SAlexander Shishkin	tristate "Intel(R) Trace Hub controller"
4993c7f11SAlexander Shishkin	depends on HAS_DMA && HAS_IOMEM
539f40346SAlexander Shishkin	help
639f40346SAlexander Shishkin	  Intel(R) Trace Hub (TH) is a set of hardware blocks (subdevices) that
739f40346SAlexander Shishkin	  produce, switch and output trace data from multiple hardware and
839f40346SAlexander Shishkin	  software sources over several types of trace output ports encoded
939f40346SAlexander Shishkin	  in System Trace Protocol (MIPI STPv2) and is intended to perform
1039f40346SAlexander Shishkin	  full system debugging.
1139f40346SAlexander Shishkin
1239f40346SAlexander Shishkin	  This option enables intel_th bus and common code used by TH
1339f40346SAlexander Shishkin	  subdevices to interact with each other and hardware and for
1439f40346SAlexander Shishkin	  platform glue layers to drive Intel TH devices.
1539f40346SAlexander Shishkin
1639f40346SAlexander Shishkin	  Say Y here to enable Intel(R) Trace Hub controller support.
1739f40346SAlexander Shishkin
1839f40346SAlexander Shishkinif INTEL_TH
1939f40346SAlexander Shishkin
202b0b16d3SAlexander Shishkinconfig INTEL_TH_PCI
212b0b16d3SAlexander Shishkin	tristate "Intel(R) Trace Hub PCI controller"
222b0b16d3SAlexander Shishkin	depends on PCI
232b0b16d3SAlexander Shishkin	help
242b0b16d3SAlexander Shishkin	  Intel(R) Trace Hub may exist as a PCI device. This option enables
252b0b16d3SAlexander Shishkin	  support glue layer for PCI-based Intel TH.
262b0b16d3SAlexander Shishkin
272b0b16d3SAlexander Shishkin	  Say Y here to enable PCI Intel TH support.
282b0b16d3SAlexander Shishkin
29ebc57e39SAlexander Shishkinconfig INTEL_TH_ACPI
30ebc57e39SAlexander Shishkin	tristate "Intel(R) Trace Hub ACPI controller"
31ebc57e39SAlexander Shishkin	depends on ACPI
32ebc57e39SAlexander Shishkin	help
33ebc57e39SAlexander Shishkin	  Intel(R) Trace Hub may exist as an ACPI device. This option enables
34ebc57e39SAlexander Shishkin	  support glue layer for ACPI-based Intel TH. This typically implies
35ebc57e39SAlexander Shishkin	  'host debugger' mode, that is, the trace configuration and capture
36ebc57e39SAlexander Shishkin	  is handled by an external debug host and corresponding controls will
37ebc57e39SAlexander Shishkin	  not be available on the target.
38ebc57e39SAlexander Shishkin
39ebc57e39SAlexander Shishkin	  Say Y here to enable ACPI Intel TH support.
40ebc57e39SAlexander Shishkin
41b27a6a3fSAlexander Shishkinconfig INTEL_TH_GTH
42b27a6a3fSAlexander Shishkin	tristate "Intel(R) Trace Hub Global Trace Hub"
43b27a6a3fSAlexander Shishkin	help
44b27a6a3fSAlexander Shishkin	  Global Trace Hub (GTH) is the central component of the
45b27a6a3fSAlexander Shishkin	  Intel TH infrastructure and acts as a switch for source
46b27a6a3fSAlexander Shishkin	  and output devices. This driver is required for other
47b27a6a3fSAlexander Shishkin	  Intel TH subdevices to initialize.
48b27a6a3fSAlexander Shishkin
49b27a6a3fSAlexander Shishkin	  Say Y here to enable GTH subdevice of Intel(R) Trace Hub.
50b27a6a3fSAlexander Shishkin
51f04e449fSAlexander Shishkinconfig INTEL_TH_STH
52f04e449fSAlexander Shishkin	tristate "Intel(R) Trace Hub Software Trace Hub support"
53f04e449fSAlexander Shishkin	depends on STM
54f04e449fSAlexander Shishkin	help
55f04e449fSAlexander Shishkin	  Software Trace Hub (STH) enables trace data from software
56f04e449fSAlexander Shishkin	  trace sources to be sent out via Intel(R) Trace Hub. It
57f04e449fSAlexander Shishkin	  uses stm class device to interface with its sources.
58f04e449fSAlexander Shishkin
59f04e449fSAlexander Shishkin	  Say Y here to enable STH subdevice of Intel(R) Trace Hub.
60f04e449fSAlexander Shishkin
61ba82664cSAlexander Shishkinconfig INTEL_TH_MSU
62ba82664cSAlexander Shishkin	tristate "Intel(R) Trace Hub Memory Storage Unit"
63ba82664cSAlexander Shishkin	help
64ba82664cSAlexander Shishkin	  Memory Storage Unit (MSU) trace output device enables
65ba82664cSAlexander Shishkin	  storing STP traces to system memory. It supports single
66ba82664cSAlexander Shishkin	  and multiblock modes of operation and provides read()
67ba82664cSAlexander Shishkin	  and mmap() access to the collected data.
68ba82664cSAlexander Shishkin
69ba82664cSAlexander Shishkin	  Say Y here to enable MSU output device for Intel TH.
70ba82664cSAlexander Shishkin
7114cdbf04SAlexander Shishkinconfig INTEL_TH_PTI
7214cdbf04SAlexander Shishkin	tristate "Intel(R) Trace Hub PTI output"
7314cdbf04SAlexander Shishkin	help
7414cdbf04SAlexander Shishkin	  Parallel Trace Interface unit (PTI) is a trace output device
7514cdbf04SAlexander Shishkin	  of Intel TH architecture that facilitates STP trace output via
7614cdbf04SAlexander Shishkin	  a PTI port.
7714cdbf04SAlexander Shishkin
7814cdbf04SAlexander Shishkin	  Say Y to enable PTI output of Intel TH data.
7914cdbf04SAlexander Shishkin
8039f40346SAlexander Shishkinconfig INTEL_TH_DEBUG
8139f40346SAlexander Shishkin	bool "Intel(R) Trace Hub debugging"
8239f40346SAlexander Shishkin	depends on DEBUG_FS
8339f40346SAlexander Shishkin	help
8439f40346SAlexander Shishkin	  Say Y here to enable debugging.
8539f40346SAlexander Shishkin
8639f40346SAlexander Shishkinendif
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