1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  */
5 
6 #ifndef _CORESIGHT_CORESIGHT_TPDA_H
7 #define _CORESIGHT_CORESIGHT_TPDA_H
8 
9 #define TPDA_CR			(0x000)
10 #define TPDA_Pn_CR(n)		(0x004 + (n * 4))
11 /* Aggregator port enable bit */
12 #define TPDA_Pn_CR_ENA		BIT(0)
13 
14 #define TPDA_MAX_INPORTS	32
15 
16 /* Bits 6 ~ 12 is for atid value */
17 #define TPDA_CR_ATID		GENMASK(12, 6)
18 
19 /**
20  * struct tpda_drvdata - specifics associated to an TPDA component
21  * @base:       memory mapped base address for this component.
22  * @dev:        The device entity associated to this component.
23  * @csdev:      component vitals needed by the framework.
24  * @spinlock:   lock for the drvdata value.
25  * @enable:     enable status of the component.
26  */
27 struct tpda_drvdata {
28 	void __iomem		*base;
29 	struct device		*dev;
30 	struct coresight_device	*csdev;
31 	spinlock_t		spinlock;
32 	u8			atid;
33 };
34 
35 #endif  /* _CORESIGHT_CORESIGHT_TPDA_H */
36