1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 4 * 5 * Description: CoreSight Embedded Trace Buffer driver 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/kernel.h> 10 #include <linux/init.h> 11 #include <linux/types.h> 12 #include <linux/device.h> 13 #include <linux/io.h> 14 #include <linux/err.h> 15 #include <linux/fs.h> 16 #include <linux/miscdevice.h> 17 #include <linux/uaccess.h> 18 #include <linux/slab.h> 19 #include <linux/spinlock.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/seq_file.h> 22 #include <linux/coresight.h> 23 #include <linux/amba/bus.h> 24 #include <linux/clk.h> 25 #include <linux/circ_buf.h> 26 #include <linux/mm.h> 27 #include <linux/perf_event.h> 28 29 30 #include "coresight-priv.h" 31 #include "coresight-etm-perf.h" 32 33 #define ETB_RAM_DEPTH_REG 0x004 34 #define ETB_STATUS_REG 0x00c 35 #define ETB_RAM_READ_DATA_REG 0x010 36 #define ETB_RAM_READ_POINTER 0x014 37 #define ETB_RAM_WRITE_POINTER 0x018 38 #define ETB_TRG 0x01c 39 #define ETB_CTL_REG 0x020 40 #define ETB_RWD_REG 0x024 41 #define ETB_FFSR 0x300 42 #define ETB_FFCR 0x304 43 #define ETB_ITMISCOP0 0xee0 44 #define ETB_ITTRFLINACK 0xee4 45 #define ETB_ITTRFLIN 0xee8 46 #define ETB_ITATBDATA0 0xeeC 47 #define ETB_ITATBCTR2 0xef0 48 #define ETB_ITATBCTR1 0xef4 49 #define ETB_ITATBCTR0 0xef8 50 51 /* register description */ 52 /* STS - 0x00C */ 53 #define ETB_STATUS_RAM_FULL BIT(0) 54 /* CTL - 0x020 */ 55 #define ETB_CTL_CAPT_EN BIT(0) 56 /* FFCR - 0x304 */ 57 #define ETB_FFCR_EN_FTC BIT(0) 58 #define ETB_FFCR_FON_MAN BIT(6) 59 #define ETB_FFCR_STOP_FI BIT(12) 60 #define ETB_FFCR_STOP_TRIGGER BIT(13) 61 62 #define ETB_FFCR_BIT 6 63 #define ETB_FFSR_BIT 1 64 #define ETB_FRAME_SIZE_WORDS 4 65 66 DEFINE_CORESIGHT_DEVLIST(etb_devs, "etb"); 67 68 /** 69 * struct etb_drvdata - specifics associated to an ETB component 70 * @base: memory mapped base address for this component. 71 * @atclk: optional clock for the core parts of the ETB. 72 * @csdev: component vitals needed by the framework. 73 * @miscdev: specifics to handle "/dev/xyz.etb" entry. 74 * @spinlock: only one at a time pls. 75 * @reading: synchronise user space access to etb buffer. 76 * @pid: Process ID of the process being monitored by the session 77 * that is using this component. 78 * @buf: area of memory where ETB buffer content gets sent. 79 * @mode: this ETB is being used. 80 * @buffer_depth: size of @buf. 81 * @trigger_cntr: amount of words to store after a trigger. 82 */ 83 struct etb_drvdata { 84 void __iomem *base; 85 struct clk *atclk; 86 struct coresight_device *csdev; 87 struct miscdevice miscdev; 88 spinlock_t spinlock; 89 local_t reading; 90 pid_t pid; 91 u8 *buf; 92 u32 mode; 93 u32 buffer_depth; 94 u32 trigger_cntr; 95 }; 96 97 static int etb_set_buffer(struct coresight_device *csdev, 98 struct perf_output_handle *handle); 99 100 static inline unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata) 101 { 102 return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG); 103 } 104 105 static void __etb_enable_hw(struct etb_drvdata *drvdata) 106 { 107 int i; 108 u32 depth; 109 110 CS_UNLOCK(drvdata->base); 111 112 depth = drvdata->buffer_depth; 113 /* reset write RAM pointer address */ 114 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 115 /* clear entire RAM buffer */ 116 for (i = 0; i < depth; i++) 117 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG); 118 119 /* reset write RAM pointer address */ 120 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 121 /* reset read RAM pointer address */ 122 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 123 124 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG); 125 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER, 126 drvdata->base + ETB_FFCR); 127 /* ETB trace capture enable */ 128 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG); 129 130 CS_LOCK(drvdata->base); 131 } 132 133 static int etb_enable_hw(struct etb_drvdata *drvdata) 134 { 135 int rc = coresight_claim_device(drvdata->csdev); 136 137 if (rc) 138 return rc; 139 140 __etb_enable_hw(drvdata); 141 return 0; 142 } 143 144 static int etb_enable_sysfs(struct coresight_device *csdev) 145 { 146 int ret = 0; 147 unsigned long flags; 148 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 149 150 spin_lock_irqsave(&drvdata->spinlock, flags); 151 152 /* Don't messup with perf sessions. */ 153 if (drvdata->mode == CS_MODE_PERF) { 154 ret = -EBUSY; 155 goto out; 156 } 157 158 if (drvdata->mode == CS_MODE_DISABLED) { 159 ret = etb_enable_hw(drvdata); 160 if (ret) 161 goto out; 162 163 drvdata->mode = CS_MODE_SYSFS; 164 } 165 166 atomic_inc(&csdev->refcnt); 167 out: 168 spin_unlock_irqrestore(&drvdata->spinlock, flags); 169 return ret; 170 } 171 172 static int etb_enable_perf(struct coresight_device *csdev, void *data) 173 { 174 int ret = 0; 175 pid_t pid; 176 unsigned long flags; 177 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 178 struct perf_output_handle *handle = data; 179 struct cs_buffers *buf = etm_perf_sink_config(handle); 180 181 spin_lock_irqsave(&drvdata->spinlock, flags); 182 183 /* No need to continue if the component is already in used by sysFS. */ 184 if (drvdata->mode == CS_MODE_SYSFS) { 185 ret = -EBUSY; 186 goto out; 187 } 188 189 /* Get a handle on the pid of the process to monitor */ 190 pid = buf->pid; 191 192 if (drvdata->pid != -1 && drvdata->pid != pid) { 193 ret = -EBUSY; 194 goto out; 195 } 196 197 /* 198 * No HW configuration is needed if the sink is already in 199 * use for this session. 200 */ 201 if (drvdata->pid == pid) { 202 atomic_inc(&csdev->refcnt); 203 goto out; 204 } 205 206 /* 207 * We don't have an internal state to clean up if we fail to setup 208 * the perf buffer. So we can perform the step before we turn the 209 * ETB on and leave without cleaning up. 210 */ 211 ret = etb_set_buffer(csdev, handle); 212 if (ret) 213 goto out; 214 215 ret = etb_enable_hw(drvdata); 216 if (!ret) { 217 /* Associate with monitored process. */ 218 drvdata->pid = pid; 219 drvdata->mode = CS_MODE_PERF; 220 atomic_inc(&csdev->refcnt); 221 } 222 223 out: 224 spin_unlock_irqrestore(&drvdata->spinlock, flags); 225 return ret; 226 } 227 228 static int etb_enable(struct coresight_device *csdev, enum cs_mode mode, 229 void *data) 230 { 231 int ret; 232 233 switch (mode) { 234 case CS_MODE_SYSFS: 235 ret = etb_enable_sysfs(csdev); 236 break; 237 case CS_MODE_PERF: 238 ret = etb_enable_perf(csdev, data); 239 break; 240 default: 241 ret = -EINVAL; 242 break; 243 } 244 245 if (ret) 246 return ret; 247 248 dev_dbg(&csdev->dev, "ETB enabled\n"); 249 return 0; 250 } 251 252 static void __etb_disable_hw(struct etb_drvdata *drvdata) 253 { 254 u32 ffcr; 255 struct device *dev = &drvdata->csdev->dev; 256 struct csdev_access *csa = &drvdata->csdev->access; 257 258 CS_UNLOCK(drvdata->base); 259 260 ffcr = readl_relaxed(drvdata->base + ETB_FFCR); 261 /* stop formatter when a stop has completed */ 262 ffcr |= ETB_FFCR_STOP_FI; 263 writel_relaxed(ffcr, drvdata->base + ETB_FFCR); 264 /* manually generate a flush of the system */ 265 ffcr |= ETB_FFCR_FON_MAN; 266 writel_relaxed(ffcr, drvdata->base + ETB_FFCR); 267 268 if (coresight_timeout(csa, ETB_FFCR, ETB_FFCR_BIT, 0)) { 269 dev_err(dev, 270 "timeout while waiting for completion of Manual Flush\n"); 271 } 272 273 /* disable trace capture */ 274 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG); 275 276 if (coresight_timeout(csa, ETB_FFSR, ETB_FFSR_BIT, 1)) { 277 dev_err(dev, 278 "timeout while waiting for Formatter to Stop\n"); 279 } 280 281 CS_LOCK(drvdata->base); 282 } 283 284 static void etb_dump_hw(struct etb_drvdata *drvdata) 285 { 286 bool lost = false; 287 int i; 288 u8 *buf_ptr; 289 u32 read_data, depth; 290 u32 read_ptr, write_ptr; 291 u32 frame_off, frame_endoff; 292 struct device *dev = &drvdata->csdev->dev; 293 294 CS_UNLOCK(drvdata->base); 295 296 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); 297 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); 298 299 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS; 300 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off; 301 if (frame_off) { 302 dev_err(dev, 303 "write_ptr: %lu not aligned to formatter frame size\n", 304 (unsigned long)write_ptr); 305 dev_err(dev, "frameoff: %lu, frame_endoff: %lu\n", 306 (unsigned long)frame_off, (unsigned long)frame_endoff); 307 write_ptr += frame_endoff; 308 } 309 310 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG) 311 & ETB_STATUS_RAM_FULL) == 0) { 312 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 313 } else { 314 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER); 315 lost = true; 316 } 317 318 depth = drvdata->buffer_depth; 319 buf_ptr = drvdata->buf; 320 for (i = 0; i < depth; i++) { 321 read_data = readl_relaxed(drvdata->base + 322 ETB_RAM_READ_DATA_REG); 323 *(u32 *)buf_ptr = read_data; 324 buf_ptr += 4; 325 } 326 327 if (lost) 328 coresight_insert_barrier_packet(drvdata->buf); 329 330 if (frame_off) { 331 buf_ptr -= (frame_endoff * 4); 332 for (i = 0; i < frame_endoff; i++) { 333 *buf_ptr++ = 0x0; 334 *buf_ptr++ = 0x0; 335 *buf_ptr++ = 0x0; 336 *buf_ptr++ = 0x0; 337 } 338 } 339 340 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); 341 342 CS_LOCK(drvdata->base); 343 } 344 345 static void etb_disable_hw(struct etb_drvdata *drvdata) 346 { 347 __etb_disable_hw(drvdata); 348 etb_dump_hw(drvdata); 349 coresight_disclaim_device(drvdata->csdev); 350 } 351 352 static int etb_disable(struct coresight_device *csdev) 353 { 354 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 355 unsigned long flags; 356 357 spin_lock_irqsave(&drvdata->spinlock, flags); 358 359 if (atomic_dec_return(&csdev->refcnt)) { 360 spin_unlock_irqrestore(&drvdata->spinlock, flags); 361 return -EBUSY; 362 } 363 364 /* Complain if we (somehow) got out of sync */ 365 WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED); 366 etb_disable_hw(drvdata); 367 /* Dissociate from monitored process. */ 368 drvdata->pid = -1; 369 drvdata->mode = CS_MODE_DISABLED; 370 spin_unlock_irqrestore(&drvdata->spinlock, flags); 371 372 dev_dbg(&csdev->dev, "ETB disabled\n"); 373 return 0; 374 } 375 376 static void *etb_alloc_buffer(struct coresight_device *csdev, 377 struct perf_event *event, void **pages, 378 int nr_pages, bool overwrite) 379 { 380 int node; 381 struct cs_buffers *buf; 382 383 node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); 384 385 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node); 386 if (!buf) 387 return NULL; 388 389 buf->pid = task_pid_nr(event->owner); 390 buf->snapshot = overwrite; 391 buf->nr_pages = nr_pages; 392 buf->data_pages = pages; 393 394 return buf; 395 } 396 397 static void etb_free_buffer(void *config) 398 { 399 struct cs_buffers *buf = config; 400 401 kfree(buf); 402 } 403 404 static int etb_set_buffer(struct coresight_device *csdev, 405 struct perf_output_handle *handle) 406 { 407 int ret = 0; 408 unsigned long head; 409 struct cs_buffers *buf = etm_perf_sink_config(handle); 410 411 if (!buf) 412 return -EINVAL; 413 414 /* wrap head around to the amount of space we have */ 415 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); 416 417 /* find the page to write to */ 418 buf->cur = head / PAGE_SIZE; 419 420 /* and offset within that page */ 421 buf->offset = head % PAGE_SIZE; 422 423 local_set(&buf->data_size, 0); 424 425 return ret; 426 } 427 428 static unsigned long etb_update_buffer(struct coresight_device *csdev, 429 struct perf_output_handle *handle, 430 void *sink_config) 431 { 432 bool lost = false; 433 int i, cur; 434 u8 *buf_ptr; 435 const u32 *barrier; 436 u32 read_ptr, write_ptr, capacity; 437 u32 status, read_data; 438 unsigned long offset, to_read = 0, flags; 439 struct cs_buffers *buf = sink_config; 440 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 441 442 if (!buf) 443 return 0; 444 445 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; 446 447 spin_lock_irqsave(&drvdata->spinlock, flags); 448 449 /* Don't do anything if another tracer is using this sink */ 450 if (atomic_read(&csdev->refcnt) != 1) 451 goto out; 452 453 __etb_disable_hw(drvdata); 454 CS_UNLOCK(drvdata->base); 455 456 /* unit is in words, not bytes */ 457 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER); 458 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER); 459 460 /* 461 * Entries should be aligned to the frame size. If they are not 462 * go back to the last alignment point to give decoding tools a 463 * chance to fix things. 464 */ 465 if (write_ptr % ETB_FRAME_SIZE_WORDS) { 466 dev_err(&csdev->dev, 467 "write_ptr: %lu not aligned to formatter frame size\n", 468 (unsigned long)write_ptr); 469 470 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1); 471 lost = true; 472 } 473 474 /* 475 * Get a hold of the status register and see if a wrap around 476 * has occurred. If so adjust things accordingly. Otherwise 477 * start at the beginning and go until the write pointer has 478 * been reached. 479 */ 480 status = readl_relaxed(drvdata->base + ETB_STATUS_REG); 481 if (status & ETB_STATUS_RAM_FULL) { 482 lost = true; 483 to_read = capacity; 484 read_ptr = write_ptr; 485 } else { 486 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth); 487 to_read *= ETB_FRAME_SIZE_WORDS; 488 } 489 490 /* 491 * Make sure we don't overwrite data that hasn't been consumed yet. 492 * It is entirely possible that the HW buffer has more data than the 493 * ring buffer can currently handle. If so adjust the start address 494 * to take only the last traces. 495 * 496 * In snapshot mode we are looking to get the latest traces only and as 497 * such, we don't care about not overwriting data that hasn't been 498 * processed by user space. 499 */ 500 if (!buf->snapshot && to_read > handle->size) { 501 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1); 502 503 /* The new read pointer must be frame size aligned */ 504 to_read = handle->size & mask; 505 /* 506 * Move the RAM read pointer up, keeping in mind that 507 * everything is in frame size units. 508 */ 509 read_ptr = (write_ptr + drvdata->buffer_depth) - 510 to_read / ETB_FRAME_SIZE_WORDS; 511 /* Wrap around if need be*/ 512 if (read_ptr > (drvdata->buffer_depth - 1)) 513 read_ptr -= drvdata->buffer_depth; 514 /* let the decoder know we've skipped ahead */ 515 lost = true; 516 } 517 518 /* 519 * Don't set the TRUNCATED flag in snapshot mode because 1) the 520 * captured buffer is expected to be truncated and 2) a full buffer 521 * prevents the event from being re-enabled by the perf core, 522 * resulting in stale data being send to user space. 523 */ 524 if (!buf->snapshot && lost) 525 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); 526 527 /* finally tell HW where we want to start reading from */ 528 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER); 529 530 cur = buf->cur; 531 offset = buf->offset; 532 barrier = coresight_barrier_pkt; 533 534 for (i = 0; i < to_read; i += 4) { 535 buf_ptr = buf->data_pages[cur] + offset; 536 read_data = readl_relaxed(drvdata->base + 537 ETB_RAM_READ_DATA_REG); 538 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) { 539 read_data = *barrier; 540 barrier++; 541 } 542 543 *(u32 *)buf_ptr = read_data; 544 buf_ptr += 4; 545 546 offset += 4; 547 if (offset >= PAGE_SIZE) { 548 offset = 0; 549 cur++; 550 /* wrap around at the end of the buffer */ 551 cur &= buf->nr_pages - 1; 552 } 553 } 554 555 /* reset ETB buffer for next run */ 556 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER); 557 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER); 558 559 /* 560 * In snapshot mode we simply increment the head by the number of byte 561 * that were written. User space will figure out how many bytes to get 562 * from the AUX buffer based on the position of the head. 563 */ 564 if (buf->snapshot) 565 handle->head += to_read; 566 567 __etb_enable_hw(drvdata); 568 CS_LOCK(drvdata->base); 569 out: 570 spin_unlock_irqrestore(&drvdata->spinlock, flags); 571 572 return to_read; 573 } 574 575 static const struct coresight_ops_sink etb_sink_ops = { 576 .enable = etb_enable, 577 .disable = etb_disable, 578 .alloc_buffer = etb_alloc_buffer, 579 .free_buffer = etb_free_buffer, 580 .update_buffer = etb_update_buffer, 581 }; 582 583 static const struct coresight_ops etb_cs_ops = { 584 .sink_ops = &etb_sink_ops, 585 }; 586 587 static void etb_dump(struct etb_drvdata *drvdata) 588 { 589 unsigned long flags; 590 591 spin_lock_irqsave(&drvdata->spinlock, flags); 592 if (drvdata->mode == CS_MODE_SYSFS) { 593 __etb_disable_hw(drvdata); 594 etb_dump_hw(drvdata); 595 __etb_enable_hw(drvdata); 596 } 597 spin_unlock_irqrestore(&drvdata->spinlock, flags); 598 599 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n"); 600 } 601 602 static int etb_open(struct inode *inode, struct file *file) 603 { 604 struct etb_drvdata *drvdata = container_of(file->private_data, 605 struct etb_drvdata, miscdev); 606 607 if (local_cmpxchg(&drvdata->reading, 0, 1)) 608 return -EBUSY; 609 610 dev_dbg(&drvdata->csdev->dev, "%s: successfully opened\n", __func__); 611 return 0; 612 } 613 614 static ssize_t etb_read(struct file *file, char __user *data, 615 size_t len, loff_t *ppos) 616 { 617 u32 depth; 618 struct etb_drvdata *drvdata = container_of(file->private_data, 619 struct etb_drvdata, miscdev); 620 struct device *dev = &drvdata->csdev->dev; 621 622 etb_dump(drvdata); 623 624 depth = drvdata->buffer_depth; 625 if (*ppos + len > depth * 4) 626 len = depth * 4 - *ppos; 627 628 if (copy_to_user(data, drvdata->buf + *ppos, len)) { 629 dev_dbg(dev, 630 "%s: copy_to_user failed\n", __func__); 631 return -EFAULT; 632 } 633 634 *ppos += len; 635 636 dev_dbg(dev, "%s: %zu bytes copied, %d bytes left\n", 637 __func__, len, (int)(depth * 4 - *ppos)); 638 return len; 639 } 640 641 static int etb_release(struct inode *inode, struct file *file) 642 { 643 struct etb_drvdata *drvdata = container_of(file->private_data, 644 struct etb_drvdata, miscdev); 645 local_set(&drvdata->reading, 0); 646 647 dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__); 648 return 0; 649 } 650 651 static const struct file_operations etb_fops = { 652 .owner = THIS_MODULE, 653 .open = etb_open, 654 .read = etb_read, 655 .release = etb_release, 656 .llseek = no_llseek, 657 }; 658 659 static struct attribute *coresight_etb_mgmt_attrs[] = { 660 coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG), 661 coresight_simple_reg32(sts, ETB_STATUS_REG), 662 coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER), 663 coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER), 664 coresight_simple_reg32(trg, ETB_TRG), 665 coresight_simple_reg32(ctl, ETB_CTL_REG), 666 coresight_simple_reg32(ffsr, ETB_FFSR), 667 coresight_simple_reg32(ffcr, ETB_FFCR), 668 NULL, 669 }; 670 671 static ssize_t trigger_cntr_show(struct device *dev, 672 struct device_attribute *attr, char *buf) 673 { 674 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); 675 unsigned long val = drvdata->trigger_cntr; 676 677 return sprintf(buf, "%#lx\n", val); 678 } 679 680 static ssize_t trigger_cntr_store(struct device *dev, 681 struct device_attribute *attr, 682 const char *buf, size_t size) 683 { 684 int ret; 685 unsigned long val; 686 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent); 687 688 ret = kstrtoul(buf, 16, &val); 689 if (ret) 690 return ret; 691 692 drvdata->trigger_cntr = val; 693 return size; 694 } 695 static DEVICE_ATTR_RW(trigger_cntr); 696 697 static struct attribute *coresight_etb_attrs[] = { 698 &dev_attr_trigger_cntr.attr, 699 NULL, 700 }; 701 702 static const struct attribute_group coresight_etb_group = { 703 .attrs = coresight_etb_attrs, 704 }; 705 706 static const struct attribute_group coresight_etb_mgmt_group = { 707 .attrs = coresight_etb_mgmt_attrs, 708 .name = "mgmt", 709 }; 710 711 static const struct attribute_group *coresight_etb_groups[] = { 712 &coresight_etb_group, 713 &coresight_etb_mgmt_group, 714 NULL, 715 }; 716 717 static int etb_probe(struct amba_device *adev, const struct amba_id *id) 718 { 719 int ret; 720 void __iomem *base; 721 struct device *dev = &adev->dev; 722 struct coresight_platform_data *pdata = NULL; 723 struct etb_drvdata *drvdata; 724 struct resource *res = &adev->res; 725 struct coresight_desc desc = { 0 }; 726 727 desc.name = coresight_alloc_device_name(&etb_devs, dev); 728 if (!desc.name) 729 return -ENOMEM; 730 731 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 732 if (!drvdata) 733 return -ENOMEM; 734 735 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ 736 if (!IS_ERR(drvdata->atclk)) { 737 ret = clk_prepare_enable(drvdata->atclk); 738 if (ret) 739 return ret; 740 } 741 dev_set_drvdata(dev, drvdata); 742 743 /* validity for the resource is already checked by the AMBA core */ 744 base = devm_ioremap_resource(dev, res); 745 if (IS_ERR(base)) 746 return PTR_ERR(base); 747 748 drvdata->base = base; 749 desc.access = CSDEV_ACCESS_IOMEM(base); 750 751 spin_lock_init(&drvdata->spinlock); 752 753 drvdata->buffer_depth = etb_get_buffer_depth(drvdata); 754 755 if (drvdata->buffer_depth & 0x80000000) 756 return -EINVAL; 757 758 drvdata->buf = devm_kcalloc(dev, 759 drvdata->buffer_depth, 4, GFP_KERNEL); 760 if (!drvdata->buf) 761 return -ENOMEM; 762 763 /* This device is not associated with a session */ 764 drvdata->pid = -1; 765 766 pdata = coresight_get_platform_data(dev); 767 if (IS_ERR(pdata)) 768 return PTR_ERR(pdata); 769 adev->dev.platform_data = pdata; 770 771 desc.type = CORESIGHT_DEV_TYPE_SINK; 772 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; 773 desc.ops = &etb_cs_ops; 774 desc.pdata = pdata; 775 desc.dev = dev; 776 desc.groups = coresight_etb_groups; 777 drvdata->csdev = coresight_register(&desc); 778 if (IS_ERR(drvdata->csdev)) 779 return PTR_ERR(drvdata->csdev); 780 781 drvdata->miscdev.name = desc.name; 782 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; 783 drvdata->miscdev.fops = &etb_fops; 784 ret = misc_register(&drvdata->miscdev); 785 if (ret) 786 goto err_misc_register; 787 788 pm_runtime_put(&adev->dev); 789 return 0; 790 791 err_misc_register: 792 coresight_unregister(drvdata->csdev); 793 return ret; 794 } 795 796 static void etb_remove(struct amba_device *adev) 797 { 798 struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev); 799 800 /* 801 * Since misc_open() holds a refcount on the f_ops, which is 802 * etb fops in this case, device is there until last file 803 * handler to this device is closed. 804 */ 805 misc_deregister(&drvdata->miscdev); 806 coresight_unregister(drvdata->csdev); 807 } 808 809 #ifdef CONFIG_PM 810 static int etb_runtime_suspend(struct device *dev) 811 { 812 struct etb_drvdata *drvdata = dev_get_drvdata(dev); 813 814 if (drvdata && !IS_ERR(drvdata->atclk)) 815 clk_disable_unprepare(drvdata->atclk); 816 817 return 0; 818 } 819 820 static int etb_runtime_resume(struct device *dev) 821 { 822 struct etb_drvdata *drvdata = dev_get_drvdata(dev); 823 824 if (drvdata && !IS_ERR(drvdata->atclk)) 825 clk_prepare_enable(drvdata->atclk); 826 827 return 0; 828 } 829 #endif 830 831 static const struct dev_pm_ops etb_dev_pm_ops = { 832 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL) 833 }; 834 835 static const struct amba_id etb_ids[] = { 836 { 837 .id = 0x000bb907, 838 .mask = 0x000fffff, 839 }, 840 { 0, 0}, 841 }; 842 843 MODULE_DEVICE_TABLE(amba, etb_ids); 844 845 static struct amba_driver etb_driver = { 846 .drv = { 847 .name = "coresight-etb10", 848 .owner = THIS_MODULE, 849 .pm = &etb_dev_pm_ops, 850 .suppress_bind_attrs = true, 851 852 }, 853 .probe = etb_probe, 854 .remove = etb_remove, 855 .id_table = etb_ids, 856 }; 857 858 module_amba_driver(etb_driver); 859 860 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 861 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 862 MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver"); 863 MODULE_LICENSE("GPL v2"); 864