1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/slab.h> 14 #include <linux/stringhash.h> 15 #include <linux/mutex.h> 16 #include <linux/clk.h> 17 #include <linux/coresight.h> 18 #include <linux/of_platform.h> 19 #include <linux/delay.h> 20 #include <linux/pm_runtime.h> 21 22 #include "coresight-etm-perf.h" 23 #include "coresight-priv.h" 24 25 static DEFINE_MUTEX(coresight_mutex); 26 27 /** 28 * struct coresight_node - elements of a path, from source to sink 29 * @csdev: Address of an element. 30 * @link: hook to the list. 31 */ 32 struct coresight_node { 33 struct coresight_device *csdev; 34 struct list_head link; 35 }; 36 37 /* 38 * When operating Coresight drivers from the sysFS interface, only a single 39 * path can exist from a tracer (associated to a CPU) to a sink. 40 */ 41 static DEFINE_PER_CPU(struct list_head *, tracer_path); 42 43 /* 44 * As of this writing only a single STM can be found in CS topologies. Since 45 * there is no way to know if we'll ever see more and what kind of 46 * configuration they will enact, for the time being only define a single path 47 * for STM. 48 */ 49 static struct list_head *stm_path; 50 51 /* 52 * When losing synchronisation a new barrier packet needs to be inserted at the 53 * beginning of the data collected in a buffer. That way the decoder knows that 54 * it needs to look for another sync sequence. 55 */ 56 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 57 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 58 59 static const struct cti_assoc_op *cti_assoc_ops; 60 61 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 62 { 63 cti_assoc_ops = cti_op; 64 } 65 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 66 67 void coresight_remove_cti_ops(void) 68 { 69 cti_assoc_ops = NULL; 70 } 71 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 72 73 static int coresight_id_match(struct device *dev, void *data) 74 { 75 int trace_id, i_trace_id; 76 struct coresight_device *csdev, *i_csdev; 77 78 csdev = data; 79 i_csdev = to_coresight_device(dev); 80 81 /* 82 * No need to care about oneself and components that are not 83 * sources or not enabled 84 */ 85 if (i_csdev == csdev || !i_csdev->enable || 86 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 87 return 0; 88 89 /* Get the source ID for both compoment */ 90 trace_id = source_ops(csdev)->trace_id(csdev); 91 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); 92 93 /* All you need is one */ 94 if (trace_id == i_trace_id) 95 return 1; 96 97 return 0; 98 } 99 100 static int coresight_source_is_unique(struct coresight_device *csdev) 101 { 102 int trace_id = source_ops(csdev)->trace_id(csdev); 103 104 /* this shouldn't happen */ 105 if (trace_id < 0) 106 return 0; 107 108 return !bus_for_each_dev(&coresight_bustype, NULL, 109 csdev, coresight_id_match); 110 } 111 112 static int coresight_find_link_inport(struct coresight_device *csdev, 113 struct coresight_device *parent) 114 { 115 int i; 116 struct coresight_connection *conn; 117 118 for (i = 0; i < parent->pdata->nr_outport; i++) { 119 conn = &parent->pdata->conns[i]; 120 if (conn->child_dev == csdev) 121 return conn->child_port; 122 } 123 124 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 125 dev_name(&parent->dev), dev_name(&csdev->dev)); 126 127 return -ENODEV; 128 } 129 130 static int coresight_find_link_outport(struct coresight_device *csdev, 131 struct coresight_device *child) 132 { 133 int i; 134 struct coresight_connection *conn; 135 136 for (i = 0; i < csdev->pdata->nr_outport; i++) { 137 conn = &csdev->pdata->conns[i]; 138 if (conn->child_dev == child) 139 return conn->outport; 140 } 141 142 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 143 dev_name(&csdev->dev), dev_name(&child->dev)); 144 145 return -ENODEV; 146 } 147 148 static inline u32 coresight_read_claim_tags(void __iomem *base) 149 { 150 return readl_relaxed(base + CORESIGHT_CLAIMCLR); 151 } 152 153 static inline bool coresight_is_claimed_self_hosted(void __iomem *base) 154 { 155 return coresight_read_claim_tags(base) == CORESIGHT_CLAIM_SELF_HOSTED; 156 } 157 158 static inline bool coresight_is_claimed_any(void __iomem *base) 159 { 160 return coresight_read_claim_tags(base) != 0; 161 } 162 163 static inline void coresight_set_claim_tags(void __iomem *base) 164 { 165 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMSET); 166 isb(); 167 } 168 169 static inline void coresight_clear_claim_tags(void __iomem *base) 170 { 171 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMCLR); 172 isb(); 173 } 174 175 /* 176 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 177 * to prevent an external tool from touching this device. As per PSCI 178 * standards, section "Preserving the execution context" => "Debug and Trace 179 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 180 * DBGCLAIM[0] is reserved for external tools. 181 * 182 * Called with CS_UNLOCKed for the component. 183 * Returns : 0 on success 184 */ 185 int coresight_claim_device_unlocked(void __iomem *base) 186 { 187 if (coresight_is_claimed_any(base)) 188 return -EBUSY; 189 190 coresight_set_claim_tags(base); 191 if (coresight_is_claimed_self_hosted(base)) 192 return 0; 193 /* There was a race setting the tags, clean up and fail */ 194 coresight_clear_claim_tags(base); 195 return -EBUSY; 196 } 197 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 198 199 int coresight_claim_device(void __iomem *base) 200 { 201 int rc; 202 203 CS_UNLOCK(base); 204 rc = coresight_claim_device_unlocked(base); 205 CS_LOCK(base); 206 207 return rc; 208 } 209 EXPORT_SYMBOL_GPL(coresight_claim_device); 210 211 /* 212 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 213 * Called with CS_UNLOCKed for the component. 214 */ 215 void coresight_disclaim_device_unlocked(void __iomem *base) 216 { 217 218 if (coresight_is_claimed_self_hosted(base)) 219 coresight_clear_claim_tags(base); 220 else 221 /* 222 * The external agent may have not honoured our claim 223 * and has manipulated it. Or something else has seriously 224 * gone wrong in our driver. 225 */ 226 WARN_ON_ONCE(1); 227 } 228 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 229 230 void coresight_disclaim_device(void __iomem *base) 231 { 232 CS_UNLOCK(base); 233 coresight_disclaim_device_unlocked(base); 234 CS_LOCK(base); 235 } 236 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 237 238 /* enable or disable an associated CTI device of the supplied CS device */ 239 static int 240 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 241 { 242 int ect_ret = 0; 243 struct coresight_device *ect_csdev = csdev->ect_dev; 244 struct module *mod; 245 246 if (!ect_csdev) 247 return 0; 248 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 249 return 0; 250 251 mod = ect_csdev->dev.parent->driver->owner; 252 if (enable) { 253 if (try_module_get(mod)) { 254 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 255 if (ect_ret) { 256 module_put(mod); 257 } else { 258 get_device(ect_csdev->dev.parent); 259 csdev->ect_enabled = true; 260 } 261 } else 262 ect_ret = -ENODEV; 263 } else { 264 if (csdev->ect_enabled) { 265 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 266 put_device(ect_csdev->dev.parent); 267 module_put(mod); 268 csdev->ect_enabled = false; 269 } 270 } 271 272 /* output warning if ECT enable is preventing trace operation */ 273 if (ect_ret) 274 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 275 dev_name(&ect_csdev->dev), 276 enable ? "enable" : "disable"); 277 return ect_ret; 278 } 279 280 /* 281 * Set the associated ect / cti device while holding the coresight_mutex 282 * to avoid a race with coresight_enable that may try to use this value. 283 */ 284 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 285 struct coresight_device *ect_csdev) 286 { 287 mutex_lock(&coresight_mutex); 288 csdev->ect_dev = ect_csdev; 289 mutex_unlock(&coresight_mutex); 290 } 291 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 292 293 static int coresight_enable_sink(struct coresight_device *csdev, 294 u32 mode, void *data) 295 { 296 int ret; 297 298 /* 299 * We need to make sure the "new" session is compatible with the 300 * existing "mode" of operation. 301 */ 302 if (!sink_ops(csdev)->enable) 303 return -EINVAL; 304 305 ret = coresight_control_assoc_ectdev(csdev, true); 306 if (ret) 307 return ret; 308 ret = sink_ops(csdev)->enable(csdev, mode, data); 309 if (ret) { 310 coresight_control_assoc_ectdev(csdev, false); 311 return ret; 312 } 313 csdev->enable = true; 314 315 return 0; 316 } 317 318 static void coresight_disable_sink(struct coresight_device *csdev) 319 { 320 int ret; 321 322 if (!sink_ops(csdev)->disable) 323 return; 324 325 ret = sink_ops(csdev)->disable(csdev); 326 if (ret) 327 return; 328 coresight_control_assoc_ectdev(csdev, false); 329 csdev->enable = false; 330 } 331 332 static int coresight_enable_link(struct coresight_device *csdev, 333 struct coresight_device *parent, 334 struct coresight_device *child) 335 { 336 int ret = 0; 337 int link_subtype; 338 int inport, outport; 339 340 if (!parent || !child) 341 return -EINVAL; 342 343 inport = coresight_find_link_inport(csdev, parent); 344 outport = coresight_find_link_outport(csdev, child); 345 link_subtype = csdev->subtype.link_subtype; 346 347 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 348 return inport; 349 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 350 return outport; 351 352 if (link_ops(csdev)->enable) { 353 ret = coresight_control_assoc_ectdev(csdev, true); 354 if (!ret) { 355 ret = link_ops(csdev)->enable(csdev, inport, outport); 356 if (ret) 357 coresight_control_assoc_ectdev(csdev, false); 358 } 359 } 360 361 if (!ret) 362 csdev->enable = true; 363 364 return ret; 365 } 366 367 static void coresight_disable_link(struct coresight_device *csdev, 368 struct coresight_device *parent, 369 struct coresight_device *child) 370 { 371 int i, nr_conns; 372 int link_subtype; 373 int inport, outport; 374 375 if (!parent || !child) 376 return; 377 378 inport = coresight_find_link_inport(csdev, parent); 379 outport = coresight_find_link_outport(csdev, child); 380 link_subtype = csdev->subtype.link_subtype; 381 382 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 383 nr_conns = csdev->pdata->nr_inport; 384 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 385 nr_conns = csdev->pdata->nr_outport; 386 } else { 387 nr_conns = 1; 388 } 389 390 if (link_ops(csdev)->disable) { 391 link_ops(csdev)->disable(csdev, inport, outport); 392 coresight_control_assoc_ectdev(csdev, false); 393 } 394 395 for (i = 0; i < nr_conns; i++) 396 if (atomic_read(&csdev->refcnt[i]) != 0) 397 return; 398 399 csdev->enable = false; 400 } 401 402 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 403 { 404 int ret; 405 406 if (!coresight_source_is_unique(csdev)) { 407 dev_warn(&csdev->dev, "traceID %d not unique\n", 408 source_ops(csdev)->trace_id(csdev)); 409 return -EINVAL; 410 } 411 412 if (!csdev->enable) { 413 if (source_ops(csdev)->enable) { 414 ret = coresight_control_assoc_ectdev(csdev, true); 415 if (ret) 416 return ret; 417 ret = source_ops(csdev)->enable(csdev, NULL, mode); 418 if (ret) { 419 coresight_control_assoc_ectdev(csdev, false); 420 return ret; 421 } 422 } 423 csdev->enable = true; 424 } 425 426 atomic_inc(csdev->refcnt); 427 428 return 0; 429 } 430 431 /** 432 * coresight_disable_source - Drop the reference count by 1 and disable 433 * the device if there are no users left. 434 * 435 * @csdev: The coresight device to disable 436 * 437 * Returns true if the device has been disabled. 438 */ 439 static bool coresight_disable_source(struct coresight_device *csdev) 440 { 441 if (atomic_dec_return(csdev->refcnt) == 0) { 442 if (source_ops(csdev)->disable) 443 source_ops(csdev)->disable(csdev, NULL); 444 coresight_control_assoc_ectdev(csdev, false); 445 csdev->enable = false; 446 } 447 return !csdev->enable; 448 } 449 450 /* 451 * coresight_disable_path_from : Disable components in the given path beyond 452 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 453 * disabled. 454 */ 455 static void coresight_disable_path_from(struct list_head *path, 456 struct coresight_node *nd) 457 { 458 u32 type; 459 struct coresight_device *csdev, *parent, *child; 460 461 if (!nd) 462 nd = list_first_entry(path, struct coresight_node, link); 463 464 list_for_each_entry_continue(nd, path, link) { 465 csdev = nd->csdev; 466 type = csdev->type; 467 468 /* 469 * ETF devices are tricky... They can be a link or a sink, 470 * depending on how they are configured. If an ETF has been 471 * "activated" it will be configured as a sink, otherwise 472 * go ahead with the link configuration. 473 */ 474 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 475 type = (csdev == coresight_get_sink(path)) ? 476 CORESIGHT_DEV_TYPE_SINK : 477 CORESIGHT_DEV_TYPE_LINK; 478 479 switch (type) { 480 case CORESIGHT_DEV_TYPE_SINK: 481 coresight_disable_sink(csdev); 482 break; 483 case CORESIGHT_DEV_TYPE_SOURCE: 484 /* 485 * We skip the first node in the path assuming that it 486 * is the source. So we don't expect a source device in 487 * the middle of a path. 488 */ 489 WARN_ON(1); 490 break; 491 case CORESIGHT_DEV_TYPE_LINK: 492 parent = list_prev_entry(nd, link)->csdev; 493 child = list_next_entry(nd, link)->csdev; 494 coresight_disable_link(csdev, parent, child); 495 break; 496 default: 497 break; 498 } 499 } 500 } 501 502 void coresight_disable_path(struct list_head *path) 503 { 504 coresight_disable_path_from(path, NULL); 505 } 506 EXPORT_SYMBOL_GPL(coresight_disable_path); 507 508 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 509 { 510 511 int ret = 0; 512 u32 type; 513 struct coresight_node *nd; 514 struct coresight_device *csdev, *parent, *child; 515 516 list_for_each_entry_reverse(nd, path, link) { 517 csdev = nd->csdev; 518 type = csdev->type; 519 520 /* 521 * ETF devices are tricky... They can be a link or a sink, 522 * depending on how they are configured. If an ETF has been 523 * "activated" it will be configured as a sink, otherwise 524 * go ahead with the link configuration. 525 */ 526 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 527 type = (csdev == coresight_get_sink(path)) ? 528 CORESIGHT_DEV_TYPE_SINK : 529 CORESIGHT_DEV_TYPE_LINK; 530 531 switch (type) { 532 case CORESIGHT_DEV_TYPE_SINK: 533 ret = coresight_enable_sink(csdev, mode, sink_data); 534 /* 535 * Sink is the first component turned on. If we 536 * failed to enable the sink, there are no components 537 * that need disabling. Disabling the path here 538 * would mean we could disrupt an existing session. 539 */ 540 if (ret) 541 goto out; 542 break; 543 case CORESIGHT_DEV_TYPE_SOURCE: 544 /* sources are enabled from either sysFS or Perf */ 545 break; 546 case CORESIGHT_DEV_TYPE_LINK: 547 parent = list_prev_entry(nd, link)->csdev; 548 child = list_next_entry(nd, link)->csdev; 549 ret = coresight_enable_link(csdev, parent, child); 550 if (ret) 551 goto err; 552 break; 553 default: 554 goto err; 555 } 556 } 557 558 out: 559 return ret; 560 err: 561 coresight_disable_path_from(path, nd); 562 goto out; 563 } 564 565 struct coresight_device *coresight_get_sink(struct list_head *path) 566 { 567 struct coresight_device *csdev; 568 569 if (!path) 570 return NULL; 571 572 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 573 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 574 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 575 return NULL; 576 577 return csdev; 578 } 579 580 static struct coresight_device * 581 coresight_find_enabled_sink(struct coresight_device *csdev) 582 { 583 int i; 584 struct coresight_device *sink; 585 586 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 587 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 588 csdev->activated) 589 return csdev; 590 591 /* 592 * Recursively explore each port found on this element. 593 */ 594 for (i = 0; i < csdev->pdata->nr_outport; i++) { 595 struct coresight_device *child_dev; 596 597 child_dev = csdev->pdata->conns[i].child_dev; 598 if (child_dev) 599 sink = coresight_find_enabled_sink(child_dev); 600 if (sink) 601 return sink; 602 } 603 604 return NULL; 605 } 606 607 /** 608 * coresight_get_enabled_sink - returns the first enabled sink using 609 * connection based search starting from the source reference 610 * 611 * @source: Coresight source device reference 612 */ 613 struct coresight_device * 614 coresight_get_enabled_sink(struct coresight_device *source) 615 { 616 if (!source) 617 return NULL; 618 619 return coresight_find_enabled_sink(source); 620 } 621 622 static int coresight_sink_by_id(struct device *dev, const void *data) 623 { 624 struct coresight_device *csdev = to_coresight_device(dev); 625 unsigned long hash; 626 627 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 628 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 629 630 if (!csdev->ea) 631 return 0; 632 /* 633 * See function etm_perf_add_symlink_sink() to know where 634 * this comes from. 635 */ 636 hash = (unsigned long)csdev->ea->var; 637 638 if ((u32)hash == *(u32 *)data) 639 return 1; 640 } 641 642 return 0; 643 } 644 645 /** 646 * coresight_get_sink_by_id - returns the sink that matches the id 647 * @id: Id of the sink to match 648 * 649 * The name of a sink is unique, whether it is found on the AMBA bus or 650 * otherwise. As such the hash of that name can easily be used to identify 651 * a sink. 652 */ 653 struct coresight_device *coresight_get_sink_by_id(u32 id) 654 { 655 struct device *dev = NULL; 656 657 dev = bus_find_device(&coresight_bustype, NULL, &id, 658 coresight_sink_by_id); 659 660 return dev ? to_coresight_device(dev) : NULL; 661 } 662 663 /** 664 * coresight_get_ref- Helper function to increase reference count to module 665 * and device. 666 * 667 * @csdev: The coresight device to get a reference on. 668 * 669 * Return true in successful case and power up the device. 670 * Return false when failed to get reference of module. 671 */ 672 static inline bool coresight_get_ref(struct coresight_device *csdev) 673 { 674 struct device *dev = csdev->dev.parent; 675 676 /* Make sure the driver can't be removed */ 677 if (!try_module_get(dev->driver->owner)) 678 return false; 679 /* Make sure the device can't go away */ 680 get_device(dev); 681 pm_runtime_get_sync(dev); 682 return true; 683 } 684 685 /** 686 * coresight_put_ref- Helper function to decrease reference count to module 687 * and device. Power off the device. 688 * 689 * @csdev: The coresight device to decrement a reference from. 690 */ 691 static inline void coresight_put_ref(struct coresight_device *csdev) 692 { 693 struct device *dev = csdev->dev.parent; 694 695 pm_runtime_put(dev); 696 put_device(dev); 697 module_put(dev->driver->owner); 698 } 699 700 /* 701 * coresight_grab_device - Power up this device and any of the helper 702 * devices connected to it for trace operation. Since the helper devices 703 * don't appear on the trace path, they should be handled along with the 704 * the master device. 705 */ 706 static int coresight_grab_device(struct coresight_device *csdev) 707 { 708 int i; 709 710 for (i = 0; i < csdev->pdata->nr_outport; i++) { 711 struct coresight_device *child; 712 713 child = csdev->pdata->conns[i].child_dev; 714 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 715 if (!coresight_get_ref(child)) 716 goto err; 717 } 718 if (coresight_get_ref(csdev)) 719 return 0; 720 err: 721 for (i--; i >= 0; i--) { 722 struct coresight_device *child; 723 724 child = csdev->pdata->conns[i].child_dev; 725 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 726 coresight_put_ref(child); 727 } 728 return -ENODEV; 729 } 730 731 /* 732 * coresight_drop_device - Release this device and any of the helper 733 * devices connected to it. 734 */ 735 static void coresight_drop_device(struct coresight_device *csdev) 736 { 737 int i; 738 739 coresight_put_ref(csdev); 740 for (i = 0; i < csdev->pdata->nr_outport; i++) { 741 struct coresight_device *child; 742 743 child = csdev->pdata->conns[i].child_dev; 744 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 745 coresight_put_ref(child); 746 } 747 } 748 749 /** 750 * _coresight_build_path - recursively build a path from a @csdev to a sink. 751 * @csdev: The device to start from. 752 * @sink: The final sink we want in this path. 753 * @path: The list to add devices to. 754 * 755 * The tree of Coresight device is traversed until an activated sink is 756 * found. From there the sink is added to the list along with all the 757 * devices that led to that point - the end result is a list from source 758 * to sink. In that list the source is the first device and the sink the 759 * last one. 760 */ 761 static int _coresight_build_path(struct coresight_device *csdev, 762 struct coresight_device *sink, 763 struct list_head *path) 764 { 765 int i, ret; 766 bool found = false; 767 struct coresight_node *node; 768 769 /* An activated sink has been found. Enqueue the element */ 770 if (csdev == sink) 771 goto out; 772 773 /* Not a sink - recursively explore each port found on this element */ 774 for (i = 0; i < csdev->pdata->nr_outport; i++) { 775 struct coresight_device *child_dev; 776 777 child_dev = csdev->pdata->conns[i].child_dev; 778 if (child_dev && 779 _coresight_build_path(child_dev, sink, path) == 0) { 780 found = true; 781 break; 782 } 783 } 784 785 if (!found) 786 return -ENODEV; 787 788 out: 789 /* 790 * A path from this element to a sink has been found. The elements 791 * leading to the sink are already enqueued, all that is left to do 792 * is tell the PM runtime core we need this element and add a node 793 * for it. 794 */ 795 ret = coresight_grab_device(csdev); 796 if (ret) 797 return ret; 798 799 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 800 if (!node) 801 return -ENOMEM; 802 803 node->csdev = csdev; 804 list_add(&node->link, path); 805 806 return 0; 807 } 808 809 struct list_head *coresight_build_path(struct coresight_device *source, 810 struct coresight_device *sink) 811 { 812 struct list_head *path; 813 int rc; 814 815 if (!sink) 816 return ERR_PTR(-EINVAL); 817 818 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 819 if (!path) 820 return ERR_PTR(-ENOMEM); 821 822 INIT_LIST_HEAD(path); 823 824 rc = _coresight_build_path(source, sink, path); 825 if (rc) { 826 kfree(path); 827 return ERR_PTR(rc); 828 } 829 830 return path; 831 } 832 833 /** 834 * coresight_release_path - release a previously built path. 835 * @path: the path to release. 836 * 837 * Go through all the elements of a path and 1) removed it from the list and 838 * 2) free the memory allocated for each node. 839 */ 840 void coresight_release_path(struct list_head *path) 841 { 842 struct coresight_device *csdev; 843 struct coresight_node *nd, *next; 844 845 list_for_each_entry_safe(nd, next, path, link) { 846 csdev = nd->csdev; 847 848 coresight_drop_device(csdev); 849 list_del(&nd->link); 850 kfree(nd); 851 } 852 853 kfree(path); 854 path = NULL; 855 } 856 857 /* return true if the device is a suitable type for a default sink */ 858 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 859 { 860 /* sink & correct subtype */ 861 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 862 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 863 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 864 return true; 865 return false; 866 } 867 868 /** 869 * coresight_select_best_sink - return the best sink for use as default from 870 * the two provided. 871 * 872 * @sink: current best sink. 873 * @depth: search depth where current sink was found. 874 * @new_sink: new sink for comparison with current sink. 875 * @new_depth: search depth where new sink was found. 876 * 877 * Sinks prioritised according to coresight_dev_subtype_sink, with only 878 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 879 * 880 * Where two sinks of equal priority are found, the sink closest to the 881 * source is used (smallest search depth). 882 * 883 * return @new_sink & update @depth if better than @sink, else return @sink. 884 */ 885 static struct coresight_device * 886 coresight_select_best_sink(struct coresight_device *sink, int *depth, 887 struct coresight_device *new_sink, int new_depth) 888 { 889 bool update = false; 890 891 if (!sink) { 892 /* first found at this level */ 893 update = true; 894 } else if (new_sink->subtype.sink_subtype > 895 sink->subtype.sink_subtype) { 896 /* found better sink */ 897 update = true; 898 } else if ((new_sink->subtype.sink_subtype == 899 sink->subtype.sink_subtype) && 900 (*depth > new_depth)) { 901 /* found same but closer sink */ 902 update = true; 903 } 904 905 if (update) 906 *depth = new_depth; 907 return update ? new_sink : sink; 908 } 909 910 /** 911 * coresight_find_sink - recursive function to walk trace connections from 912 * source to find a suitable default sink. 913 * 914 * @csdev: source / current device to check. 915 * @depth: [in] search depth of calling dev, [out] depth of found sink. 916 * 917 * This will walk the connection path from a source (ETM) till a suitable 918 * sink is encountered and return that sink to the original caller. 919 * 920 * If current device is a plain sink return that & depth, otherwise recursively 921 * call child connections looking for a sink. Select best possible using 922 * coresight_select_best_sink. 923 * 924 * return best sink found, or NULL if not found at this node or child nodes. 925 */ 926 static struct coresight_device * 927 coresight_find_sink(struct coresight_device *csdev, int *depth) 928 { 929 int i, curr_depth = *depth + 1, found_depth = 0; 930 struct coresight_device *found_sink = NULL; 931 932 if (coresight_is_def_sink_type(csdev)) { 933 found_depth = curr_depth; 934 found_sink = csdev; 935 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 936 goto return_def_sink; 937 /* look past LINKSINK for something better */ 938 } 939 940 /* 941 * Not a sink we want - or possible child sink may be better. 942 * recursively explore each port found on this element. 943 */ 944 for (i = 0; i < csdev->pdata->nr_outport; i++) { 945 struct coresight_device *child_dev, *sink = NULL; 946 int child_depth = curr_depth; 947 948 child_dev = csdev->pdata->conns[i].child_dev; 949 if (child_dev) 950 sink = coresight_find_sink(child_dev, &child_depth); 951 952 if (sink) 953 found_sink = coresight_select_best_sink(found_sink, 954 &found_depth, 955 sink, 956 child_depth); 957 } 958 959 return_def_sink: 960 /* return found sink and depth */ 961 if (found_sink) 962 *depth = found_depth; 963 return found_sink; 964 } 965 966 /** 967 * coresight_find_default_sink: Find a sink suitable for use as a 968 * default sink. 969 * 970 * @csdev: starting source to find a connected sink. 971 * 972 * Walks connections graph looking for a suitable sink to enable for the 973 * supplied source. Uses CoreSight device subtypes and distance from source 974 * to select the best sink. 975 * 976 * If a sink is found, then the default sink for this device is set and 977 * will be automatically used in future. 978 * 979 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 980 * sink. 981 */ 982 struct coresight_device * 983 coresight_find_default_sink(struct coresight_device *csdev) 984 { 985 int depth = 0; 986 987 /* look for a default sink if we have not found for this device */ 988 if (!csdev->def_sink) 989 csdev->def_sink = coresight_find_sink(csdev, &depth); 990 return csdev->def_sink; 991 } 992 993 static int coresight_remove_sink_ref(struct device *dev, void *data) 994 { 995 struct coresight_device *sink = data; 996 struct coresight_device *source = to_coresight_device(dev); 997 998 if (source->def_sink == sink) 999 source->def_sink = NULL; 1000 return 0; 1001 } 1002 1003 /** 1004 * coresight_clear_default_sink: Remove all default sink references to the 1005 * supplied sink. 1006 * 1007 * If supplied device is a sink, then check all the bus devices and clear 1008 * out all the references to this sink from the coresight_device def_sink 1009 * parameter. 1010 * 1011 * @csdev: coresight sink - remove references to this from all sources. 1012 */ 1013 static void coresight_clear_default_sink(struct coresight_device *csdev) 1014 { 1015 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1016 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1017 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1018 coresight_remove_sink_ref); 1019 } 1020 } 1021 1022 /** coresight_validate_source - make sure a source has the right credentials 1023 * @csdev: the device structure for a source. 1024 * @function: the function this was called from. 1025 * 1026 * Assumes the coresight_mutex is held. 1027 */ 1028 static int coresight_validate_source(struct coresight_device *csdev, 1029 const char *function) 1030 { 1031 u32 type, subtype; 1032 1033 type = csdev->type; 1034 subtype = csdev->subtype.source_subtype; 1035 1036 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1037 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1038 return -EINVAL; 1039 } 1040 1041 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1042 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { 1043 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1044 return -EINVAL; 1045 } 1046 1047 return 0; 1048 } 1049 1050 int coresight_enable(struct coresight_device *csdev) 1051 { 1052 int cpu, ret = 0; 1053 struct coresight_device *sink; 1054 struct list_head *path; 1055 enum coresight_dev_subtype_source subtype; 1056 1057 subtype = csdev->subtype.source_subtype; 1058 1059 mutex_lock(&coresight_mutex); 1060 1061 ret = coresight_validate_source(csdev, __func__); 1062 if (ret) 1063 goto out; 1064 1065 if (csdev->enable) { 1066 /* 1067 * There could be multiple applications driving the software 1068 * source. So keep the refcount for each such user when the 1069 * source is already enabled. 1070 */ 1071 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1072 atomic_inc(csdev->refcnt); 1073 goto out; 1074 } 1075 1076 sink = coresight_get_enabled_sink(csdev); 1077 if (!sink) { 1078 ret = -EINVAL; 1079 goto out; 1080 } 1081 1082 path = coresight_build_path(csdev, sink); 1083 if (IS_ERR(path)) { 1084 pr_err("building path(s) failed\n"); 1085 ret = PTR_ERR(path); 1086 goto out; 1087 } 1088 1089 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1090 if (ret) 1091 goto err_path; 1092 1093 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1094 if (ret) 1095 goto err_source; 1096 1097 switch (subtype) { 1098 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1099 /* 1100 * When working from sysFS it is important to keep track 1101 * of the paths that were created so that they can be 1102 * undone in 'coresight_disable()'. Since there can only 1103 * be a single session per tracer (when working from sysFS) 1104 * a per-cpu variable will do just fine. 1105 */ 1106 cpu = source_ops(csdev)->cpu_id(csdev); 1107 per_cpu(tracer_path, cpu) = path; 1108 break; 1109 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1110 stm_path = path; 1111 break; 1112 default: 1113 /* We can't be here */ 1114 break; 1115 } 1116 1117 out: 1118 mutex_unlock(&coresight_mutex); 1119 return ret; 1120 1121 err_source: 1122 coresight_disable_path(path); 1123 1124 err_path: 1125 coresight_release_path(path); 1126 goto out; 1127 } 1128 EXPORT_SYMBOL_GPL(coresight_enable); 1129 1130 void coresight_disable(struct coresight_device *csdev) 1131 { 1132 int cpu, ret; 1133 struct list_head *path = NULL; 1134 1135 mutex_lock(&coresight_mutex); 1136 1137 ret = coresight_validate_source(csdev, __func__); 1138 if (ret) 1139 goto out; 1140 1141 if (!csdev->enable || !coresight_disable_source(csdev)) 1142 goto out; 1143 1144 switch (csdev->subtype.source_subtype) { 1145 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1146 cpu = source_ops(csdev)->cpu_id(csdev); 1147 path = per_cpu(tracer_path, cpu); 1148 per_cpu(tracer_path, cpu) = NULL; 1149 break; 1150 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1151 path = stm_path; 1152 stm_path = NULL; 1153 break; 1154 default: 1155 /* We can't be here */ 1156 break; 1157 } 1158 1159 coresight_disable_path(path); 1160 coresight_release_path(path); 1161 1162 out: 1163 mutex_unlock(&coresight_mutex); 1164 } 1165 EXPORT_SYMBOL_GPL(coresight_disable); 1166 1167 static ssize_t enable_sink_show(struct device *dev, 1168 struct device_attribute *attr, char *buf) 1169 { 1170 struct coresight_device *csdev = to_coresight_device(dev); 1171 1172 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1173 } 1174 1175 static ssize_t enable_sink_store(struct device *dev, 1176 struct device_attribute *attr, 1177 const char *buf, size_t size) 1178 { 1179 int ret; 1180 unsigned long val; 1181 struct coresight_device *csdev = to_coresight_device(dev); 1182 1183 ret = kstrtoul(buf, 10, &val); 1184 if (ret) 1185 return ret; 1186 1187 if (val) 1188 csdev->activated = true; 1189 else 1190 csdev->activated = false; 1191 1192 return size; 1193 1194 } 1195 static DEVICE_ATTR_RW(enable_sink); 1196 1197 static ssize_t enable_source_show(struct device *dev, 1198 struct device_attribute *attr, char *buf) 1199 { 1200 struct coresight_device *csdev = to_coresight_device(dev); 1201 1202 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1203 } 1204 1205 static ssize_t enable_source_store(struct device *dev, 1206 struct device_attribute *attr, 1207 const char *buf, size_t size) 1208 { 1209 int ret = 0; 1210 unsigned long val; 1211 struct coresight_device *csdev = to_coresight_device(dev); 1212 1213 ret = kstrtoul(buf, 10, &val); 1214 if (ret) 1215 return ret; 1216 1217 if (val) { 1218 ret = coresight_enable(csdev); 1219 if (ret) 1220 return ret; 1221 } else { 1222 coresight_disable(csdev); 1223 } 1224 1225 return size; 1226 } 1227 static DEVICE_ATTR_RW(enable_source); 1228 1229 static struct attribute *coresight_sink_attrs[] = { 1230 &dev_attr_enable_sink.attr, 1231 NULL, 1232 }; 1233 ATTRIBUTE_GROUPS(coresight_sink); 1234 1235 static struct attribute *coresight_source_attrs[] = { 1236 &dev_attr_enable_source.attr, 1237 NULL, 1238 }; 1239 ATTRIBUTE_GROUPS(coresight_source); 1240 1241 static struct device_type coresight_dev_type[] = { 1242 { 1243 .name = "none", 1244 }, 1245 { 1246 .name = "sink", 1247 .groups = coresight_sink_groups, 1248 }, 1249 { 1250 .name = "link", 1251 }, 1252 { 1253 .name = "linksink", 1254 .groups = coresight_sink_groups, 1255 }, 1256 { 1257 .name = "source", 1258 .groups = coresight_source_groups, 1259 }, 1260 { 1261 .name = "helper", 1262 }, 1263 { 1264 .name = "ect", 1265 }, 1266 }; 1267 1268 static void coresight_device_release(struct device *dev) 1269 { 1270 struct coresight_device *csdev = to_coresight_device(dev); 1271 1272 fwnode_handle_put(csdev->dev.fwnode); 1273 kfree(csdev->refcnt); 1274 kfree(csdev); 1275 } 1276 1277 static int coresight_orphan_match(struct device *dev, void *data) 1278 { 1279 int i, ret = 0; 1280 bool still_orphan = false; 1281 struct coresight_device *csdev, *i_csdev; 1282 struct coresight_connection *conn; 1283 1284 csdev = data; 1285 i_csdev = to_coresight_device(dev); 1286 1287 /* No need to check oneself */ 1288 if (csdev == i_csdev) 1289 return 0; 1290 1291 /* Move on to another component if no connection is orphan */ 1292 if (!i_csdev->orphan) 1293 return 0; 1294 /* 1295 * Circle throuch all the connection of that component. If we find 1296 * an orphan connection whose name matches @csdev, link it. 1297 */ 1298 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1299 conn = &i_csdev->pdata->conns[i]; 1300 1301 /* Skip the port if FW doesn't describe it */ 1302 if (!conn->child_fwnode) 1303 continue; 1304 /* We have found at least one orphan connection */ 1305 if (conn->child_dev == NULL) { 1306 /* Does it match this newly added device? */ 1307 if (conn->child_fwnode == csdev->dev.fwnode) { 1308 ret = coresight_make_links(i_csdev, 1309 conn, csdev); 1310 if (ret) 1311 return ret; 1312 } else { 1313 /* This component still has an orphan */ 1314 still_orphan = true; 1315 } 1316 } 1317 } 1318 1319 i_csdev->orphan = still_orphan; 1320 1321 /* 1322 * Returning '0' in case we didn't encounter any error, 1323 * ensures that all known component on the bus will be checked. 1324 */ 1325 return 0; 1326 } 1327 1328 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1329 { 1330 return bus_for_each_dev(&coresight_bustype, NULL, 1331 csdev, coresight_orphan_match); 1332 } 1333 1334 1335 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1336 { 1337 int i, ret = 0; 1338 1339 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1340 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1341 1342 if (!conn->child_fwnode) 1343 continue; 1344 conn->child_dev = 1345 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1346 if (conn->child_dev) { 1347 ret = coresight_make_links(csdev, conn, 1348 conn->child_dev); 1349 if (ret) 1350 break; 1351 } else { 1352 csdev->orphan = true; 1353 } 1354 } 1355 1356 return 0; 1357 } 1358 1359 static int coresight_remove_match(struct device *dev, void *data) 1360 { 1361 int i; 1362 struct coresight_device *csdev, *iterator; 1363 struct coresight_connection *conn; 1364 1365 csdev = data; 1366 iterator = to_coresight_device(dev); 1367 1368 /* No need to check oneself */ 1369 if (csdev == iterator) 1370 return 0; 1371 1372 /* 1373 * Circle throuch all the connection of that component. If we find 1374 * a connection whose name matches @csdev, remove it. 1375 */ 1376 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1377 conn = &iterator->pdata->conns[i]; 1378 1379 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1380 continue; 1381 1382 if (csdev->dev.fwnode == conn->child_fwnode) { 1383 iterator->orphan = true; 1384 coresight_remove_links(iterator, conn); 1385 /* 1386 * Drop the reference to the handle for the remote 1387 * device acquired in parsing the connections from 1388 * platform data. 1389 */ 1390 fwnode_handle_put(conn->child_fwnode); 1391 /* No need to continue */ 1392 break; 1393 } 1394 } 1395 1396 /* 1397 * Returning '0' ensures that all known component on the 1398 * bus will be checked. 1399 */ 1400 return 0; 1401 } 1402 1403 /* 1404 * coresight_remove_conns - Remove references to this given devices 1405 * from the connections of other devices. 1406 */ 1407 static void coresight_remove_conns(struct coresight_device *csdev) 1408 { 1409 /* 1410 * Another device will point to this device only if there is 1411 * an output port connected to this one. i.e, if the device 1412 * doesn't have at least one input port, there is no point 1413 * in searching all the devices. 1414 */ 1415 if (csdev->pdata->nr_inport) 1416 bus_for_each_dev(&coresight_bustype, NULL, 1417 csdev, coresight_remove_match); 1418 } 1419 1420 /** 1421 * coresight_timeout - loop until a bit has changed to a specific state. 1422 * @addr: base address of the area of interest. 1423 * @offset: address of a register, starting from @addr. 1424 * @position: the position of the bit of interest. 1425 * @value: the value the bit should have. 1426 * 1427 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1428 * TIMEOUT_US has elapsed, which ever happens first. 1429 */ 1430 1431 int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) 1432 { 1433 int i; 1434 u32 val; 1435 1436 for (i = TIMEOUT_US; i > 0; i--) { 1437 val = __raw_readl(addr + offset); 1438 /* waiting on the bit to go from 0 to 1 */ 1439 if (value) { 1440 if (val & BIT(position)) 1441 return 0; 1442 /* waiting on the bit to go from 1 to 0 */ 1443 } else { 1444 if (!(val & BIT(position))) 1445 return 0; 1446 } 1447 1448 /* 1449 * Delay is arbitrary - the specification doesn't say how long 1450 * we are expected to wait. Extra check required to make sure 1451 * we don't wait needlessly on the last iteration. 1452 */ 1453 if (i - 1) 1454 udelay(1); 1455 } 1456 1457 return -EAGAIN; 1458 } 1459 EXPORT_SYMBOL_GPL(coresight_timeout); 1460 1461 /* 1462 * coresight_release_platform_data: Release references to the devices connected 1463 * to the output port of this device. 1464 */ 1465 void coresight_release_platform_data(struct coresight_device *csdev, 1466 struct coresight_platform_data *pdata) 1467 { 1468 int i; 1469 struct coresight_connection *conns = pdata->conns; 1470 1471 for (i = 0; i < pdata->nr_outport; i++) { 1472 /* If we have made the links, remove them now */ 1473 if (csdev && conns[i].child_dev) 1474 coresight_remove_links(csdev, &conns[i]); 1475 /* 1476 * Drop the refcount and clear the handle as this device 1477 * is going away 1478 */ 1479 if (conns[i].child_fwnode) { 1480 fwnode_handle_put(conns[i].child_fwnode); 1481 pdata->conns[i].child_fwnode = NULL; 1482 } 1483 } 1484 if (csdev) 1485 coresight_remove_conns_sysfs_group(csdev); 1486 } 1487 1488 struct coresight_device *coresight_register(struct coresight_desc *desc) 1489 { 1490 int ret; 1491 int link_subtype; 1492 int nr_refcnts = 1; 1493 atomic_t *refcnts = NULL; 1494 struct coresight_device *csdev; 1495 1496 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1497 if (!csdev) { 1498 ret = -ENOMEM; 1499 goto err_out; 1500 } 1501 1502 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1503 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1504 link_subtype = desc->subtype.link_subtype; 1505 1506 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1507 nr_refcnts = desc->pdata->nr_inport; 1508 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1509 nr_refcnts = desc->pdata->nr_outport; 1510 } 1511 1512 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1513 if (!refcnts) { 1514 ret = -ENOMEM; 1515 goto err_free_csdev; 1516 } 1517 1518 csdev->refcnt = refcnts; 1519 1520 csdev->pdata = desc->pdata; 1521 1522 csdev->type = desc->type; 1523 csdev->subtype = desc->subtype; 1524 csdev->ops = desc->ops; 1525 csdev->orphan = false; 1526 1527 csdev->dev.type = &coresight_dev_type[desc->type]; 1528 csdev->dev.groups = desc->groups; 1529 csdev->dev.parent = desc->dev; 1530 csdev->dev.release = coresight_device_release; 1531 csdev->dev.bus = &coresight_bustype; 1532 /* 1533 * Hold the reference to our parent device. This will be 1534 * dropped only in coresight_device_release(). 1535 */ 1536 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1537 dev_set_name(&csdev->dev, "%s", desc->name); 1538 1539 ret = device_register(&csdev->dev); 1540 if (ret) { 1541 put_device(&csdev->dev); 1542 /* 1543 * All resources are free'd explicitly via 1544 * coresight_device_release(), triggered from put_device(). 1545 */ 1546 goto err_out; 1547 } 1548 1549 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1550 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1551 ret = etm_perf_add_symlink_sink(csdev); 1552 1553 if (ret) { 1554 device_unregister(&csdev->dev); 1555 /* 1556 * As with the above, all resources are free'd 1557 * explicitly via coresight_device_release() triggered 1558 * from put_device(), which is in turn called from 1559 * function device_unregister(). 1560 */ 1561 goto err_out; 1562 } 1563 } 1564 1565 mutex_lock(&coresight_mutex); 1566 1567 ret = coresight_create_conns_sysfs_group(csdev); 1568 if (!ret) 1569 ret = coresight_fixup_device_conns(csdev); 1570 if (!ret) 1571 ret = coresight_fixup_orphan_conns(csdev); 1572 if (!ret && cti_assoc_ops && cti_assoc_ops->add) 1573 cti_assoc_ops->add(csdev); 1574 1575 mutex_unlock(&coresight_mutex); 1576 if (ret) { 1577 coresight_unregister(csdev); 1578 return ERR_PTR(ret); 1579 } 1580 1581 return csdev; 1582 1583 err_free_csdev: 1584 kfree(csdev); 1585 err_out: 1586 /* Cleanup the connection information */ 1587 coresight_release_platform_data(NULL, desc->pdata); 1588 return ERR_PTR(ret); 1589 } 1590 EXPORT_SYMBOL_GPL(coresight_register); 1591 1592 void coresight_unregister(struct coresight_device *csdev) 1593 { 1594 etm_perf_del_symlink_sink(csdev); 1595 /* Remove references of that device in the topology */ 1596 if (cti_assoc_ops && cti_assoc_ops->remove) 1597 cti_assoc_ops->remove(csdev); 1598 coresight_remove_conns(csdev); 1599 coresight_clear_default_sink(csdev); 1600 coresight_release_platform_data(csdev, csdev->pdata); 1601 device_unregister(&csdev->dev); 1602 } 1603 EXPORT_SYMBOL_GPL(coresight_unregister); 1604 1605 1606 /* 1607 * coresight_search_device_idx - Search the fwnode handle of a device 1608 * in the given dev_idx list. Must be called with the coresight_mutex held. 1609 * 1610 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1611 */ 1612 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1613 struct fwnode_handle *fwnode) 1614 { 1615 int i; 1616 1617 for (i = 0; i < dict->nr_idx; i++) 1618 if (dict->fwnode_list[i] == fwnode) 1619 return i; 1620 return -ENOENT; 1621 } 1622 1623 bool coresight_loses_context_with_cpu(struct device *dev) 1624 { 1625 return fwnode_property_present(dev_fwnode(dev), 1626 "arm,coresight-loses-context-with-cpu"); 1627 } 1628 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1629 1630 /* 1631 * coresight_alloc_device_name - Get an index for a given device in the 1632 * device index list specific to a driver. An index is allocated for a 1633 * device and is tracked with the fwnode_handle to prevent allocating 1634 * duplicate indices for the same device (e.g, if we defer probing of 1635 * a device due to dependencies), in case the index is requested again. 1636 */ 1637 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1638 struct device *dev) 1639 { 1640 int idx; 1641 char *name = NULL; 1642 struct fwnode_handle **list; 1643 1644 mutex_lock(&coresight_mutex); 1645 1646 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1647 if (idx < 0) { 1648 /* Make space for the new entry */ 1649 idx = dict->nr_idx; 1650 list = krealloc(dict->fwnode_list, 1651 (idx + 1) * sizeof(*dict->fwnode_list), 1652 GFP_KERNEL); 1653 if (ZERO_OR_NULL_PTR(list)) { 1654 idx = -ENOMEM; 1655 goto done; 1656 } 1657 1658 list[idx] = dev_fwnode(dev); 1659 dict->fwnode_list = list; 1660 dict->nr_idx = idx + 1; 1661 } 1662 1663 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1664 done: 1665 mutex_unlock(&coresight_mutex); 1666 return name; 1667 } 1668 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1669 1670 struct bus_type coresight_bustype = { 1671 .name = "coresight", 1672 }; 1673 1674 static int __init coresight_init(void) 1675 { 1676 int ret; 1677 1678 ret = bus_register(&coresight_bustype); 1679 if (ret) 1680 return ret; 1681 1682 ret = etm_perf_init(); 1683 if (ret) 1684 bus_unregister(&coresight_bustype); 1685 1686 return ret; 1687 } 1688 1689 static void __exit coresight_exit(void) 1690 { 1691 etm_perf_exit(); 1692 bus_unregister(&coresight_bustype); 1693 } 1694 1695 module_init(coresight_init); 1696 module_exit(coresight_exit); 1697 1698 MODULE_LICENSE("GPL v2"); 1699 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1700 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1701 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1702