1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/slab.h> 14 #include <linux/stringhash.h> 15 #include <linux/mutex.h> 16 #include <linux/clk.h> 17 #include <linux/coresight.h> 18 #include <linux/of_platform.h> 19 #include <linux/delay.h> 20 #include <linux/pm_runtime.h> 21 22 #include "coresight-etm-perf.h" 23 #include "coresight-priv.h" 24 25 static DEFINE_MUTEX(coresight_mutex); 26 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink); 27 28 /** 29 * struct coresight_node - elements of a path, from source to sink 30 * @csdev: Address of an element. 31 * @link: hook to the list. 32 */ 33 struct coresight_node { 34 struct coresight_device *csdev; 35 struct list_head link; 36 }; 37 38 /* 39 * When operating Coresight drivers from the sysFS interface, only a single 40 * path can exist from a tracer (associated to a CPU) to a sink. 41 */ 42 static DEFINE_PER_CPU(struct list_head *, tracer_path); 43 44 /* 45 * As of this writing only a single STM can be found in CS topologies. Since 46 * there is no way to know if we'll ever see more and what kind of 47 * configuration they will enact, for the time being only define a single path 48 * for STM. 49 */ 50 static struct list_head *stm_path; 51 52 /* 53 * When losing synchronisation a new barrier packet needs to be inserted at the 54 * beginning of the data collected in a buffer. That way the decoder knows that 55 * it needs to look for another sync sequence. 56 */ 57 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 58 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 59 60 static const struct cti_assoc_op *cti_assoc_ops; 61 62 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 63 { 64 cti_assoc_ops = cti_op; 65 } 66 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 67 68 void coresight_remove_cti_ops(void) 69 { 70 cti_assoc_ops = NULL; 71 } 72 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 73 74 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) 75 { 76 per_cpu(csdev_sink, cpu) = csdev; 77 } 78 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); 79 80 struct coresight_device *coresight_get_percpu_sink(int cpu) 81 { 82 return per_cpu(csdev_sink, cpu); 83 } 84 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); 85 86 static int coresight_id_match(struct device *dev, void *data) 87 { 88 int trace_id, i_trace_id; 89 struct coresight_device *csdev, *i_csdev; 90 91 csdev = data; 92 i_csdev = to_coresight_device(dev); 93 94 /* 95 * No need to care about oneself and components that are not 96 * sources or not enabled 97 */ 98 if (i_csdev == csdev || !i_csdev->enable || 99 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 100 return 0; 101 102 /* Get the source ID for both components */ 103 trace_id = source_ops(csdev)->trace_id(csdev); 104 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); 105 106 /* All you need is one */ 107 if (trace_id == i_trace_id) 108 return 1; 109 110 return 0; 111 } 112 113 static int coresight_source_is_unique(struct coresight_device *csdev) 114 { 115 int trace_id = source_ops(csdev)->trace_id(csdev); 116 117 /* this shouldn't happen */ 118 if (trace_id < 0) 119 return 0; 120 121 return !bus_for_each_dev(&coresight_bustype, NULL, 122 csdev, coresight_id_match); 123 } 124 125 static int coresight_find_link_inport(struct coresight_device *csdev, 126 struct coresight_device *parent) 127 { 128 int i; 129 struct coresight_connection *conn; 130 131 for (i = 0; i < parent->pdata->nr_outport; i++) { 132 conn = &parent->pdata->conns[i]; 133 if (conn->child_dev == csdev) 134 return conn->child_port; 135 } 136 137 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 138 dev_name(&parent->dev), dev_name(&csdev->dev)); 139 140 return -ENODEV; 141 } 142 143 static int coresight_find_link_outport(struct coresight_device *csdev, 144 struct coresight_device *child) 145 { 146 int i; 147 struct coresight_connection *conn; 148 149 for (i = 0; i < csdev->pdata->nr_outport; i++) { 150 conn = &csdev->pdata->conns[i]; 151 if (conn->child_dev == child) 152 return conn->outport; 153 } 154 155 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 156 dev_name(&csdev->dev), dev_name(&child->dev)); 157 158 return -ENODEV; 159 } 160 161 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev) 162 { 163 return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR); 164 } 165 166 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev) 167 { 168 return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED; 169 } 170 171 static inline bool coresight_is_claimed_any(struct coresight_device *csdev) 172 { 173 return coresight_read_claim_tags(csdev) != 0; 174 } 175 176 static inline void coresight_set_claim_tags(struct coresight_device *csdev) 177 { 178 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 179 CORESIGHT_CLAIMSET); 180 isb(); 181 } 182 183 static inline void coresight_clear_claim_tags(struct coresight_device *csdev) 184 { 185 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 186 CORESIGHT_CLAIMCLR); 187 isb(); 188 } 189 190 /* 191 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 192 * to prevent an external tool from touching this device. As per PSCI 193 * standards, section "Preserving the execution context" => "Debug and Trace 194 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 195 * DBGCLAIM[0] is reserved for external tools. 196 * 197 * Called with CS_UNLOCKed for the component. 198 * Returns : 0 on success 199 */ 200 int coresight_claim_device_unlocked(struct coresight_device *csdev) 201 { 202 if (WARN_ON(!csdev)) 203 return -EINVAL; 204 205 if (coresight_is_claimed_any(csdev)) 206 return -EBUSY; 207 208 coresight_set_claim_tags(csdev); 209 if (coresight_is_claimed_self_hosted(csdev)) 210 return 0; 211 /* There was a race setting the tags, clean up and fail */ 212 coresight_clear_claim_tags(csdev); 213 return -EBUSY; 214 } 215 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 216 217 int coresight_claim_device(struct coresight_device *csdev) 218 { 219 int rc; 220 221 if (WARN_ON(!csdev)) 222 return -EINVAL; 223 224 CS_UNLOCK(csdev->access.base); 225 rc = coresight_claim_device_unlocked(csdev); 226 CS_LOCK(csdev->access.base); 227 228 return rc; 229 } 230 EXPORT_SYMBOL_GPL(coresight_claim_device); 231 232 /* 233 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 234 * Called with CS_UNLOCKed for the component. 235 */ 236 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 237 { 238 239 if (WARN_ON(!csdev)) 240 return; 241 242 if (coresight_is_claimed_self_hosted(csdev)) 243 coresight_clear_claim_tags(csdev); 244 else 245 /* 246 * The external agent may have not honoured our claim 247 * and has manipulated it. Or something else has seriously 248 * gone wrong in our driver. 249 */ 250 WARN_ON_ONCE(1); 251 } 252 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 253 254 void coresight_disclaim_device(struct coresight_device *csdev) 255 { 256 if (WARN_ON(!csdev)) 257 return; 258 259 CS_UNLOCK(csdev->access.base); 260 coresight_disclaim_device_unlocked(csdev); 261 CS_LOCK(csdev->access.base); 262 } 263 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 264 265 /* enable or disable an associated CTI device of the supplied CS device */ 266 static int 267 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 268 { 269 int ect_ret = 0; 270 struct coresight_device *ect_csdev = csdev->ect_dev; 271 struct module *mod; 272 273 if (!ect_csdev) 274 return 0; 275 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 276 return 0; 277 278 mod = ect_csdev->dev.parent->driver->owner; 279 if (enable) { 280 if (try_module_get(mod)) { 281 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 282 if (ect_ret) { 283 module_put(mod); 284 } else { 285 get_device(ect_csdev->dev.parent); 286 csdev->ect_enabled = true; 287 } 288 } else 289 ect_ret = -ENODEV; 290 } else { 291 if (csdev->ect_enabled) { 292 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 293 put_device(ect_csdev->dev.parent); 294 module_put(mod); 295 csdev->ect_enabled = false; 296 } 297 } 298 299 /* output warning if ECT enable is preventing trace operation */ 300 if (ect_ret) 301 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 302 dev_name(&ect_csdev->dev), 303 enable ? "enable" : "disable"); 304 return ect_ret; 305 } 306 307 /* 308 * Set the associated ect / cti device while holding the coresight_mutex 309 * to avoid a race with coresight_enable that may try to use this value. 310 */ 311 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 312 struct coresight_device *ect_csdev) 313 { 314 mutex_lock(&coresight_mutex); 315 csdev->ect_dev = ect_csdev; 316 mutex_unlock(&coresight_mutex); 317 } 318 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 319 320 static int coresight_enable_sink(struct coresight_device *csdev, 321 u32 mode, void *data) 322 { 323 int ret; 324 325 /* 326 * We need to make sure the "new" session is compatible with the 327 * existing "mode" of operation. 328 */ 329 if (!sink_ops(csdev)->enable) 330 return -EINVAL; 331 332 ret = coresight_control_assoc_ectdev(csdev, true); 333 if (ret) 334 return ret; 335 ret = sink_ops(csdev)->enable(csdev, mode, data); 336 if (ret) { 337 coresight_control_assoc_ectdev(csdev, false); 338 return ret; 339 } 340 csdev->enable = true; 341 342 return 0; 343 } 344 345 static void coresight_disable_sink(struct coresight_device *csdev) 346 { 347 int ret; 348 349 if (!sink_ops(csdev)->disable) 350 return; 351 352 ret = sink_ops(csdev)->disable(csdev); 353 if (ret) 354 return; 355 coresight_control_assoc_ectdev(csdev, false); 356 csdev->enable = false; 357 } 358 359 static int coresight_enable_link(struct coresight_device *csdev, 360 struct coresight_device *parent, 361 struct coresight_device *child) 362 { 363 int ret = 0; 364 int link_subtype; 365 int inport, outport; 366 367 if (!parent || !child) 368 return -EINVAL; 369 370 inport = coresight_find_link_inport(csdev, parent); 371 outport = coresight_find_link_outport(csdev, child); 372 link_subtype = csdev->subtype.link_subtype; 373 374 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 375 return inport; 376 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 377 return outport; 378 379 if (link_ops(csdev)->enable) { 380 ret = coresight_control_assoc_ectdev(csdev, true); 381 if (!ret) { 382 ret = link_ops(csdev)->enable(csdev, inport, outport); 383 if (ret) 384 coresight_control_assoc_ectdev(csdev, false); 385 } 386 } 387 388 if (!ret) 389 csdev->enable = true; 390 391 return ret; 392 } 393 394 static void coresight_disable_link(struct coresight_device *csdev, 395 struct coresight_device *parent, 396 struct coresight_device *child) 397 { 398 int i, nr_conns; 399 int link_subtype; 400 int inport, outport; 401 402 if (!parent || !child) 403 return; 404 405 inport = coresight_find_link_inport(csdev, parent); 406 outport = coresight_find_link_outport(csdev, child); 407 link_subtype = csdev->subtype.link_subtype; 408 409 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 410 nr_conns = csdev->pdata->nr_inport; 411 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 412 nr_conns = csdev->pdata->nr_outport; 413 } else { 414 nr_conns = 1; 415 } 416 417 if (link_ops(csdev)->disable) { 418 link_ops(csdev)->disable(csdev, inport, outport); 419 coresight_control_assoc_ectdev(csdev, false); 420 } 421 422 for (i = 0; i < nr_conns; i++) 423 if (atomic_read(&csdev->refcnt[i]) != 0) 424 return; 425 426 csdev->enable = false; 427 } 428 429 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 430 { 431 int ret; 432 433 if (!coresight_source_is_unique(csdev)) { 434 dev_warn(&csdev->dev, "traceID %d not unique\n", 435 source_ops(csdev)->trace_id(csdev)); 436 return -EINVAL; 437 } 438 439 if (!csdev->enable) { 440 if (source_ops(csdev)->enable) { 441 ret = coresight_control_assoc_ectdev(csdev, true); 442 if (ret) 443 return ret; 444 ret = source_ops(csdev)->enable(csdev, NULL, mode); 445 if (ret) { 446 coresight_control_assoc_ectdev(csdev, false); 447 return ret; 448 } 449 } 450 csdev->enable = true; 451 } 452 453 atomic_inc(csdev->refcnt); 454 455 return 0; 456 } 457 458 /** 459 * coresight_disable_source - Drop the reference count by 1 and disable 460 * the device if there are no users left. 461 * 462 * @csdev: The coresight device to disable 463 * 464 * Returns true if the device has been disabled. 465 */ 466 static bool coresight_disable_source(struct coresight_device *csdev) 467 { 468 if (atomic_dec_return(csdev->refcnt) == 0) { 469 if (source_ops(csdev)->disable) 470 source_ops(csdev)->disable(csdev, NULL); 471 coresight_control_assoc_ectdev(csdev, false); 472 csdev->enable = false; 473 } 474 return !csdev->enable; 475 } 476 477 /* 478 * coresight_disable_path_from : Disable components in the given path beyond 479 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 480 * disabled. 481 */ 482 static void coresight_disable_path_from(struct list_head *path, 483 struct coresight_node *nd) 484 { 485 u32 type; 486 struct coresight_device *csdev, *parent, *child; 487 488 if (!nd) 489 nd = list_first_entry(path, struct coresight_node, link); 490 491 list_for_each_entry_continue(nd, path, link) { 492 csdev = nd->csdev; 493 type = csdev->type; 494 495 /* 496 * ETF devices are tricky... They can be a link or a sink, 497 * depending on how they are configured. If an ETF has been 498 * "activated" it will be configured as a sink, otherwise 499 * go ahead with the link configuration. 500 */ 501 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 502 type = (csdev == coresight_get_sink(path)) ? 503 CORESIGHT_DEV_TYPE_SINK : 504 CORESIGHT_DEV_TYPE_LINK; 505 506 switch (type) { 507 case CORESIGHT_DEV_TYPE_SINK: 508 coresight_disable_sink(csdev); 509 break; 510 case CORESIGHT_DEV_TYPE_SOURCE: 511 /* 512 * We skip the first node in the path assuming that it 513 * is the source. So we don't expect a source device in 514 * the middle of a path. 515 */ 516 WARN_ON(1); 517 break; 518 case CORESIGHT_DEV_TYPE_LINK: 519 parent = list_prev_entry(nd, link)->csdev; 520 child = list_next_entry(nd, link)->csdev; 521 coresight_disable_link(csdev, parent, child); 522 break; 523 default: 524 break; 525 } 526 } 527 } 528 529 void coresight_disable_path(struct list_head *path) 530 { 531 coresight_disable_path_from(path, NULL); 532 } 533 EXPORT_SYMBOL_GPL(coresight_disable_path); 534 535 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 536 { 537 538 int ret = 0; 539 u32 type; 540 struct coresight_node *nd; 541 struct coresight_device *csdev, *parent, *child; 542 543 list_for_each_entry_reverse(nd, path, link) { 544 csdev = nd->csdev; 545 type = csdev->type; 546 547 /* 548 * ETF devices are tricky... They can be a link or a sink, 549 * depending on how they are configured. If an ETF has been 550 * "activated" it will be configured as a sink, otherwise 551 * go ahead with the link configuration. 552 */ 553 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 554 type = (csdev == coresight_get_sink(path)) ? 555 CORESIGHT_DEV_TYPE_SINK : 556 CORESIGHT_DEV_TYPE_LINK; 557 558 switch (type) { 559 case CORESIGHT_DEV_TYPE_SINK: 560 ret = coresight_enable_sink(csdev, mode, sink_data); 561 /* 562 * Sink is the first component turned on. If we 563 * failed to enable the sink, there are no components 564 * that need disabling. Disabling the path here 565 * would mean we could disrupt an existing session. 566 */ 567 if (ret) 568 goto out; 569 break; 570 case CORESIGHT_DEV_TYPE_SOURCE: 571 /* sources are enabled from either sysFS or Perf */ 572 break; 573 case CORESIGHT_DEV_TYPE_LINK: 574 parent = list_prev_entry(nd, link)->csdev; 575 child = list_next_entry(nd, link)->csdev; 576 ret = coresight_enable_link(csdev, parent, child); 577 if (ret) 578 goto err; 579 break; 580 default: 581 goto err; 582 } 583 } 584 585 out: 586 return ret; 587 err: 588 coresight_disable_path_from(path, nd); 589 goto out; 590 } 591 592 struct coresight_device *coresight_get_sink(struct list_head *path) 593 { 594 struct coresight_device *csdev; 595 596 if (!path) 597 return NULL; 598 599 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 600 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 601 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 602 return NULL; 603 604 return csdev; 605 } 606 607 static struct coresight_device * 608 coresight_find_enabled_sink(struct coresight_device *csdev) 609 { 610 int i; 611 struct coresight_device *sink; 612 613 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 614 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 615 csdev->activated) 616 return csdev; 617 618 /* 619 * Recursively explore each port found on this element. 620 */ 621 for (i = 0; i < csdev->pdata->nr_outport; i++) { 622 struct coresight_device *child_dev; 623 624 child_dev = csdev->pdata->conns[i].child_dev; 625 if (child_dev) 626 sink = coresight_find_enabled_sink(child_dev); 627 if (sink) 628 return sink; 629 } 630 631 return NULL; 632 } 633 634 /** 635 * coresight_get_enabled_sink - returns the first enabled sink using 636 * connection based search starting from the source reference 637 * 638 * @source: Coresight source device reference 639 */ 640 struct coresight_device * 641 coresight_get_enabled_sink(struct coresight_device *source) 642 { 643 if (!source) 644 return NULL; 645 646 return coresight_find_enabled_sink(source); 647 } 648 649 static int coresight_sink_by_id(struct device *dev, const void *data) 650 { 651 struct coresight_device *csdev = to_coresight_device(dev); 652 unsigned long hash; 653 654 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 655 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 656 657 if (!csdev->ea) 658 return 0; 659 /* 660 * See function etm_perf_add_symlink_sink() to know where 661 * this comes from. 662 */ 663 hash = (unsigned long)csdev->ea->var; 664 665 if ((u32)hash == *(u32 *)data) 666 return 1; 667 } 668 669 return 0; 670 } 671 672 /** 673 * coresight_get_sink_by_id - returns the sink that matches the id 674 * @id: Id of the sink to match 675 * 676 * The name of a sink is unique, whether it is found on the AMBA bus or 677 * otherwise. As such the hash of that name can easily be used to identify 678 * a sink. 679 */ 680 struct coresight_device *coresight_get_sink_by_id(u32 id) 681 { 682 struct device *dev = NULL; 683 684 dev = bus_find_device(&coresight_bustype, NULL, &id, 685 coresight_sink_by_id); 686 687 return dev ? to_coresight_device(dev) : NULL; 688 } 689 690 /** 691 * coresight_get_ref- Helper function to increase reference count to module 692 * and device. 693 * 694 * @csdev: The coresight device to get a reference on. 695 * 696 * Return true in successful case and power up the device. 697 * Return false when failed to get reference of module. 698 */ 699 static inline bool coresight_get_ref(struct coresight_device *csdev) 700 { 701 struct device *dev = csdev->dev.parent; 702 703 /* Make sure the driver can't be removed */ 704 if (!try_module_get(dev->driver->owner)) 705 return false; 706 /* Make sure the device can't go away */ 707 get_device(dev); 708 pm_runtime_get_sync(dev); 709 return true; 710 } 711 712 /** 713 * coresight_put_ref- Helper function to decrease reference count to module 714 * and device. Power off the device. 715 * 716 * @csdev: The coresight device to decrement a reference from. 717 */ 718 static inline void coresight_put_ref(struct coresight_device *csdev) 719 { 720 struct device *dev = csdev->dev.parent; 721 722 pm_runtime_put(dev); 723 put_device(dev); 724 module_put(dev->driver->owner); 725 } 726 727 /* 728 * coresight_grab_device - Power up this device and any of the helper 729 * devices connected to it for trace operation. Since the helper devices 730 * don't appear on the trace path, they should be handled along with the 731 * the master device. 732 */ 733 static int coresight_grab_device(struct coresight_device *csdev) 734 { 735 int i; 736 737 for (i = 0; i < csdev->pdata->nr_outport; i++) { 738 struct coresight_device *child; 739 740 child = csdev->pdata->conns[i].child_dev; 741 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 742 if (!coresight_get_ref(child)) 743 goto err; 744 } 745 if (coresight_get_ref(csdev)) 746 return 0; 747 err: 748 for (i--; i >= 0; i--) { 749 struct coresight_device *child; 750 751 child = csdev->pdata->conns[i].child_dev; 752 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 753 coresight_put_ref(child); 754 } 755 return -ENODEV; 756 } 757 758 /* 759 * coresight_drop_device - Release this device and any of the helper 760 * devices connected to it. 761 */ 762 static void coresight_drop_device(struct coresight_device *csdev) 763 { 764 int i; 765 766 coresight_put_ref(csdev); 767 for (i = 0; i < csdev->pdata->nr_outport; i++) { 768 struct coresight_device *child; 769 770 child = csdev->pdata->conns[i].child_dev; 771 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 772 coresight_put_ref(child); 773 } 774 } 775 776 /** 777 * _coresight_build_path - recursively build a path from a @csdev to a sink. 778 * @csdev: The device to start from. 779 * @sink: The final sink we want in this path. 780 * @path: The list to add devices to. 781 * 782 * The tree of Coresight device is traversed until an activated sink is 783 * found. From there the sink is added to the list along with all the 784 * devices that led to that point - the end result is a list from source 785 * to sink. In that list the source is the first device and the sink the 786 * last one. 787 */ 788 static int _coresight_build_path(struct coresight_device *csdev, 789 struct coresight_device *sink, 790 struct list_head *path) 791 { 792 int i, ret; 793 bool found = false; 794 struct coresight_node *node; 795 796 /* An activated sink has been found. Enqueue the element */ 797 if (csdev == sink) 798 goto out; 799 800 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && 801 sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { 802 if (_coresight_build_path(sink, sink, path) == 0) { 803 found = true; 804 goto out; 805 } 806 } 807 808 /* Not a sink - recursively explore each port found on this element */ 809 for (i = 0; i < csdev->pdata->nr_outport; i++) { 810 struct coresight_device *child_dev; 811 812 child_dev = csdev->pdata->conns[i].child_dev; 813 if (child_dev && 814 _coresight_build_path(child_dev, sink, path) == 0) { 815 found = true; 816 break; 817 } 818 } 819 820 if (!found) 821 return -ENODEV; 822 823 out: 824 /* 825 * A path from this element to a sink has been found. The elements 826 * leading to the sink are already enqueued, all that is left to do 827 * is tell the PM runtime core we need this element and add a node 828 * for it. 829 */ 830 ret = coresight_grab_device(csdev); 831 if (ret) 832 return ret; 833 834 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 835 if (!node) 836 return -ENOMEM; 837 838 node->csdev = csdev; 839 list_add(&node->link, path); 840 841 return 0; 842 } 843 844 struct list_head *coresight_build_path(struct coresight_device *source, 845 struct coresight_device *sink) 846 { 847 struct list_head *path; 848 int rc; 849 850 if (!sink) 851 return ERR_PTR(-EINVAL); 852 853 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 854 if (!path) 855 return ERR_PTR(-ENOMEM); 856 857 INIT_LIST_HEAD(path); 858 859 rc = _coresight_build_path(source, sink, path); 860 if (rc) { 861 kfree(path); 862 return ERR_PTR(rc); 863 } 864 865 return path; 866 } 867 868 /** 869 * coresight_release_path - release a previously built path. 870 * @path: the path to release. 871 * 872 * Go through all the elements of a path and 1) removed it from the list and 873 * 2) free the memory allocated for each node. 874 */ 875 void coresight_release_path(struct list_head *path) 876 { 877 struct coresight_device *csdev; 878 struct coresight_node *nd, *next; 879 880 list_for_each_entry_safe(nd, next, path, link) { 881 csdev = nd->csdev; 882 883 coresight_drop_device(csdev); 884 list_del(&nd->link); 885 kfree(nd); 886 } 887 888 kfree(path); 889 path = NULL; 890 } 891 892 /* return true if the device is a suitable type for a default sink */ 893 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 894 { 895 /* sink & correct subtype */ 896 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 897 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 898 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 899 return true; 900 return false; 901 } 902 903 /** 904 * coresight_select_best_sink - return the best sink for use as default from 905 * the two provided. 906 * 907 * @sink: current best sink. 908 * @depth: search depth where current sink was found. 909 * @new_sink: new sink for comparison with current sink. 910 * @new_depth: search depth where new sink was found. 911 * 912 * Sinks prioritised according to coresight_dev_subtype_sink, with only 913 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 914 * 915 * Where two sinks of equal priority are found, the sink closest to the 916 * source is used (smallest search depth). 917 * 918 * return @new_sink & update @depth if better than @sink, else return @sink. 919 */ 920 static struct coresight_device * 921 coresight_select_best_sink(struct coresight_device *sink, int *depth, 922 struct coresight_device *new_sink, int new_depth) 923 { 924 bool update = false; 925 926 if (!sink) { 927 /* first found at this level */ 928 update = true; 929 } else if (new_sink->subtype.sink_subtype > 930 sink->subtype.sink_subtype) { 931 /* found better sink */ 932 update = true; 933 } else if ((new_sink->subtype.sink_subtype == 934 sink->subtype.sink_subtype) && 935 (*depth > new_depth)) { 936 /* found same but closer sink */ 937 update = true; 938 } 939 940 if (update) 941 *depth = new_depth; 942 return update ? new_sink : sink; 943 } 944 945 /** 946 * coresight_find_sink - recursive function to walk trace connections from 947 * source to find a suitable default sink. 948 * 949 * @csdev: source / current device to check. 950 * @depth: [in] search depth of calling dev, [out] depth of found sink. 951 * 952 * This will walk the connection path from a source (ETM) till a suitable 953 * sink is encountered and return that sink to the original caller. 954 * 955 * If current device is a plain sink return that & depth, otherwise recursively 956 * call child connections looking for a sink. Select best possible using 957 * coresight_select_best_sink. 958 * 959 * return best sink found, or NULL if not found at this node or child nodes. 960 */ 961 static struct coresight_device * 962 coresight_find_sink(struct coresight_device *csdev, int *depth) 963 { 964 int i, curr_depth = *depth + 1, found_depth = 0; 965 struct coresight_device *found_sink = NULL; 966 967 if (coresight_is_def_sink_type(csdev)) { 968 found_depth = curr_depth; 969 found_sink = csdev; 970 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 971 goto return_def_sink; 972 /* look past LINKSINK for something better */ 973 } 974 975 /* 976 * Not a sink we want - or possible child sink may be better. 977 * recursively explore each port found on this element. 978 */ 979 for (i = 0; i < csdev->pdata->nr_outport; i++) { 980 struct coresight_device *child_dev, *sink = NULL; 981 int child_depth = curr_depth; 982 983 child_dev = csdev->pdata->conns[i].child_dev; 984 if (child_dev) 985 sink = coresight_find_sink(child_dev, &child_depth); 986 987 if (sink) 988 found_sink = coresight_select_best_sink(found_sink, 989 &found_depth, 990 sink, 991 child_depth); 992 } 993 994 return_def_sink: 995 /* return found sink and depth */ 996 if (found_sink) 997 *depth = found_depth; 998 return found_sink; 999 } 1000 1001 /** 1002 * coresight_find_default_sink: Find a sink suitable for use as a 1003 * default sink. 1004 * 1005 * @csdev: starting source to find a connected sink. 1006 * 1007 * Walks connections graph looking for a suitable sink to enable for the 1008 * supplied source. Uses CoreSight device subtypes and distance from source 1009 * to select the best sink. 1010 * 1011 * If a sink is found, then the default sink for this device is set and 1012 * will be automatically used in future. 1013 * 1014 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 1015 * sink. 1016 */ 1017 struct coresight_device * 1018 coresight_find_default_sink(struct coresight_device *csdev) 1019 { 1020 int depth = 0; 1021 1022 /* look for a default sink if we have not found for this device */ 1023 if (!csdev->def_sink) { 1024 if (coresight_is_percpu_source(csdev)) 1025 csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); 1026 if (!csdev->def_sink) 1027 csdev->def_sink = coresight_find_sink(csdev, &depth); 1028 } 1029 return csdev->def_sink; 1030 } 1031 1032 static int coresight_remove_sink_ref(struct device *dev, void *data) 1033 { 1034 struct coresight_device *sink = data; 1035 struct coresight_device *source = to_coresight_device(dev); 1036 1037 if (source->def_sink == sink) 1038 source->def_sink = NULL; 1039 return 0; 1040 } 1041 1042 /** 1043 * coresight_clear_default_sink: Remove all default sink references to the 1044 * supplied sink. 1045 * 1046 * If supplied device is a sink, then check all the bus devices and clear 1047 * out all the references to this sink from the coresight_device def_sink 1048 * parameter. 1049 * 1050 * @csdev: coresight sink - remove references to this from all sources. 1051 */ 1052 static void coresight_clear_default_sink(struct coresight_device *csdev) 1053 { 1054 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1055 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1056 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1057 coresight_remove_sink_ref); 1058 } 1059 } 1060 1061 /** coresight_validate_source - make sure a source has the right credentials 1062 * @csdev: the device structure for a source. 1063 * @function: the function this was called from. 1064 * 1065 * Assumes the coresight_mutex is held. 1066 */ 1067 static int coresight_validate_source(struct coresight_device *csdev, 1068 const char *function) 1069 { 1070 u32 type, subtype; 1071 1072 type = csdev->type; 1073 subtype = csdev->subtype.source_subtype; 1074 1075 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1076 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1077 return -EINVAL; 1078 } 1079 1080 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1081 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { 1082 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1083 return -EINVAL; 1084 } 1085 1086 return 0; 1087 } 1088 1089 int coresight_enable(struct coresight_device *csdev) 1090 { 1091 int cpu, ret = 0; 1092 struct coresight_device *sink; 1093 struct list_head *path; 1094 enum coresight_dev_subtype_source subtype; 1095 1096 subtype = csdev->subtype.source_subtype; 1097 1098 mutex_lock(&coresight_mutex); 1099 1100 ret = coresight_validate_source(csdev, __func__); 1101 if (ret) 1102 goto out; 1103 1104 if (csdev->enable) { 1105 /* 1106 * There could be multiple applications driving the software 1107 * source. So keep the refcount for each such user when the 1108 * source is already enabled. 1109 */ 1110 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1111 atomic_inc(csdev->refcnt); 1112 goto out; 1113 } 1114 1115 sink = coresight_get_enabled_sink(csdev); 1116 if (!sink) { 1117 ret = -EINVAL; 1118 goto out; 1119 } 1120 1121 path = coresight_build_path(csdev, sink); 1122 if (IS_ERR(path)) { 1123 pr_err("building path(s) failed\n"); 1124 ret = PTR_ERR(path); 1125 goto out; 1126 } 1127 1128 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1129 if (ret) 1130 goto err_path; 1131 1132 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1133 if (ret) 1134 goto err_source; 1135 1136 switch (subtype) { 1137 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1138 /* 1139 * When working from sysFS it is important to keep track 1140 * of the paths that were created so that they can be 1141 * undone in 'coresight_disable()'. Since there can only 1142 * be a single session per tracer (when working from sysFS) 1143 * a per-cpu variable will do just fine. 1144 */ 1145 cpu = source_ops(csdev)->cpu_id(csdev); 1146 per_cpu(tracer_path, cpu) = path; 1147 break; 1148 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1149 stm_path = path; 1150 break; 1151 default: 1152 /* We can't be here */ 1153 break; 1154 } 1155 1156 out: 1157 mutex_unlock(&coresight_mutex); 1158 return ret; 1159 1160 err_source: 1161 coresight_disable_path(path); 1162 1163 err_path: 1164 coresight_release_path(path); 1165 goto out; 1166 } 1167 EXPORT_SYMBOL_GPL(coresight_enable); 1168 1169 void coresight_disable(struct coresight_device *csdev) 1170 { 1171 int cpu, ret; 1172 struct list_head *path = NULL; 1173 1174 mutex_lock(&coresight_mutex); 1175 1176 ret = coresight_validate_source(csdev, __func__); 1177 if (ret) 1178 goto out; 1179 1180 if (!csdev->enable || !coresight_disable_source(csdev)) 1181 goto out; 1182 1183 switch (csdev->subtype.source_subtype) { 1184 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1185 cpu = source_ops(csdev)->cpu_id(csdev); 1186 path = per_cpu(tracer_path, cpu); 1187 per_cpu(tracer_path, cpu) = NULL; 1188 break; 1189 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1190 path = stm_path; 1191 stm_path = NULL; 1192 break; 1193 default: 1194 /* We can't be here */ 1195 break; 1196 } 1197 1198 coresight_disable_path(path); 1199 coresight_release_path(path); 1200 1201 out: 1202 mutex_unlock(&coresight_mutex); 1203 } 1204 EXPORT_SYMBOL_GPL(coresight_disable); 1205 1206 static ssize_t enable_sink_show(struct device *dev, 1207 struct device_attribute *attr, char *buf) 1208 { 1209 struct coresight_device *csdev = to_coresight_device(dev); 1210 1211 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1212 } 1213 1214 static ssize_t enable_sink_store(struct device *dev, 1215 struct device_attribute *attr, 1216 const char *buf, size_t size) 1217 { 1218 int ret; 1219 unsigned long val; 1220 struct coresight_device *csdev = to_coresight_device(dev); 1221 1222 ret = kstrtoul(buf, 10, &val); 1223 if (ret) 1224 return ret; 1225 1226 if (val) 1227 csdev->activated = true; 1228 else 1229 csdev->activated = false; 1230 1231 return size; 1232 1233 } 1234 static DEVICE_ATTR_RW(enable_sink); 1235 1236 static ssize_t enable_source_show(struct device *dev, 1237 struct device_attribute *attr, char *buf) 1238 { 1239 struct coresight_device *csdev = to_coresight_device(dev); 1240 1241 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1242 } 1243 1244 static ssize_t enable_source_store(struct device *dev, 1245 struct device_attribute *attr, 1246 const char *buf, size_t size) 1247 { 1248 int ret = 0; 1249 unsigned long val; 1250 struct coresight_device *csdev = to_coresight_device(dev); 1251 1252 ret = kstrtoul(buf, 10, &val); 1253 if (ret) 1254 return ret; 1255 1256 if (val) { 1257 ret = coresight_enable(csdev); 1258 if (ret) 1259 return ret; 1260 } else { 1261 coresight_disable(csdev); 1262 } 1263 1264 return size; 1265 } 1266 static DEVICE_ATTR_RW(enable_source); 1267 1268 static struct attribute *coresight_sink_attrs[] = { 1269 &dev_attr_enable_sink.attr, 1270 NULL, 1271 }; 1272 ATTRIBUTE_GROUPS(coresight_sink); 1273 1274 static struct attribute *coresight_source_attrs[] = { 1275 &dev_attr_enable_source.attr, 1276 NULL, 1277 }; 1278 ATTRIBUTE_GROUPS(coresight_source); 1279 1280 static struct device_type coresight_dev_type[] = { 1281 { 1282 .name = "none", 1283 }, 1284 { 1285 .name = "sink", 1286 .groups = coresight_sink_groups, 1287 }, 1288 { 1289 .name = "link", 1290 }, 1291 { 1292 .name = "linksink", 1293 .groups = coresight_sink_groups, 1294 }, 1295 { 1296 .name = "source", 1297 .groups = coresight_source_groups, 1298 }, 1299 { 1300 .name = "helper", 1301 }, 1302 { 1303 .name = "ect", 1304 }, 1305 }; 1306 1307 static void coresight_device_release(struct device *dev) 1308 { 1309 struct coresight_device *csdev = to_coresight_device(dev); 1310 1311 fwnode_handle_put(csdev->dev.fwnode); 1312 kfree(csdev->refcnt); 1313 kfree(csdev); 1314 } 1315 1316 static int coresight_orphan_match(struct device *dev, void *data) 1317 { 1318 int i, ret = 0; 1319 bool still_orphan = false; 1320 struct coresight_device *csdev, *i_csdev; 1321 struct coresight_connection *conn; 1322 1323 csdev = data; 1324 i_csdev = to_coresight_device(dev); 1325 1326 /* No need to check oneself */ 1327 if (csdev == i_csdev) 1328 return 0; 1329 1330 /* Move on to another component if no connection is orphan */ 1331 if (!i_csdev->orphan) 1332 return 0; 1333 /* 1334 * Circle throuch all the connection of that component. If we find 1335 * an orphan connection whose name matches @csdev, link it. 1336 */ 1337 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1338 conn = &i_csdev->pdata->conns[i]; 1339 1340 /* Skip the port if FW doesn't describe it */ 1341 if (!conn->child_fwnode) 1342 continue; 1343 /* We have found at least one orphan connection */ 1344 if (conn->child_dev == NULL) { 1345 /* Does it match this newly added device? */ 1346 if (conn->child_fwnode == csdev->dev.fwnode) { 1347 ret = coresight_make_links(i_csdev, 1348 conn, csdev); 1349 if (ret) 1350 return ret; 1351 } else { 1352 /* This component still has an orphan */ 1353 still_orphan = true; 1354 } 1355 } 1356 } 1357 1358 i_csdev->orphan = still_orphan; 1359 1360 /* 1361 * Returning '0' in case we didn't encounter any error, 1362 * ensures that all known component on the bus will be checked. 1363 */ 1364 return 0; 1365 } 1366 1367 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1368 { 1369 return bus_for_each_dev(&coresight_bustype, NULL, 1370 csdev, coresight_orphan_match); 1371 } 1372 1373 1374 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1375 { 1376 int i, ret = 0; 1377 1378 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1379 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1380 1381 if (!conn->child_fwnode) 1382 continue; 1383 conn->child_dev = 1384 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1385 if (conn->child_dev) { 1386 ret = coresight_make_links(csdev, conn, 1387 conn->child_dev); 1388 if (ret) 1389 break; 1390 } else { 1391 csdev->orphan = true; 1392 } 1393 } 1394 1395 return 0; 1396 } 1397 1398 static int coresight_remove_match(struct device *dev, void *data) 1399 { 1400 int i; 1401 struct coresight_device *csdev, *iterator; 1402 struct coresight_connection *conn; 1403 1404 csdev = data; 1405 iterator = to_coresight_device(dev); 1406 1407 /* No need to check oneself */ 1408 if (csdev == iterator) 1409 return 0; 1410 1411 /* 1412 * Circle throuch all the connection of that component. If we find 1413 * a connection whose name matches @csdev, remove it. 1414 */ 1415 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1416 conn = &iterator->pdata->conns[i]; 1417 1418 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1419 continue; 1420 1421 if (csdev->dev.fwnode == conn->child_fwnode) { 1422 iterator->orphan = true; 1423 coresight_remove_links(iterator, conn); 1424 /* 1425 * Drop the reference to the handle for the remote 1426 * device acquired in parsing the connections from 1427 * platform data. 1428 */ 1429 fwnode_handle_put(conn->child_fwnode); 1430 /* No need to continue */ 1431 break; 1432 } 1433 } 1434 1435 /* 1436 * Returning '0' ensures that all known component on the 1437 * bus will be checked. 1438 */ 1439 return 0; 1440 } 1441 1442 /* 1443 * coresight_remove_conns - Remove references to this given devices 1444 * from the connections of other devices. 1445 */ 1446 static void coresight_remove_conns(struct coresight_device *csdev) 1447 { 1448 /* 1449 * Another device will point to this device only if there is 1450 * an output port connected to this one. i.e, if the device 1451 * doesn't have at least one input port, there is no point 1452 * in searching all the devices. 1453 */ 1454 if (csdev->pdata->nr_inport) 1455 bus_for_each_dev(&coresight_bustype, NULL, 1456 csdev, coresight_remove_match); 1457 } 1458 1459 /** 1460 * coresight_timeout - loop until a bit has changed to a specific register 1461 * state. 1462 * @csa: coresight device access for the device 1463 * @offset: Offset of the register from the base of the device. 1464 * @position: the position of the bit of interest. 1465 * @value: the value the bit should have. 1466 * 1467 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1468 * TIMEOUT_US has elapsed, which ever happens first. 1469 */ 1470 int coresight_timeout(struct csdev_access *csa, u32 offset, 1471 int position, int value) 1472 { 1473 int i; 1474 u32 val; 1475 1476 for (i = TIMEOUT_US; i > 0; i--) { 1477 val = csdev_access_read32(csa, offset); 1478 /* waiting on the bit to go from 0 to 1 */ 1479 if (value) { 1480 if (val & BIT(position)) 1481 return 0; 1482 /* waiting on the bit to go from 1 to 0 */ 1483 } else { 1484 if (!(val & BIT(position))) 1485 return 0; 1486 } 1487 1488 /* 1489 * Delay is arbitrary - the specification doesn't say how long 1490 * we are expected to wait. Extra check required to make sure 1491 * we don't wait needlessly on the last iteration. 1492 */ 1493 if (i - 1) 1494 udelay(1); 1495 } 1496 1497 return -EAGAIN; 1498 } 1499 EXPORT_SYMBOL_GPL(coresight_timeout); 1500 1501 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1502 { 1503 return csdev_access_relaxed_read32(&csdev->access, offset); 1504 } 1505 1506 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1507 { 1508 return csdev_access_read32(&csdev->access, offset); 1509 } 1510 1511 void coresight_relaxed_write32(struct coresight_device *csdev, 1512 u32 val, u32 offset) 1513 { 1514 csdev_access_relaxed_write32(&csdev->access, val, offset); 1515 } 1516 1517 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1518 { 1519 csdev_access_write32(&csdev->access, val, offset); 1520 } 1521 1522 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1523 { 1524 return csdev_access_relaxed_read64(&csdev->access, offset); 1525 } 1526 1527 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1528 { 1529 return csdev_access_read64(&csdev->access, offset); 1530 } 1531 1532 void coresight_relaxed_write64(struct coresight_device *csdev, 1533 u64 val, u32 offset) 1534 { 1535 csdev_access_relaxed_write64(&csdev->access, val, offset); 1536 } 1537 1538 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1539 { 1540 csdev_access_write64(&csdev->access, val, offset); 1541 } 1542 1543 /* 1544 * coresight_release_platform_data: Release references to the devices connected 1545 * to the output port of this device. 1546 */ 1547 void coresight_release_platform_data(struct coresight_device *csdev, 1548 struct coresight_platform_data *pdata) 1549 { 1550 int i; 1551 struct coresight_connection *conns = pdata->conns; 1552 1553 for (i = 0; i < pdata->nr_outport; i++) { 1554 /* If we have made the links, remove them now */ 1555 if (csdev && conns[i].child_dev) 1556 coresight_remove_links(csdev, &conns[i]); 1557 /* 1558 * Drop the refcount and clear the handle as this device 1559 * is going away 1560 */ 1561 if (conns[i].child_fwnode) { 1562 fwnode_handle_put(conns[i].child_fwnode); 1563 pdata->conns[i].child_fwnode = NULL; 1564 } 1565 } 1566 if (csdev) 1567 coresight_remove_conns_sysfs_group(csdev); 1568 } 1569 1570 struct coresight_device *coresight_register(struct coresight_desc *desc) 1571 { 1572 int ret; 1573 int link_subtype; 1574 int nr_refcnts = 1; 1575 atomic_t *refcnts = NULL; 1576 struct coresight_device *csdev; 1577 1578 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1579 if (!csdev) { 1580 ret = -ENOMEM; 1581 goto err_out; 1582 } 1583 1584 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1585 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1586 link_subtype = desc->subtype.link_subtype; 1587 1588 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1589 nr_refcnts = desc->pdata->nr_inport; 1590 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1591 nr_refcnts = desc->pdata->nr_outport; 1592 } 1593 1594 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1595 if (!refcnts) { 1596 ret = -ENOMEM; 1597 goto err_free_csdev; 1598 } 1599 1600 csdev->refcnt = refcnts; 1601 1602 csdev->pdata = desc->pdata; 1603 1604 csdev->type = desc->type; 1605 csdev->subtype = desc->subtype; 1606 csdev->ops = desc->ops; 1607 csdev->access = desc->access; 1608 csdev->orphan = false; 1609 1610 csdev->dev.type = &coresight_dev_type[desc->type]; 1611 csdev->dev.groups = desc->groups; 1612 csdev->dev.parent = desc->dev; 1613 csdev->dev.release = coresight_device_release; 1614 csdev->dev.bus = &coresight_bustype; 1615 /* 1616 * Hold the reference to our parent device. This will be 1617 * dropped only in coresight_device_release(). 1618 */ 1619 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1620 dev_set_name(&csdev->dev, "%s", desc->name); 1621 1622 ret = device_register(&csdev->dev); 1623 if (ret) { 1624 put_device(&csdev->dev); 1625 /* 1626 * All resources are free'd explicitly via 1627 * coresight_device_release(), triggered from put_device(). 1628 */ 1629 goto err_out; 1630 } 1631 1632 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1633 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1634 ret = etm_perf_add_symlink_sink(csdev); 1635 1636 if (ret) { 1637 device_unregister(&csdev->dev); 1638 /* 1639 * As with the above, all resources are free'd 1640 * explicitly via coresight_device_release() triggered 1641 * from put_device(), which is in turn called from 1642 * function device_unregister(). 1643 */ 1644 goto err_out; 1645 } 1646 } 1647 1648 mutex_lock(&coresight_mutex); 1649 1650 ret = coresight_create_conns_sysfs_group(csdev); 1651 if (!ret) 1652 ret = coresight_fixup_device_conns(csdev); 1653 if (!ret) 1654 ret = coresight_fixup_orphan_conns(csdev); 1655 if (!ret && cti_assoc_ops && cti_assoc_ops->add) 1656 cti_assoc_ops->add(csdev); 1657 1658 mutex_unlock(&coresight_mutex); 1659 if (ret) { 1660 coresight_unregister(csdev); 1661 return ERR_PTR(ret); 1662 } 1663 1664 return csdev; 1665 1666 err_free_csdev: 1667 kfree(csdev); 1668 err_out: 1669 /* Cleanup the connection information */ 1670 coresight_release_platform_data(NULL, desc->pdata); 1671 return ERR_PTR(ret); 1672 } 1673 EXPORT_SYMBOL_GPL(coresight_register); 1674 1675 void coresight_unregister(struct coresight_device *csdev) 1676 { 1677 etm_perf_del_symlink_sink(csdev); 1678 /* Remove references of that device in the topology */ 1679 if (cti_assoc_ops && cti_assoc_ops->remove) 1680 cti_assoc_ops->remove(csdev); 1681 coresight_remove_conns(csdev); 1682 coresight_clear_default_sink(csdev); 1683 coresight_release_platform_data(csdev, csdev->pdata); 1684 device_unregister(&csdev->dev); 1685 } 1686 EXPORT_SYMBOL_GPL(coresight_unregister); 1687 1688 1689 /* 1690 * coresight_search_device_idx - Search the fwnode handle of a device 1691 * in the given dev_idx list. Must be called with the coresight_mutex held. 1692 * 1693 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1694 */ 1695 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1696 struct fwnode_handle *fwnode) 1697 { 1698 int i; 1699 1700 for (i = 0; i < dict->nr_idx; i++) 1701 if (dict->fwnode_list[i] == fwnode) 1702 return i; 1703 return -ENOENT; 1704 } 1705 1706 bool coresight_loses_context_with_cpu(struct device *dev) 1707 { 1708 return fwnode_property_present(dev_fwnode(dev), 1709 "arm,coresight-loses-context-with-cpu"); 1710 } 1711 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1712 1713 /* 1714 * coresight_alloc_device_name - Get an index for a given device in the 1715 * device index list specific to a driver. An index is allocated for a 1716 * device and is tracked with the fwnode_handle to prevent allocating 1717 * duplicate indices for the same device (e.g, if we defer probing of 1718 * a device due to dependencies), in case the index is requested again. 1719 */ 1720 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1721 struct device *dev) 1722 { 1723 int idx; 1724 char *name = NULL; 1725 struct fwnode_handle **list; 1726 1727 mutex_lock(&coresight_mutex); 1728 1729 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1730 if (idx < 0) { 1731 /* Make space for the new entry */ 1732 idx = dict->nr_idx; 1733 list = krealloc(dict->fwnode_list, 1734 (idx + 1) * sizeof(*dict->fwnode_list), 1735 GFP_KERNEL); 1736 if (ZERO_OR_NULL_PTR(list)) { 1737 idx = -ENOMEM; 1738 goto done; 1739 } 1740 1741 list[idx] = dev_fwnode(dev); 1742 dict->fwnode_list = list; 1743 dict->nr_idx = idx + 1; 1744 } 1745 1746 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1747 done: 1748 mutex_unlock(&coresight_mutex); 1749 return name; 1750 } 1751 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1752 1753 struct bus_type coresight_bustype = { 1754 .name = "coresight", 1755 }; 1756 1757 static int __init coresight_init(void) 1758 { 1759 int ret; 1760 1761 ret = bus_register(&coresight_bustype); 1762 if (ret) 1763 return ret; 1764 1765 ret = etm_perf_init(); 1766 if (ret) 1767 bus_unregister(&coresight_bustype); 1768 1769 return ret; 1770 } 1771 1772 static void __exit coresight_exit(void) 1773 { 1774 etm_perf_exit(); 1775 bus_unregister(&coresight_bustype); 1776 } 1777 1778 module_init(coresight_init); 1779 module_exit(coresight_exit); 1780 1781 MODULE_LICENSE("GPL v2"); 1782 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1783 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1784 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1785