1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/idr.h> 12 #include <linux/err.h> 13 #include <linux/export.h> 14 #include <linux/slab.h> 15 #include <linux/stringhash.h> 16 #include <linux/mutex.h> 17 #include <linux/clk.h> 18 #include <linux/coresight.h> 19 #include <linux/of_platform.h> 20 #include <linux/delay.h> 21 #include <linux/pm_runtime.h> 22 23 #include "coresight-etm-perf.h" 24 #include "coresight-priv.h" 25 #include "coresight-syscfg.h" 26 27 static DEFINE_MUTEX(coresight_mutex); 28 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink); 29 30 /* 31 * Use IDR to map the hash of the source's device name 32 * to the pointer of path for the source. The idr is for 33 * the sources which aren't associated with CPU. 34 */ 35 static DEFINE_IDR(path_idr); 36 37 /** 38 * struct coresight_node - elements of a path, from source to sink 39 * @csdev: Address of an element. 40 * @link: hook to the list. 41 */ 42 struct coresight_node { 43 struct coresight_device *csdev; 44 struct list_head link; 45 }; 46 47 /* 48 * When operating Coresight drivers from the sysFS interface, only a single 49 * path can exist from a tracer (associated to a CPU) to a sink. 50 */ 51 static DEFINE_PER_CPU(struct list_head *, tracer_path); 52 53 /* 54 * When losing synchronisation a new barrier packet needs to be inserted at the 55 * beginning of the data collected in a buffer. That way the decoder knows that 56 * it needs to look for another sync sequence. 57 */ 58 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 59 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 60 61 static const struct cti_assoc_op *cti_assoc_ops; 62 63 ssize_t coresight_simple_show_pair(struct device *_dev, 64 struct device_attribute *attr, char *buf) 65 { 66 struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); 67 struct cs_pair_attribute *cs_attr = container_of(attr, struct cs_pair_attribute, attr); 68 u64 val; 69 70 pm_runtime_get_sync(_dev->parent); 71 val = csdev_access_relaxed_read_pair(&csdev->access, cs_attr->lo_off, cs_attr->hi_off); 72 pm_runtime_put_sync(_dev->parent); 73 return sysfs_emit(buf, "0x%llx\n", val); 74 } 75 EXPORT_SYMBOL_GPL(coresight_simple_show_pair); 76 77 ssize_t coresight_simple_show32(struct device *_dev, 78 struct device_attribute *attr, char *buf) 79 { 80 struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev); 81 struct cs_off_attribute *cs_attr = container_of(attr, struct cs_off_attribute, attr); 82 u64 val; 83 84 pm_runtime_get_sync(_dev->parent); 85 val = csdev_access_relaxed_read32(&csdev->access, cs_attr->off); 86 pm_runtime_put_sync(_dev->parent); 87 return sysfs_emit(buf, "0x%llx\n", val); 88 } 89 EXPORT_SYMBOL_GPL(coresight_simple_show32); 90 91 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 92 { 93 cti_assoc_ops = cti_op; 94 } 95 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 96 97 void coresight_remove_cti_ops(void) 98 { 99 cti_assoc_ops = NULL; 100 } 101 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 102 103 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) 104 { 105 per_cpu(csdev_sink, cpu) = csdev; 106 } 107 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); 108 109 struct coresight_device *coresight_get_percpu_sink(int cpu) 110 { 111 return per_cpu(csdev_sink, cpu); 112 } 113 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); 114 115 static int coresight_find_link_inport(struct coresight_device *csdev, 116 struct coresight_device *parent) 117 { 118 int i; 119 struct coresight_connection *conn; 120 121 for (i = 0; i < parent->pdata->nr_outport; i++) { 122 conn = &parent->pdata->conns[i]; 123 if (conn->child_dev == csdev) 124 return conn->child_port; 125 } 126 127 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 128 dev_name(&parent->dev), dev_name(&csdev->dev)); 129 130 return -ENODEV; 131 } 132 133 static int coresight_find_link_outport(struct coresight_device *csdev, 134 struct coresight_device *child) 135 { 136 int i; 137 struct coresight_connection *conn; 138 139 for (i = 0; i < csdev->pdata->nr_outport; i++) { 140 conn = &csdev->pdata->conns[i]; 141 if (conn->child_dev == child) 142 return conn->outport; 143 } 144 145 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 146 dev_name(&csdev->dev), dev_name(&child->dev)); 147 148 return -ENODEV; 149 } 150 151 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev) 152 { 153 return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR); 154 } 155 156 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev) 157 { 158 return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED; 159 } 160 161 static inline bool coresight_is_claimed_any(struct coresight_device *csdev) 162 { 163 return coresight_read_claim_tags(csdev) != 0; 164 } 165 166 static inline void coresight_set_claim_tags(struct coresight_device *csdev) 167 { 168 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 169 CORESIGHT_CLAIMSET); 170 isb(); 171 } 172 173 static inline void coresight_clear_claim_tags(struct coresight_device *csdev) 174 { 175 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 176 CORESIGHT_CLAIMCLR); 177 isb(); 178 } 179 180 /* 181 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 182 * to prevent an external tool from touching this device. As per PSCI 183 * standards, section "Preserving the execution context" => "Debug and Trace 184 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 185 * DBGCLAIM[0] is reserved for external tools. 186 * 187 * Called with CS_UNLOCKed for the component. 188 * Returns : 0 on success 189 */ 190 int coresight_claim_device_unlocked(struct coresight_device *csdev) 191 { 192 if (WARN_ON(!csdev)) 193 return -EINVAL; 194 195 if (coresight_is_claimed_any(csdev)) 196 return -EBUSY; 197 198 coresight_set_claim_tags(csdev); 199 if (coresight_is_claimed_self_hosted(csdev)) 200 return 0; 201 /* There was a race setting the tags, clean up and fail */ 202 coresight_clear_claim_tags(csdev); 203 return -EBUSY; 204 } 205 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 206 207 int coresight_claim_device(struct coresight_device *csdev) 208 { 209 int rc; 210 211 if (WARN_ON(!csdev)) 212 return -EINVAL; 213 214 CS_UNLOCK(csdev->access.base); 215 rc = coresight_claim_device_unlocked(csdev); 216 CS_LOCK(csdev->access.base); 217 218 return rc; 219 } 220 EXPORT_SYMBOL_GPL(coresight_claim_device); 221 222 /* 223 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 224 * Called with CS_UNLOCKed for the component. 225 */ 226 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 227 { 228 229 if (WARN_ON(!csdev)) 230 return; 231 232 if (coresight_is_claimed_self_hosted(csdev)) 233 coresight_clear_claim_tags(csdev); 234 else 235 /* 236 * The external agent may have not honoured our claim 237 * and has manipulated it. Or something else has seriously 238 * gone wrong in our driver. 239 */ 240 WARN_ON_ONCE(1); 241 } 242 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 243 244 void coresight_disclaim_device(struct coresight_device *csdev) 245 { 246 if (WARN_ON(!csdev)) 247 return; 248 249 CS_UNLOCK(csdev->access.base); 250 coresight_disclaim_device_unlocked(csdev); 251 CS_LOCK(csdev->access.base); 252 } 253 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 254 255 /* enable or disable an associated CTI device of the supplied CS device */ 256 static int 257 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 258 { 259 int ect_ret = 0; 260 struct coresight_device *ect_csdev = csdev->ect_dev; 261 struct module *mod; 262 263 if (!ect_csdev) 264 return 0; 265 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 266 return 0; 267 268 mod = ect_csdev->dev.parent->driver->owner; 269 if (enable) { 270 if (try_module_get(mod)) { 271 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 272 if (ect_ret) { 273 module_put(mod); 274 } else { 275 get_device(ect_csdev->dev.parent); 276 csdev->ect_enabled = true; 277 } 278 } else 279 ect_ret = -ENODEV; 280 } else { 281 if (csdev->ect_enabled) { 282 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 283 put_device(ect_csdev->dev.parent); 284 module_put(mod); 285 csdev->ect_enabled = false; 286 } 287 } 288 289 /* output warning if ECT enable is preventing trace operation */ 290 if (ect_ret) 291 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 292 dev_name(&ect_csdev->dev), 293 enable ? "enable" : "disable"); 294 return ect_ret; 295 } 296 297 /* 298 * Set the associated ect / cti device while holding the coresight_mutex 299 * to avoid a race with coresight_enable that may try to use this value. 300 */ 301 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 302 struct coresight_device *ect_csdev) 303 { 304 mutex_lock(&coresight_mutex); 305 csdev->ect_dev = ect_csdev; 306 mutex_unlock(&coresight_mutex); 307 } 308 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 309 310 static int coresight_enable_sink(struct coresight_device *csdev, 311 u32 mode, void *data) 312 { 313 int ret; 314 315 /* 316 * We need to make sure the "new" session is compatible with the 317 * existing "mode" of operation. 318 */ 319 if (!sink_ops(csdev)->enable) 320 return -EINVAL; 321 322 ret = coresight_control_assoc_ectdev(csdev, true); 323 if (ret) 324 return ret; 325 ret = sink_ops(csdev)->enable(csdev, mode, data); 326 if (ret) { 327 coresight_control_assoc_ectdev(csdev, false); 328 return ret; 329 } 330 csdev->enable = true; 331 332 return 0; 333 } 334 335 static void coresight_disable_sink(struct coresight_device *csdev) 336 { 337 int ret; 338 339 if (!sink_ops(csdev)->disable) 340 return; 341 342 ret = sink_ops(csdev)->disable(csdev); 343 if (ret) 344 return; 345 coresight_control_assoc_ectdev(csdev, false); 346 csdev->enable = false; 347 } 348 349 static int coresight_enable_link(struct coresight_device *csdev, 350 struct coresight_device *parent, 351 struct coresight_device *child) 352 { 353 int ret = 0; 354 int link_subtype; 355 int inport, outport; 356 357 if (!parent || !child) 358 return -EINVAL; 359 360 inport = coresight_find_link_inport(csdev, parent); 361 outport = coresight_find_link_outport(csdev, child); 362 link_subtype = csdev->subtype.link_subtype; 363 364 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 365 return inport; 366 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 367 return outport; 368 369 if (link_ops(csdev)->enable) { 370 ret = coresight_control_assoc_ectdev(csdev, true); 371 if (!ret) { 372 ret = link_ops(csdev)->enable(csdev, inport, outport); 373 if (ret) 374 coresight_control_assoc_ectdev(csdev, false); 375 } 376 } 377 378 if (!ret) 379 csdev->enable = true; 380 381 return ret; 382 } 383 384 static void coresight_disable_link(struct coresight_device *csdev, 385 struct coresight_device *parent, 386 struct coresight_device *child) 387 { 388 int i, nr_conns; 389 int link_subtype; 390 int inport, outport; 391 392 if (!parent || !child) 393 return; 394 395 inport = coresight_find_link_inport(csdev, parent); 396 outport = coresight_find_link_outport(csdev, child); 397 link_subtype = csdev->subtype.link_subtype; 398 399 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 400 nr_conns = csdev->pdata->nr_inport; 401 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 402 nr_conns = csdev->pdata->nr_outport; 403 } else { 404 nr_conns = 1; 405 } 406 407 if (link_ops(csdev)->disable) { 408 link_ops(csdev)->disable(csdev, inport, outport); 409 coresight_control_assoc_ectdev(csdev, false); 410 } 411 412 for (i = 0; i < nr_conns; i++) 413 if (atomic_read(&csdev->refcnt[i]) != 0) 414 return; 415 416 csdev->enable = false; 417 } 418 419 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 420 { 421 int ret; 422 423 if (!csdev->enable) { 424 if (source_ops(csdev)->enable) { 425 ret = coresight_control_assoc_ectdev(csdev, true); 426 if (ret) 427 return ret; 428 ret = source_ops(csdev)->enable(csdev, NULL, mode); 429 if (ret) { 430 coresight_control_assoc_ectdev(csdev, false); 431 return ret; 432 } 433 } 434 csdev->enable = true; 435 } 436 437 atomic_inc(csdev->refcnt); 438 439 return 0; 440 } 441 442 /** 443 * coresight_disable_source - Drop the reference count by 1 and disable 444 * the device if there are no users left. 445 * 446 * @csdev: The coresight device to disable 447 * 448 * Returns true if the device has been disabled. 449 */ 450 static bool coresight_disable_source(struct coresight_device *csdev) 451 { 452 if (atomic_dec_return(csdev->refcnt) == 0) { 453 if (source_ops(csdev)->disable) 454 source_ops(csdev)->disable(csdev, NULL); 455 coresight_control_assoc_ectdev(csdev, false); 456 csdev->enable = false; 457 } 458 return !csdev->enable; 459 } 460 461 /* 462 * coresight_disable_path_from : Disable components in the given path beyond 463 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 464 * disabled. 465 */ 466 static void coresight_disable_path_from(struct list_head *path, 467 struct coresight_node *nd) 468 { 469 u32 type; 470 struct coresight_device *csdev, *parent, *child; 471 472 if (!nd) 473 nd = list_first_entry(path, struct coresight_node, link); 474 475 list_for_each_entry_continue(nd, path, link) { 476 csdev = nd->csdev; 477 type = csdev->type; 478 479 /* 480 * ETF devices are tricky... They can be a link or a sink, 481 * depending on how they are configured. If an ETF has been 482 * "activated" it will be configured as a sink, otherwise 483 * go ahead with the link configuration. 484 */ 485 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 486 type = (csdev == coresight_get_sink(path)) ? 487 CORESIGHT_DEV_TYPE_SINK : 488 CORESIGHT_DEV_TYPE_LINK; 489 490 switch (type) { 491 case CORESIGHT_DEV_TYPE_SINK: 492 coresight_disable_sink(csdev); 493 break; 494 case CORESIGHT_DEV_TYPE_SOURCE: 495 /* 496 * We skip the first node in the path assuming that it 497 * is the source. So we don't expect a source device in 498 * the middle of a path. 499 */ 500 WARN_ON(1); 501 break; 502 case CORESIGHT_DEV_TYPE_LINK: 503 parent = list_prev_entry(nd, link)->csdev; 504 child = list_next_entry(nd, link)->csdev; 505 coresight_disable_link(csdev, parent, child); 506 break; 507 default: 508 break; 509 } 510 } 511 } 512 513 void coresight_disable_path(struct list_head *path) 514 { 515 coresight_disable_path_from(path, NULL); 516 } 517 EXPORT_SYMBOL_GPL(coresight_disable_path); 518 519 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 520 { 521 522 int ret = 0; 523 u32 type; 524 struct coresight_node *nd; 525 struct coresight_device *csdev, *parent, *child; 526 527 list_for_each_entry_reverse(nd, path, link) { 528 csdev = nd->csdev; 529 type = csdev->type; 530 531 /* 532 * ETF devices are tricky... They can be a link or a sink, 533 * depending on how they are configured. If an ETF has been 534 * "activated" it will be configured as a sink, otherwise 535 * go ahead with the link configuration. 536 */ 537 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 538 type = (csdev == coresight_get_sink(path)) ? 539 CORESIGHT_DEV_TYPE_SINK : 540 CORESIGHT_DEV_TYPE_LINK; 541 542 switch (type) { 543 case CORESIGHT_DEV_TYPE_SINK: 544 ret = coresight_enable_sink(csdev, mode, sink_data); 545 /* 546 * Sink is the first component turned on. If we 547 * failed to enable the sink, there are no components 548 * that need disabling. Disabling the path here 549 * would mean we could disrupt an existing session. 550 */ 551 if (ret) 552 goto out; 553 break; 554 case CORESIGHT_DEV_TYPE_SOURCE: 555 /* sources are enabled from either sysFS or Perf */ 556 break; 557 case CORESIGHT_DEV_TYPE_LINK: 558 parent = list_prev_entry(nd, link)->csdev; 559 child = list_next_entry(nd, link)->csdev; 560 ret = coresight_enable_link(csdev, parent, child); 561 if (ret) 562 goto err; 563 break; 564 default: 565 goto err; 566 } 567 } 568 569 out: 570 return ret; 571 err: 572 coresight_disable_path_from(path, nd); 573 goto out; 574 } 575 576 struct coresight_device *coresight_get_sink(struct list_head *path) 577 { 578 struct coresight_device *csdev; 579 580 if (!path) 581 return NULL; 582 583 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 584 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 585 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 586 return NULL; 587 588 return csdev; 589 } 590 591 static struct coresight_device * 592 coresight_find_enabled_sink(struct coresight_device *csdev) 593 { 594 int i; 595 struct coresight_device *sink = NULL; 596 597 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 598 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 599 csdev->activated) 600 return csdev; 601 602 /* 603 * Recursively explore each port found on this element. 604 */ 605 for (i = 0; i < csdev->pdata->nr_outport; i++) { 606 struct coresight_device *child_dev; 607 608 child_dev = csdev->pdata->conns[i].child_dev; 609 if (child_dev) 610 sink = coresight_find_enabled_sink(child_dev); 611 if (sink) 612 return sink; 613 } 614 615 return NULL; 616 } 617 618 /** 619 * coresight_get_enabled_sink - returns the first enabled sink using 620 * connection based search starting from the source reference 621 * 622 * @source: Coresight source device reference 623 */ 624 struct coresight_device * 625 coresight_get_enabled_sink(struct coresight_device *source) 626 { 627 if (!source) 628 return NULL; 629 630 return coresight_find_enabled_sink(source); 631 } 632 633 static int coresight_sink_by_id(struct device *dev, const void *data) 634 { 635 struct coresight_device *csdev = to_coresight_device(dev); 636 unsigned long hash; 637 638 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 639 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 640 641 if (!csdev->ea) 642 return 0; 643 /* 644 * See function etm_perf_add_symlink_sink() to know where 645 * this comes from. 646 */ 647 hash = (unsigned long)csdev->ea->var; 648 649 if ((u32)hash == *(u32 *)data) 650 return 1; 651 } 652 653 return 0; 654 } 655 656 /** 657 * coresight_get_sink_by_id - returns the sink that matches the id 658 * @id: Id of the sink to match 659 * 660 * The name of a sink is unique, whether it is found on the AMBA bus or 661 * otherwise. As such the hash of that name can easily be used to identify 662 * a sink. 663 */ 664 struct coresight_device *coresight_get_sink_by_id(u32 id) 665 { 666 struct device *dev = NULL; 667 668 dev = bus_find_device(&coresight_bustype, NULL, &id, 669 coresight_sink_by_id); 670 671 return dev ? to_coresight_device(dev) : NULL; 672 } 673 674 /** 675 * coresight_get_ref- Helper function to increase reference count to module 676 * and device. 677 * 678 * @csdev: The coresight device to get a reference on. 679 * 680 * Return true in successful case and power up the device. 681 * Return false when failed to get reference of module. 682 */ 683 static inline bool coresight_get_ref(struct coresight_device *csdev) 684 { 685 struct device *dev = csdev->dev.parent; 686 687 /* Make sure the driver can't be removed */ 688 if (!try_module_get(dev->driver->owner)) 689 return false; 690 /* Make sure the device can't go away */ 691 get_device(dev); 692 pm_runtime_get_sync(dev); 693 return true; 694 } 695 696 /** 697 * coresight_put_ref- Helper function to decrease reference count to module 698 * and device. Power off the device. 699 * 700 * @csdev: The coresight device to decrement a reference from. 701 */ 702 static inline void coresight_put_ref(struct coresight_device *csdev) 703 { 704 struct device *dev = csdev->dev.parent; 705 706 pm_runtime_put(dev); 707 put_device(dev); 708 module_put(dev->driver->owner); 709 } 710 711 /* 712 * coresight_grab_device - Power up this device and any of the helper 713 * devices connected to it for trace operation. Since the helper devices 714 * don't appear on the trace path, they should be handled along with the 715 * master device. 716 */ 717 static int coresight_grab_device(struct coresight_device *csdev) 718 { 719 int i; 720 721 for (i = 0; i < csdev->pdata->nr_outport; i++) { 722 struct coresight_device *child; 723 724 child = csdev->pdata->conns[i].child_dev; 725 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 726 if (!coresight_get_ref(child)) 727 goto err; 728 } 729 if (coresight_get_ref(csdev)) 730 return 0; 731 err: 732 for (i--; i >= 0; i--) { 733 struct coresight_device *child; 734 735 child = csdev->pdata->conns[i].child_dev; 736 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 737 coresight_put_ref(child); 738 } 739 return -ENODEV; 740 } 741 742 /* 743 * coresight_drop_device - Release this device and any of the helper 744 * devices connected to it. 745 */ 746 static void coresight_drop_device(struct coresight_device *csdev) 747 { 748 int i; 749 750 coresight_put_ref(csdev); 751 for (i = 0; i < csdev->pdata->nr_outport; i++) { 752 struct coresight_device *child; 753 754 child = csdev->pdata->conns[i].child_dev; 755 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 756 coresight_put_ref(child); 757 } 758 } 759 760 /** 761 * _coresight_build_path - recursively build a path from a @csdev to a sink. 762 * @csdev: The device to start from. 763 * @sink: The final sink we want in this path. 764 * @path: The list to add devices to. 765 * 766 * The tree of Coresight device is traversed until an activated sink is 767 * found. From there the sink is added to the list along with all the 768 * devices that led to that point - the end result is a list from source 769 * to sink. In that list the source is the first device and the sink the 770 * last one. 771 */ 772 static int _coresight_build_path(struct coresight_device *csdev, 773 struct coresight_device *sink, 774 struct list_head *path) 775 { 776 int i, ret; 777 bool found = false; 778 struct coresight_node *node; 779 780 /* An activated sink has been found. Enqueue the element */ 781 if (csdev == sink) 782 goto out; 783 784 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && 785 sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { 786 if (_coresight_build_path(sink, sink, path) == 0) { 787 found = true; 788 goto out; 789 } 790 } 791 792 /* Not a sink - recursively explore each port found on this element */ 793 for (i = 0; i < csdev->pdata->nr_outport; i++) { 794 struct coresight_device *child_dev; 795 796 child_dev = csdev->pdata->conns[i].child_dev; 797 if (child_dev && 798 _coresight_build_path(child_dev, sink, path) == 0) { 799 found = true; 800 break; 801 } 802 } 803 804 if (!found) 805 return -ENODEV; 806 807 out: 808 /* 809 * A path from this element to a sink has been found. The elements 810 * leading to the sink are already enqueued, all that is left to do 811 * is tell the PM runtime core we need this element and add a node 812 * for it. 813 */ 814 ret = coresight_grab_device(csdev); 815 if (ret) 816 return ret; 817 818 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 819 if (!node) 820 return -ENOMEM; 821 822 node->csdev = csdev; 823 list_add(&node->link, path); 824 825 return 0; 826 } 827 828 struct list_head *coresight_build_path(struct coresight_device *source, 829 struct coresight_device *sink) 830 { 831 struct list_head *path; 832 int rc; 833 834 if (!sink) 835 return ERR_PTR(-EINVAL); 836 837 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 838 if (!path) 839 return ERR_PTR(-ENOMEM); 840 841 INIT_LIST_HEAD(path); 842 843 rc = _coresight_build_path(source, sink, path); 844 if (rc) { 845 kfree(path); 846 return ERR_PTR(rc); 847 } 848 849 return path; 850 } 851 852 /** 853 * coresight_release_path - release a previously built path. 854 * @path: the path to release. 855 * 856 * Go through all the elements of a path and 1) removed it from the list and 857 * 2) free the memory allocated for each node. 858 */ 859 void coresight_release_path(struct list_head *path) 860 { 861 struct coresight_device *csdev; 862 struct coresight_node *nd, *next; 863 864 list_for_each_entry_safe(nd, next, path, link) { 865 csdev = nd->csdev; 866 867 coresight_drop_device(csdev); 868 list_del(&nd->link); 869 kfree(nd); 870 } 871 872 kfree(path); 873 } 874 875 /* return true if the device is a suitable type for a default sink */ 876 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 877 { 878 /* sink & correct subtype */ 879 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 880 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 881 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 882 return true; 883 return false; 884 } 885 886 /** 887 * coresight_select_best_sink - return the best sink for use as default from 888 * the two provided. 889 * 890 * @sink: current best sink. 891 * @depth: search depth where current sink was found. 892 * @new_sink: new sink for comparison with current sink. 893 * @new_depth: search depth where new sink was found. 894 * 895 * Sinks prioritised according to coresight_dev_subtype_sink, with only 896 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 897 * 898 * Where two sinks of equal priority are found, the sink closest to the 899 * source is used (smallest search depth). 900 * 901 * return @new_sink & update @depth if better than @sink, else return @sink. 902 */ 903 static struct coresight_device * 904 coresight_select_best_sink(struct coresight_device *sink, int *depth, 905 struct coresight_device *new_sink, int new_depth) 906 { 907 bool update = false; 908 909 if (!sink) { 910 /* first found at this level */ 911 update = true; 912 } else if (new_sink->subtype.sink_subtype > 913 sink->subtype.sink_subtype) { 914 /* found better sink */ 915 update = true; 916 } else if ((new_sink->subtype.sink_subtype == 917 sink->subtype.sink_subtype) && 918 (*depth > new_depth)) { 919 /* found same but closer sink */ 920 update = true; 921 } 922 923 if (update) 924 *depth = new_depth; 925 return update ? new_sink : sink; 926 } 927 928 /** 929 * coresight_find_sink - recursive function to walk trace connections from 930 * source to find a suitable default sink. 931 * 932 * @csdev: source / current device to check. 933 * @depth: [in] search depth of calling dev, [out] depth of found sink. 934 * 935 * This will walk the connection path from a source (ETM) till a suitable 936 * sink is encountered and return that sink to the original caller. 937 * 938 * If current device is a plain sink return that & depth, otherwise recursively 939 * call child connections looking for a sink. Select best possible using 940 * coresight_select_best_sink. 941 * 942 * return best sink found, or NULL if not found at this node or child nodes. 943 */ 944 static struct coresight_device * 945 coresight_find_sink(struct coresight_device *csdev, int *depth) 946 { 947 int i, curr_depth = *depth + 1, found_depth = 0; 948 struct coresight_device *found_sink = NULL; 949 950 if (coresight_is_def_sink_type(csdev)) { 951 found_depth = curr_depth; 952 found_sink = csdev; 953 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 954 goto return_def_sink; 955 /* look past LINKSINK for something better */ 956 } 957 958 /* 959 * Not a sink we want - or possible child sink may be better. 960 * recursively explore each port found on this element. 961 */ 962 for (i = 0; i < csdev->pdata->nr_outport; i++) { 963 struct coresight_device *child_dev, *sink = NULL; 964 int child_depth = curr_depth; 965 966 child_dev = csdev->pdata->conns[i].child_dev; 967 if (child_dev) 968 sink = coresight_find_sink(child_dev, &child_depth); 969 970 if (sink) 971 found_sink = coresight_select_best_sink(found_sink, 972 &found_depth, 973 sink, 974 child_depth); 975 } 976 977 return_def_sink: 978 /* return found sink and depth */ 979 if (found_sink) 980 *depth = found_depth; 981 return found_sink; 982 } 983 984 /** 985 * coresight_find_default_sink: Find a sink suitable for use as a 986 * default sink. 987 * 988 * @csdev: starting source to find a connected sink. 989 * 990 * Walks connections graph looking for a suitable sink to enable for the 991 * supplied source. Uses CoreSight device subtypes and distance from source 992 * to select the best sink. 993 * 994 * If a sink is found, then the default sink for this device is set and 995 * will be automatically used in future. 996 * 997 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 998 * sink. 999 */ 1000 struct coresight_device * 1001 coresight_find_default_sink(struct coresight_device *csdev) 1002 { 1003 int depth = 0; 1004 1005 /* look for a default sink if we have not found for this device */ 1006 if (!csdev->def_sink) { 1007 if (coresight_is_percpu_source(csdev)) 1008 csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); 1009 if (!csdev->def_sink) 1010 csdev->def_sink = coresight_find_sink(csdev, &depth); 1011 } 1012 return csdev->def_sink; 1013 } 1014 1015 static int coresight_remove_sink_ref(struct device *dev, void *data) 1016 { 1017 struct coresight_device *sink = data; 1018 struct coresight_device *source = to_coresight_device(dev); 1019 1020 if (source->def_sink == sink) 1021 source->def_sink = NULL; 1022 return 0; 1023 } 1024 1025 /** 1026 * coresight_clear_default_sink: Remove all default sink references to the 1027 * supplied sink. 1028 * 1029 * If supplied device is a sink, then check all the bus devices and clear 1030 * out all the references to this sink from the coresight_device def_sink 1031 * parameter. 1032 * 1033 * @csdev: coresight sink - remove references to this from all sources. 1034 */ 1035 static void coresight_clear_default_sink(struct coresight_device *csdev) 1036 { 1037 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1038 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1039 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1040 coresight_remove_sink_ref); 1041 } 1042 } 1043 1044 /** coresight_validate_source - make sure a source has the right credentials 1045 * @csdev: the device structure for a source. 1046 * @function: the function this was called from. 1047 * 1048 * Assumes the coresight_mutex is held. 1049 */ 1050 static int coresight_validate_source(struct coresight_device *csdev, 1051 const char *function) 1052 { 1053 u32 type, subtype; 1054 1055 type = csdev->type; 1056 subtype = csdev->subtype.source_subtype; 1057 1058 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1059 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1060 return -EINVAL; 1061 } 1062 1063 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1064 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE && 1065 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS) { 1066 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1067 return -EINVAL; 1068 } 1069 1070 return 0; 1071 } 1072 1073 int coresight_enable(struct coresight_device *csdev) 1074 { 1075 int cpu, ret = 0; 1076 struct coresight_device *sink; 1077 struct list_head *path; 1078 enum coresight_dev_subtype_source subtype; 1079 u32 hash; 1080 1081 subtype = csdev->subtype.source_subtype; 1082 1083 mutex_lock(&coresight_mutex); 1084 1085 ret = coresight_validate_source(csdev, __func__); 1086 if (ret) 1087 goto out; 1088 1089 if (csdev->enable) { 1090 /* 1091 * There could be multiple applications driving the software 1092 * source. So keep the refcount for each such user when the 1093 * source is already enabled. 1094 */ 1095 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1096 atomic_inc(csdev->refcnt); 1097 goto out; 1098 } 1099 1100 sink = coresight_get_enabled_sink(csdev); 1101 if (!sink) { 1102 ret = -EINVAL; 1103 goto out; 1104 } 1105 1106 path = coresight_build_path(csdev, sink); 1107 if (IS_ERR(path)) { 1108 pr_err("building path(s) failed\n"); 1109 ret = PTR_ERR(path); 1110 goto out; 1111 } 1112 1113 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1114 if (ret) 1115 goto err_path; 1116 1117 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1118 if (ret) 1119 goto err_source; 1120 1121 switch (subtype) { 1122 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1123 /* 1124 * When working from sysFS it is important to keep track 1125 * of the paths that were created so that they can be 1126 * undone in 'coresight_disable()'. Since there can only 1127 * be a single session per tracer (when working from sysFS) 1128 * a per-cpu variable will do just fine. 1129 */ 1130 cpu = source_ops(csdev)->cpu_id(csdev); 1131 per_cpu(tracer_path, cpu) = path; 1132 break; 1133 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1134 case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS: 1135 /* 1136 * Use the hash of source's device name as ID 1137 * and map the ID to the pointer of the path. 1138 */ 1139 hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev))); 1140 ret = idr_alloc_u32(&path_idr, path, &hash, hash, GFP_KERNEL); 1141 if (ret) 1142 goto err_source; 1143 break; 1144 default: 1145 /* We can't be here */ 1146 break; 1147 } 1148 1149 out: 1150 mutex_unlock(&coresight_mutex); 1151 return ret; 1152 1153 err_source: 1154 coresight_disable_path(path); 1155 1156 err_path: 1157 coresight_release_path(path); 1158 goto out; 1159 } 1160 EXPORT_SYMBOL_GPL(coresight_enable); 1161 1162 void coresight_disable(struct coresight_device *csdev) 1163 { 1164 int cpu, ret; 1165 struct list_head *path = NULL; 1166 u32 hash; 1167 1168 mutex_lock(&coresight_mutex); 1169 1170 ret = coresight_validate_source(csdev, __func__); 1171 if (ret) 1172 goto out; 1173 1174 if (!csdev->enable || !coresight_disable_source(csdev)) 1175 goto out; 1176 1177 switch (csdev->subtype.source_subtype) { 1178 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1179 cpu = source_ops(csdev)->cpu_id(csdev); 1180 path = per_cpu(tracer_path, cpu); 1181 per_cpu(tracer_path, cpu) = NULL; 1182 break; 1183 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1184 case CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS: 1185 hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev))); 1186 /* Find the path by the hash. */ 1187 path = idr_find(&path_idr, hash); 1188 if (path == NULL) { 1189 pr_err("Path is not found for %s\n", dev_name(&csdev->dev)); 1190 goto out; 1191 } 1192 idr_remove(&path_idr, hash); 1193 break; 1194 default: 1195 /* We can't be here */ 1196 break; 1197 } 1198 1199 coresight_disable_path(path); 1200 coresight_release_path(path); 1201 1202 out: 1203 mutex_unlock(&coresight_mutex); 1204 } 1205 EXPORT_SYMBOL_GPL(coresight_disable); 1206 1207 static ssize_t enable_sink_show(struct device *dev, 1208 struct device_attribute *attr, char *buf) 1209 { 1210 struct coresight_device *csdev = to_coresight_device(dev); 1211 1212 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1213 } 1214 1215 static ssize_t enable_sink_store(struct device *dev, 1216 struct device_attribute *attr, 1217 const char *buf, size_t size) 1218 { 1219 int ret; 1220 unsigned long val; 1221 struct coresight_device *csdev = to_coresight_device(dev); 1222 1223 ret = kstrtoul(buf, 10, &val); 1224 if (ret) 1225 return ret; 1226 1227 if (val) 1228 csdev->activated = true; 1229 else 1230 csdev->activated = false; 1231 1232 return size; 1233 1234 } 1235 static DEVICE_ATTR_RW(enable_sink); 1236 1237 static ssize_t enable_source_show(struct device *dev, 1238 struct device_attribute *attr, char *buf) 1239 { 1240 struct coresight_device *csdev = to_coresight_device(dev); 1241 1242 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1243 } 1244 1245 static ssize_t enable_source_store(struct device *dev, 1246 struct device_attribute *attr, 1247 const char *buf, size_t size) 1248 { 1249 int ret = 0; 1250 unsigned long val; 1251 struct coresight_device *csdev = to_coresight_device(dev); 1252 1253 ret = kstrtoul(buf, 10, &val); 1254 if (ret) 1255 return ret; 1256 1257 if (val) { 1258 ret = coresight_enable(csdev); 1259 if (ret) 1260 return ret; 1261 } else { 1262 coresight_disable(csdev); 1263 } 1264 1265 return size; 1266 } 1267 static DEVICE_ATTR_RW(enable_source); 1268 1269 static struct attribute *coresight_sink_attrs[] = { 1270 &dev_attr_enable_sink.attr, 1271 NULL, 1272 }; 1273 ATTRIBUTE_GROUPS(coresight_sink); 1274 1275 static struct attribute *coresight_source_attrs[] = { 1276 &dev_attr_enable_source.attr, 1277 NULL, 1278 }; 1279 ATTRIBUTE_GROUPS(coresight_source); 1280 1281 static struct device_type coresight_dev_type[] = { 1282 { 1283 .name = "sink", 1284 .groups = coresight_sink_groups, 1285 }, 1286 { 1287 .name = "link", 1288 }, 1289 { 1290 .name = "linksink", 1291 .groups = coresight_sink_groups, 1292 }, 1293 { 1294 .name = "source", 1295 .groups = coresight_source_groups, 1296 }, 1297 { 1298 .name = "helper", 1299 }, 1300 { 1301 .name = "ect", 1302 }, 1303 }; 1304 1305 static void coresight_device_release(struct device *dev) 1306 { 1307 struct coresight_device *csdev = to_coresight_device(dev); 1308 1309 fwnode_handle_put(csdev->dev.fwnode); 1310 kfree(csdev->refcnt); 1311 kfree(csdev); 1312 } 1313 1314 static int coresight_orphan_match(struct device *dev, void *data) 1315 { 1316 int i, ret = 0; 1317 bool still_orphan = false; 1318 struct coresight_device *csdev, *i_csdev; 1319 struct coresight_connection *conn; 1320 1321 csdev = data; 1322 i_csdev = to_coresight_device(dev); 1323 1324 /* No need to check oneself */ 1325 if (csdev == i_csdev) 1326 return 0; 1327 1328 /* Move on to another component if no connection is orphan */ 1329 if (!i_csdev->orphan) 1330 return 0; 1331 /* 1332 * Circle throuch all the connection of that component. If we find 1333 * an orphan connection whose name matches @csdev, link it. 1334 */ 1335 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1336 conn = &i_csdev->pdata->conns[i]; 1337 1338 /* Skip the port if FW doesn't describe it */ 1339 if (!conn->child_fwnode) 1340 continue; 1341 /* We have found at least one orphan connection */ 1342 if (conn->child_dev == NULL) { 1343 /* Does it match this newly added device? */ 1344 if (conn->child_fwnode == csdev->dev.fwnode) { 1345 ret = coresight_make_links(i_csdev, 1346 conn, csdev); 1347 if (ret) 1348 return ret; 1349 } else { 1350 /* This component still has an orphan */ 1351 still_orphan = true; 1352 } 1353 } 1354 } 1355 1356 i_csdev->orphan = still_orphan; 1357 1358 /* 1359 * Returning '0' in case we didn't encounter any error, 1360 * ensures that all known component on the bus will be checked. 1361 */ 1362 return 0; 1363 } 1364 1365 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1366 { 1367 return bus_for_each_dev(&coresight_bustype, NULL, 1368 csdev, coresight_orphan_match); 1369 } 1370 1371 1372 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1373 { 1374 int i, ret = 0; 1375 1376 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1377 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1378 1379 if (!conn->child_fwnode) 1380 continue; 1381 conn->child_dev = 1382 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1383 if (conn->child_dev && conn->child_dev->has_conns_grp) { 1384 ret = coresight_make_links(csdev, conn, 1385 conn->child_dev); 1386 if (ret) 1387 break; 1388 } else { 1389 csdev->orphan = true; 1390 } 1391 } 1392 1393 return ret; 1394 } 1395 1396 static int coresight_remove_match(struct device *dev, void *data) 1397 { 1398 int i; 1399 struct coresight_device *csdev, *iterator; 1400 struct coresight_connection *conn; 1401 1402 csdev = data; 1403 iterator = to_coresight_device(dev); 1404 1405 /* No need to check oneself */ 1406 if (csdev == iterator) 1407 return 0; 1408 1409 /* 1410 * Circle throuch all the connection of that component. If we find 1411 * a connection whose name matches @csdev, remove it. 1412 */ 1413 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1414 conn = &iterator->pdata->conns[i]; 1415 1416 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1417 continue; 1418 1419 if (csdev->dev.fwnode == conn->child_fwnode) { 1420 iterator->orphan = true; 1421 coresight_remove_links(iterator, conn); 1422 /* 1423 * Drop the reference to the handle for the remote 1424 * device acquired in parsing the connections from 1425 * platform data. 1426 */ 1427 fwnode_handle_put(conn->child_fwnode); 1428 conn->child_fwnode = NULL; 1429 /* No need to continue */ 1430 break; 1431 } 1432 } 1433 1434 /* 1435 * Returning '0' ensures that all known component on the 1436 * bus will be checked. 1437 */ 1438 return 0; 1439 } 1440 1441 /* 1442 * coresight_remove_conns - Remove references to this given devices 1443 * from the connections of other devices. 1444 */ 1445 static void coresight_remove_conns(struct coresight_device *csdev) 1446 { 1447 /* 1448 * Another device will point to this device only if there is 1449 * an output port connected to this one. i.e, if the device 1450 * doesn't have at least one input port, there is no point 1451 * in searching all the devices. 1452 */ 1453 if (csdev->pdata->nr_inport) 1454 bus_for_each_dev(&coresight_bustype, NULL, 1455 csdev, coresight_remove_match); 1456 } 1457 1458 /** 1459 * coresight_timeout - loop until a bit has changed to a specific register 1460 * state. 1461 * @csa: coresight device access for the device 1462 * @offset: Offset of the register from the base of the device. 1463 * @position: the position of the bit of interest. 1464 * @value: the value the bit should have. 1465 * 1466 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1467 * TIMEOUT_US has elapsed, which ever happens first. 1468 */ 1469 int coresight_timeout(struct csdev_access *csa, u32 offset, 1470 int position, int value) 1471 { 1472 int i; 1473 u32 val; 1474 1475 for (i = TIMEOUT_US; i > 0; i--) { 1476 val = csdev_access_read32(csa, offset); 1477 /* waiting on the bit to go from 0 to 1 */ 1478 if (value) { 1479 if (val & BIT(position)) 1480 return 0; 1481 /* waiting on the bit to go from 1 to 0 */ 1482 } else { 1483 if (!(val & BIT(position))) 1484 return 0; 1485 } 1486 1487 /* 1488 * Delay is arbitrary - the specification doesn't say how long 1489 * we are expected to wait. Extra check required to make sure 1490 * we don't wait needlessly on the last iteration. 1491 */ 1492 if (i - 1) 1493 udelay(1); 1494 } 1495 1496 return -EAGAIN; 1497 } 1498 EXPORT_SYMBOL_GPL(coresight_timeout); 1499 1500 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1501 { 1502 return csdev_access_relaxed_read32(&csdev->access, offset); 1503 } 1504 1505 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1506 { 1507 return csdev_access_read32(&csdev->access, offset); 1508 } 1509 1510 void coresight_relaxed_write32(struct coresight_device *csdev, 1511 u32 val, u32 offset) 1512 { 1513 csdev_access_relaxed_write32(&csdev->access, val, offset); 1514 } 1515 1516 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1517 { 1518 csdev_access_write32(&csdev->access, val, offset); 1519 } 1520 1521 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1522 { 1523 return csdev_access_relaxed_read64(&csdev->access, offset); 1524 } 1525 1526 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1527 { 1528 return csdev_access_read64(&csdev->access, offset); 1529 } 1530 1531 void coresight_relaxed_write64(struct coresight_device *csdev, 1532 u64 val, u32 offset) 1533 { 1534 csdev_access_relaxed_write64(&csdev->access, val, offset); 1535 } 1536 1537 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1538 { 1539 csdev_access_write64(&csdev->access, val, offset); 1540 } 1541 1542 /* 1543 * coresight_release_platform_data: Release references to the devices connected 1544 * to the output port of this device. 1545 */ 1546 void coresight_release_platform_data(struct coresight_device *csdev, 1547 struct coresight_platform_data *pdata) 1548 { 1549 int i; 1550 struct coresight_connection *conns = pdata->conns; 1551 1552 for (i = 0; i < pdata->nr_outport; i++) { 1553 /* If we have made the links, remove them now */ 1554 if (csdev && conns[i].child_dev) 1555 coresight_remove_links(csdev, &conns[i]); 1556 /* 1557 * Drop the refcount and clear the handle as this device 1558 * is going away 1559 */ 1560 if (conns[i].child_fwnode) { 1561 fwnode_handle_put(conns[i].child_fwnode); 1562 pdata->conns[i].child_fwnode = NULL; 1563 } 1564 } 1565 if (csdev) 1566 coresight_remove_conns_sysfs_group(csdev); 1567 } 1568 1569 struct coresight_device *coresight_register(struct coresight_desc *desc) 1570 { 1571 int ret; 1572 int link_subtype; 1573 int nr_refcnts = 1; 1574 atomic_t *refcnts = NULL; 1575 struct coresight_device *csdev; 1576 bool registered = false; 1577 1578 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1579 if (!csdev) { 1580 ret = -ENOMEM; 1581 goto err_out; 1582 } 1583 1584 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1585 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1586 link_subtype = desc->subtype.link_subtype; 1587 1588 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1589 nr_refcnts = desc->pdata->nr_inport; 1590 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1591 nr_refcnts = desc->pdata->nr_outport; 1592 } 1593 1594 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1595 if (!refcnts) { 1596 ret = -ENOMEM; 1597 kfree(csdev); 1598 goto err_out; 1599 } 1600 1601 csdev->refcnt = refcnts; 1602 1603 csdev->pdata = desc->pdata; 1604 1605 csdev->type = desc->type; 1606 csdev->subtype = desc->subtype; 1607 csdev->ops = desc->ops; 1608 csdev->access = desc->access; 1609 csdev->orphan = false; 1610 1611 csdev->dev.type = &coresight_dev_type[desc->type]; 1612 csdev->dev.groups = desc->groups; 1613 csdev->dev.parent = desc->dev; 1614 csdev->dev.release = coresight_device_release; 1615 csdev->dev.bus = &coresight_bustype; 1616 /* 1617 * Hold the reference to our parent device. This will be 1618 * dropped only in coresight_device_release(). 1619 */ 1620 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1621 dev_set_name(&csdev->dev, "%s", desc->name); 1622 1623 /* 1624 * Make sure the device registration and the connection fixup 1625 * are synchronised, so that we don't see uninitialised devices 1626 * on the coresight bus while trying to resolve the connections. 1627 */ 1628 mutex_lock(&coresight_mutex); 1629 1630 ret = device_register(&csdev->dev); 1631 if (ret) { 1632 put_device(&csdev->dev); 1633 /* 1634 * All resources are free'd explicitly via 1635 * coresight_device_release(), triggered from put_device(). 1636 */ 1637 goto out_unlock; 1638 } 1639 1640 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1641 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1642 ret = etm_perf_add_symlink_sink(csdev); 1643 1644 if (ret) { 1645 device_unregister(&csdev->dev); 1646 /* 1647 * As with the above, all resources are free'd 1648 * explicitly via coresight_device_release() triggered 1649 * from put_device(), which is in turn called from 1650 * function device_unregister(). 1651 */ 1652 goto out_unlock; 1653 } 1654 } 1655 /* Device is now registered */ 1656 registered = true; 1657 1658 ret = coresight_create_conns_sysfs_group(csdev); 1659 if (!ret) 1660 ret = coresight_fixup_device_conns(csdev); 1661 if (!ret) 1662 ret = coresight_fixup_orphan_conns(csdev); 1663 1664 out_unlock: 1665 mutex_unlock(&coresight_mutex); 1666 /* Success */ 1667 if (!ret) { 1668 if (cti_assoc_ops && cti_assoc_ops->add) 1669 cti_assoc_ops->add(csdev); 1670 return csdev; 1671 } 1672 1673 /* Unregister the device if needed */ 1674 if (registered) { 1675 coresight_unregister(csdev); 1676 return ERR_PTR(ret); 1677 } 1678 1679 err_out: 1680 /* Cleanup the connection information */ 1681 coresight_release_platform_data(NULL, desc->pdata); 1682 return ERR_PTR(ret); 1683 } 1684 EXPORT_SYMBOL_GPL(coresight_register); 1685 1686 void coresight_unregister(struct coresight_device *csdev) 1687 { 1688 etm_perf_del_symlink_sink(csdev); 1689 /* Remove references of that device in the topology */ 1690 if (cti_assoc_ops && cti_assoc_ops->remove) 1691 cti_assoc_ops->remove(csdev); 1692 coresight_remove_conns(csdev); 1693 coresight_clear_default_sink(csdev); 1694 coresight_release_platform_data(csdev, csdev->pdata); 1695 device_unregister(&csdev->dev); 1696 } 1697 EXPORT_SYMBOL_GPL(coresight_unregister); 1698 1699 1700 /* 1701 * coresight_search_device_idx - Search the fwnode handle of a device 1702 * in the given dev_idx list. Must be called with the coresight_mutex held. 1703 * 1704 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1705 */ 1706 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1707 struct fwnode_handle *fwnode) 1708 { 1709 int i; 1710 1711 for (i = 0; i < dict->nr_idx; i++) 1712 if (dict->fwnode_list[i] == fwnode) 1713 return i; 1714 return -ENOENT; 1715 } 1716 1717 bool coresight_loses_context_with_cpu(struct device *dev) 1718 { 1719 return fwnode_property_present(dev_fwnode(dev), 1720 "arm,coresight-loses-context-with-cpu"); 1721 } 1722 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1723 1724 /* 1725 * coresight_alloc_device_name - Get an index for a given device in the 1726 * device index list specific to a driver. An index is allocated for a 1727 * device and is tracked with the fwnode_handle to prevent allocating 1728 * duplicate indices for the same device (e.g, if we defer probing of 1729 * a device due to dependencies), in case the index is requested again. 1730 */ 1731 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1732 struct device *dev) 1733 { 1734 int idx; 1735 char *name = NULL; 1736 struct fwnode_handle **list; 1737 1738 mutex_lock(&coresight_mutex); 1739 1740 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1741 if (idx < 0) { 1742 /* Make space for the new entry */ 1743 idx = dict->nr_idx; 1744 list = krealloc_array(dict->fwnode_list, 1745 idx + 1, sizeof(*dict->fwnode_list), 1746 GFP_KERNEL); 1747 if (ZERO_OR_NULL_PTR(list)) { 1748 idx = -ENOMEM; 1749 goto done; 1750 } 1751 1752 list[idx] = dev_fwnode(dev); 1753 dict->fwnode_list = list; 1754 dict->nr_idx = idx + 1; 1755 } 1756 1757 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1758 done: 1759 mutex_unlock(&coresight_mutex); 1760 return name; 1761 } 1762 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1763 1764 struct bus_type coresight_bustype = { 1765 .name = "coresight", 1766 }; 1767 1768 static int __init coresight_init(void) 1769 { 1770 int ret; 1771 1772 ret = bus_register(&coresight_bustype); 1773 if (ret) 1774 return ret; 1775 1776 ret = etm_perf_init(); 1777 if (ret) 1778 goto exit_bus_unregister; 1779 1780 /* initialise the coresight syscfg API */ 1781 ret = cscfg_init(); 1782 if (!ret) 1783 return 0; 1784 1785 etm_perf_exit(); 1786 exit_bus_unregister: 1787 bus_unregister(&coresight_bustype); 1788 return ret; 1789 } 1790 1791 static void __exit coresight_exit(void) 1792 { 1793 cscfg_exit(); 1794 etm_perf_exit(); 1795 bus_unregister(&coresight_bustype); 1796 } 1797 1798 module_init(coresight_init); 1799 module_exit(coresight_exit); 1800 1801 MODULE_LICENSE("GPL v2"); 1802 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1803 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1804 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1805