1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/slab.h> 14 #include <linux/stringhash.h> 15 #include <linux/mutex.h> 16 #include <linux/clk.h> 17 #include <linux/coresight.h> 18 #include <linux/of_platform.h> 19 #include <linux/delay.h> 20 #include <linux/pm_runtime.h> 21 22 #include "coresight-etm-perf.h" 23 #include "coresight-priv.h" 24 25 static DEFINE_MUTEX(coresight_mutex); 26 27 /** 28 * struct coresight_node - elements of a path, from source to sink 29 * @csdev: Address of an element. 30 * @link: hook to the list. 31 */ 32 struct coresight_node { 33 struct coresight_device *csdev; 34 struct list_head link; 35 }; 36 37 /* 38 * When operating Coresight drivers from the sysFS interface, only a single 39 * path can exist from a tracer (associated to a CPU) to a sink. 40 */ 41 static DEFINE_PER_CPU(struct list_head *, tracer_path); 42 43 /* 44 * As of this writing only a single STM can be found in CS topologies. Since 45 * there is no way to know if we'll ever see more and what kind of 46 * configuration they will enact, for the time being only define a single path 47 * for STM. 48 */ 49 static struct list_head *stm_path; 50 51 /* 52 * When losing synchronisation a new barrier packet needs to be inserted at the 53 * beginning of the data collected in a buffer. That way the decoder knows that 54 * it needs to look for another sync sequence. 55 */ 56 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 57 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 58 59 static const struct cti_assoc_op *cti_assoc_ops; 60 61 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 62 { 63 cti_assoc_ops = cti_op; 64 } 65 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 66 67 void coresight_remove_cti_ops(void) 68 { 69 cti_assoc_ops = NULL; 70 } 71 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 72 73 static int coresight_id_match(struct device *dev, void *data) 74 { 75 int trace_id, i_trace_id; 76 struct coresight_device *csdev, *i_csdev; 77 78 csdev = data; 79 i_csdev = to_coresight_device(dev); 80 81 /* 82 * No need to care about oneself and components that are not 83 * sources or not enabled 84 */ 85 if (i_csdev == csdev || !i_csdev->enable || 86 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 87 return 0; 88 89 /* Get the source ID for both compoment */ 90 trace_id = source_ops(csdev)->trace_id(csdev); 91 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); 92 93 /* All you need is one */ 94 if (trace_id == i_trace_id) 95 return 1; 96 97 return 0; 98 } 99 100 static int coresight_source_is_unique(struct coresight_device *csdev) 101 { 102 int trace_id = source_ops(csdev)->trace_id(csdev); 103 104 /* this shouldn't happen */ 105 if (trace_id < 0) 106 return 0; 107 108 return !bus_for_each_dev(&coresight_bustype, NULL, 109 csdev, coresight_id_match); 110 } 111 112 static int coresight_find_link_inport(struct coresight_device *csdev, 113 struct coresight_device *parent) 114 { 115 int i; 116 struct coresight_connection *conn; 117 118 for (i = 0; i < parent->pdata->nr_outport; i++) { 119 conn = &parent->pdata->conns[i]; 120 if (conn->child_dev == csdev) 121 return conn->child_port; 122 } 123 124 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 125 dev_name(&parent->dev), dev_name(&csdev->dev)); 126 127 return -ENODEV; 128 } 129 130 static int coresight_find_link_outport(struct coresight_device *csdev, 131 struct coresight_device *child) 132 { 133 int i; 134 struct coresight_connection *conn; 135 136 for (i = 0; i < csdev->pdata->nr_outport; i++) { 137 conn = &csdev->pdata->conns[i]; 138 if (conn->child_dev == child) 139 return conn->outport; 140 } 141 142 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 143 dev_name(&csdev->dev), dev_name(&child->dev)); 144 145 return -ENODEV; 146 } 147 148 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev) 149 { 150 return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR); 151 } 152 153 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev) 154 { 155 return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED; 156 } 157 158 static inline bool coresight_is_claimed_any(struct coresight_device *csdev) 159 { 160 return coresight_read_claim_tags(csdev) != 0; 161 } 162 163 static inline void coresight_set_claim_tags(struct coresight_device *csdev) 164 { 165 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 166 CORESIGHT_CLAIMSET); 167 isb(); 168 } 169 170 static inline void coresight_clear_claim_tags(struct coresight_device *csdev) 171 { 172 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 173 CORESIGHT_CLAIMCLR); 174 isb(); 175 } 176 177 /* 178 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 179 * to prevent an external tool from touching this device. As per PSCI 180 * standards, section "Preserving the execution context" => "Debug and Trace 181 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 182 * DBGCLAIM[0] is reserved for external tools. 183 * 184 * Called with CS_UNLOCKed for the component. 185 * Returns : 0 on success 186 */ 187 int coresight_claim_device_unlocked(struct coresight_device *csdev) 188 { 189 if (WARN_ON(!csdev)) 190 return -EINVAL; 191 192 if (coresight_is_claimed_any(csdev)) 193 return -EBUSY; 194 195 coresight_set_claim_tags(csdev); 196 if (coresight_is_claimed_self_hosted(csdev)) 197 return 0; 198 /* There was a race setting the tags, clean up and fail */ 199 coresight_clear_claim_tags(csdev); 200 return -EBUSY; 201 } 202 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 203 204 int coresight_claim_device(struct coresight_device *csdev) 205 { 206 int rc; 207 208 if (WARN_ON(!csdev)) 209 return -EINVAL; 210 211 CS_UNLOCK(csdev->access.base); 212 rc = coresight_claim_device_unlocked(csdev); 213 CS_LOCK(csdev->access.base); 214 215 return rc; 216 } 217 EXPORT_SYMBOL_GPL(coresight_claim_device); 218 219 /* 220 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 221 * Called with CS_UNLOCKed for the component. 222 */ 223 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 224 { 225 226 if (WARN_ON(!csdev)) 227 return; 228 229 if (coresight_is_claimed_self_hosted(csdev)) 230 coresight_clear_claim_tags(csdev); 231 else 232 /* 233 * The external agent may have not honoured our claim 234 * and has manipulated it. Or something else has seriously 235 * gone wrong in our driver. 236 */ 237 WARN_ON_ONCE(1); 238 } 239 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 240 241 void coresight_disclaim_device(struct coresight_device *csdev) 242 { 243 if (WARN_ON(!csdev)) 244 return; 245 246 CS_UNLOCK(csdev->access.base); 247 coresight_disclaim_device_unlocked(csdev); 248 CS_LOCK(csdev->access.base); 249 } 250 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 251 252 /* enable or disable an associated CTI device of the supplied CS device */ 253 static int 254 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 255 { 256 int ect_ret = 0; 257 struct coresight_device *ect_csdev = csdev->ect_dev; 258 struct module *mod; 259 260 if (!ect_csdev) 261 return 0; 262 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 263 return 0; 264 265 mod = ect_csdev->dev.parent->driver->owner; 266 if (enable) { 267 if (try_module_get(mod)) { 268 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 269 if (ect_ret) { 270 module_put(mod); 271 } else { 272 get_device(ect_csdev->dev.parent); 273 csdev->ect_enabled = true; 274 } 275 } else 276 ect_ret = -ENODEV; 277 } else { 278 if (csdev->ect_enabled) { 279 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 280 put_device(ect_csdev->dev.parent); 281 module_put(mod); 282 csdev->ect_enabled = false; 283 } 284 } 285 286 /* output warning if ECT enable is preventing trace operation */ 287 if (ect_ret) 288 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 289 dev_name(&ect_csdev->dev), 290 enable ? "enable" : "disable"); 291 return ect_ret; 292 } 293 294 /* 295 * Set the associated ect / cti device while holding the coresight_mutex 296 * to avoid a race with coresight_enable that may try to use this value. 297 */ 298 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 299 struct coresight_device *ect_csdev) 300 { 301 mutex_lock(&coresight_mutex); 302 csdev->ect_dev = ect_csdev; 303 mutex_unlock(&coresight_mutex); 304 } 305 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 306 307 static int coresight_enable_sink(struct coresight_device *csdev, 308 u32 mode, void *data) 309 { 310 int ret; 311 312 /* 313 * We need to make sure the "new" session is compatible with the 314 * existing "mode" of operation. 315 */ 316 if (!sink_ops(csdev)->enable) 317 return -EINVAL; 318 319 ret = coresight_control_assoc_ectdev(csdev, true); 320 if (ret) 321 return ret; 322 ret = sink_ops(csdev)->enable(csdev, mode, data); 323 if (ret) { 324 coresight_control_assoc_ectdev(csdev, false); 325 return ret; 326 } 327 csdev->enable = true; 328 329 return 0; 330 } 331 332 static void coresight_disable_sink(struct coresight_device *csdev) 333 { 334 int ret; 335 336 if (!sink_ops(csdev)->disable) 337 return; 338 339 ret = sink_ops(csdev)->disable(csdev); 340 if (ret) 341 return; 342 coresight_control_assoc_ectdev(csdev, false); 343 csdev->enable = false; 344 } 345 346 static int coresight_enable_link(struct coresight_device *csdev, 347 struct coresight_device *parent, 348 struct coresight_device *child) 349 { 350 int ret = 0; 351 int link_subtype; 352 int inport, outport; 353 354 if (!parent || !child) 355 return -EINVAL; 356 357 inport = coresight_find_link_inport(csdev, parent); 358 outport = coresight_find_link_outport(csdev, child); 359 link_subtype = csdev->subtype.link_subtype; 360 361 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 362 return inport; 363 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 364 return outport; 365 366 if (link_ops(csdev)->enable) { 367 ret = coresight_control_assoc_ectdev(csdev, true); 368 if (!ret) { 369 ret = link_ops(csdev)->enable(csdev, inport, outport); 370 if (ret) 371 coresight_control_assoc_ectdev(csdev, false); 372 } 373 } 374 375 if (!ret) 376 csdev->enable = true; 377 378 return ret; 379 } 380 381 static void coresight_disable_link(struct coresight_device *csdev, 382 struct coresight_device *parent, 383 struct coresight_device *child) 384 { 385 int i, nr_conns; 386 int link_subtype; 387 int inport, outport; 388 389 if (!parent || !child) 390 return; 391 392 inport = coresight_find_link_inport(csdev, parent); 393 outport = coresight_find_link_outport(csdev, child); 394 link_subtype = csdev->subtype.link_subtype; 395 396 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 397 nr_conns = csdev->pdata->nr_inport; 398 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 399 nr_conns = csdev->pdata->nr_outport; 400 } else { 401 nr_conns = 1; 402 } 403 404 if (link_ops(csdev)->disable) { 405 link_ops(csdev)->disable(csdev, inport, outport); 406 coresight_control_assoc_ectdev(csdev, false); 407 } 408 409 for (i = 0; i < nr_conns; i++) 410 if (atomic_read(&csdev->refcnt[i]) != 0) 411 return; 412 413 csdev->enable = false; 414 } 415 416 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 417 { 418 int ret; 419 420 if (!coresight_source_is_unique(csdev)) { 421 dev_warn(&csdev->dev, "traceID %d not unique\n", 422 source_ops(csdev)->trace_id(csdev)); 423 return -EINVAL; 424 } 425 426 if (!csdev->enable) { 427 if (source_ops(csdev)->enable) { 428 ret = coresight_control_assoc_ectdev(csdev, true); 429 if (ret) 430 return ret; 431 ret = source_ops(csdev)->enable(csdev, NULL, mode); 432 if (ret) { 433 coresight_control_assoc_ectdev(csdev, false); 434 return ret; 435 } 436 } 437 csdev->enable = true; 438 } 439 440 atomic_inc(csdev->refcnt); 441 442 return 0; 443 } 444 445 /** 446 * coresight_disable_source - Drop the reference count by 1 and disable 447 * the device if there are no users left. 448 * 449 * @csdev: The coresight device to disable 450 * 451 * Returns true if the device has been disabled. 452 */ 453 static bool coresight_disable_source(struct coresight_device *csdev) 454 { 455 if (atomic_dec_return(csdev->refcnt) == 0) { 456 if (source_ops(csdev)->disable) 457 source_ops(csdev)->disable(csdev, NULL); 458 coresight_control_assoc_ectdev(csdev, false); 459 csdev->enable = false; 460 } 461 return !csdev->enable; 462 } 463 464 /* 465 * coresight_disable_path_from : Disable components in the given path beyond 466 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 467 * disabled. 468 */ 469 static void coresight_disable_path_from(struct list_head *path, 470 struct coresight_node *nd) 471 { 472 u32 type; 473 struct coresight_device *csdev, *parent, *child; 474 475 if (!nd) 476 nd = list_first_entry(path, struct coresight_node, link); 477 478 list_for_each_entry_continue(nd, path, link) { 479 csdev = nd->csdev; 480 type = csdev->type; 481 482 /* 483 * ETF devices are tricky... They can be a link or a sink, 484 * depending on how they are configured. If an ETF has been 485 * "activated" it will be configured as a sink, otherwise 486 * go ahead with the link configuration. 487 */ 488 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 489 type = (csdev == coresight_get_sink(path)) ? 490 CORESIGHT_DEV_TYPE_SINK : 491 CORESIGHT_DEV_TYPE_LINK; 492 493 switch (type) { 494 case CORESIGHT_DEV_TYPE_SINK: 495 coresight_disable_sink(csdev); 496 break; 497 case CORESIGHT_DEV_TYPE_SOURCE: 498 /* 499 * We skip the first node in the path assuming that it 500 * is the source. So we don't expect a source device in 501 * the middle of a path. 502 */ 503 WARN_ON(1); 504 break; 505 case CORESIGHT_DEV_TYPE_LINK: 506 parent = list_prev_entry(nd, link)->csdev; 507 child = list_next_entry(nd, link)->csdev; 508 coresight_disable_link(csdev, parent, child); 509 break; 510 default: 511 break; 512 } 513 } 514 } 515 516 void coresight_disable_path(struct list_head *path) 517 { 518 coresight_disable_path_from(path, NULL); 519 } 520 EXPORT_SYMBOL_GPL(coresight_disable_path); 521 522 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 523 { 524 525 int ret = 0; 526 u32 type; 527 struct coresight_node *nd; 528 struct coresight_device *csdev, *parent, *child; 529 530 list_for_each_entry_reverse(nd, path, link) { 531 csdev = nd->csdev; 532 type = csdev->type; 533 534 /* 535 * ETF devices are tricky... They can be a link or a sink, 536 * depending on how they are configured. If an ETF has been 537 * "activated" it will be configured as a sink, otherwise 538 * go ahead with the link configuration. 539 */ 540 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 541 type = (csdev == coresight_get_sink(path)) ? 542 CORESIGHT_DEV_TYPE_SINK : 543 CORESIGHT_DEV_TYPE_LINK; 544 545 switch (type) { 546 case CORESIGHT_DEV_TYPE_SINK: 547 ret = coresight_enable_sink(csdev, mode, sink_data); 548 /* 549 * Sink is the first component turned on. If we 550 * failed to enable the sink, there are no components 551 * that need disabling. Disabling the path here 552 * would mean we could disrupt an existing session. 553 */ 554 if (ret) 555 goto out; 556 break; 557 case CORESIGHT_DEV_TYPE_SOURCE: 558 /* sources are enabled from either sysFS or Perf */ 559 break; 560 case CORESIGHT_DEV_TYPE_LINK: 561 parent = list_prev_entry(nd, link)->csdev; 562 child = list_next_entry(nd, link)->csdev; 563 ret = coresight_enable_link(csdev, parent, child); 564 if (ret) 565 goto err; 566 break; 567 default: 568 goto err; 569 } 570 } 571 572 out: 573 return ret; 574 err: 575 coresight_disable_path_from(path, nd); 576 goto out; 577 } 578 579 struct coresight_device *coresight_get_sink(struct list_head *path) 580 { 581 struct coresight_device *csdev; 582 583 if (!path) 584 return NULL; 585 586 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 587 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 588 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 589 return NULL; 590 591 return csdev; 592 } 593 594 static struct coresight_device * 595 coresight_find_enabled_sink(struct coresight_device *csdev) 596 { 597 int i; 598 struct coresight_device *sink; 599 600 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 601 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 602 csdev->activated) 603 return csdev; 604 605 /* 606 * Recursively explore each port found on this element. 607 */ 608 for (i = 0; i < csdev->pdata->nr_outport; i++) { 609 struct coresight_device *child_dev; 610 611 child_dev = csdev->pdata->conns[i].child_dev; 612 if (child_dev) 613 sink = coresight_find_enabled_sink(child_dev); 614 if (sink) 615 return sink; 616 } 617 618 return NULL; 619 } 620 621 /** 622 * coresight_get_enabled_sink - returns the first enabled sink using 623 * connection based search starting from the source reference 624 * 625 * @source: Coresight source device reference 626 */ 627 struct coresight_device * 628 coresight_get_enabled_sink(struct coresight_device *source) 629 { 630 if (!source) 631 return NULL; 632 633 return coresight_find_enabled_sink(source); 634 } 635 636 static int coresight_sink_by_id(struct device *dev, const void *data) 637 { 638 struct coresight_device *csdev = to_coresight_device(dev); 639 unsigned long hash; 640 641 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 642 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 643 644 if (!csdev->ea) 645 return 0; 646 /* 647 * See function etm_perf_add_symlink_sink() to know where 648 * this comes from. 649 */ 650 hash = (unsigned long)csdev->ea->var; 651 652 if ((u32)hash == *(u32 *)data) 653 return 1; 654 } 655 656 return 0; 657 } 658 659 /** 660 * coresight_get_sink_by_id - returns the sink that matches the id 661 * @id: Id of the sink to match 662 * 663 * The name of a sink is unique, whether it is found on the AMBA bus or 664 * otherwise. As such the hash of that name can easily be used to identify 665 * a sink. 666 */ 667 struct coresight_device *coresight_get_sink_by_id(u32 id) 668 { 669 struct device *dev = NULL; 670 671 dev = bus_find_device(&coresight_bustype, NULL, &id, 672 coresight_sink_by_id); 673 674 return dev ? to_coresight_device(dev) : NULL; 675 } 676 677 /** 678 * coresight_get_ref- Helper function to increase reference count to module 679 * and device. 680 * 681 * @csdev: The coresight device to get a reference on. 682 * 683 * Return true in successful case and power up the device. 684 * Return false when failed to get reference of module. 685 */ 686 static inline bool coresight_get_ref(struct coresight_device *csdev) 687 { 688 struct device *dev = csdev->dev.parent; 689 690 /* Make sure the driver can't be removed */ 691 if (!try_module_get(dev->driver->owner)) 692 return false; 693 /* Make sure the device can't go away */ 694 get_device(dev); 695 pm_runtime_get_sync(dev); 696 return true; 697 } 698 699 /** 700 * coresight_put_ref- Helper function to decrease reference count to module 701 * and device. Power off the device. 702 * 703 * @csdev: The coresight device to decrement a reference from. 704 */ 705 static inline void coresight_put_ref(struct coresight_device *csdev) 706 { 707 struct device *dev = csdev->dev.parent; 708 709 pm_runtime_put(dev); 710 put_device(dev); 711 module_put(dev->driver->owner); 712 } 713 714 /* 715 * coresight_grab_device - Power up this device and any of the helper 716 * devices connected to it for trace operation. Since the helper devices 717 * don't appear on the trace path, they should be handled along with the 718 * the master device. 719 */ 720 static int coresight_grab_device(struct coresight_device *csdev) 721 { 722 int i; 723 724 for (i = 0; i < csdev->pdata->nr_outport; i++) { 725 struct coresight_device *child; 726 727 child = csdev->pdata->conns[i].child_dev; 728 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 729 if (!coresight_get_ref(child)) 730 goto err; 731 } 732 if (coresight_get_ref(csdev)) 733 return 0; 734 err: 735 for (i--; i >= 0; i--) { 736 struct coresight_device *child; 737 738 child = csdev->pdata->conns[i].child_dev; 739 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 740 coresight_put_ref(child); 741 } 742 return -ENODEV; 743 } 744 745 /* 746 * coresight_drop_device - Release this device and any of the helper 747 * devices connected to it. 748 */ 749 static void coresight_drop_device(struct coresight_device *csdev) 750 { 751 int i; 752 753 coresight_put_ref(csdev); 754 for (i = 0; i < csdev->pdata->nr_outport; i++) { 755 struct coresight_device *child; 756 757 child = csdev->pdata->conns[i].child_dev; 758 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 759 coresight_put_ref(child); 760 } 761 } 762 763 /** 764 * _coresight_build_path - recursively build a path from a @csdev to a sink. 765 * @csdev: The device to start from. 766 * @sink: The final sink we want in this path. 767 * @path: The list to add devices to. 768 * 769 * The tree of Coresight device is traversed until an activated sink is 770 * found. From there the sink is added to the list along with all the 771 * devices that led to that point - the end result is a list from source 772 * to sink. In that list the source is the first device and the sink the 773 * last one. 774 */ 775 static int _coresight_build_path(struct coresight_device *csdev, 776 struct coresight_device *sink, 777 struct list_head *path) 778 { 779 int i, ret; 780 bool found = false; 781 struct coresight_node *node; 782 783 /* An activated sink has been found. Enqueue the element */ 784 if (csdev == sink) 785 goto out; 786 787 /* Not a sink - recursively explore each port found on this element */ 788 for (i = 0; i < csdev->pdata->nr_outport; i++) { 789 struct coresight_device *child_dev; 790 791 child_dev = csdev->pdata->conns[i].child_dev; 792 if (child_dev && 793 _coresight_build_path(child_dev, sink, path) == 0) { 794 found = true; 795 break; 796 } 797 } 798 799 if (!found) 800 return -ENODEV; 801 802 out: 803 /* 804 * A path from this element to a sink has been found. The elements 805 * leading to the sink are already enqueued, all that is left to do 806 * is tell the PM runtime core we need this element and add a node 807 * for it. 808 */ 809 ret = coresight_grab_device(csdev); 810 if (ret) 811 return ret; 812 813 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 814 if (!node) 815 return -ENOMEM; 816 817 node->csdev = csdev; 818 list_add(&node->link, path); 819 820 return 0; 821 } 822 823 struct list_head *coresight_build_path(struct coresight_device *source, 824 struct coresight_device *sink) 825 { 826 struct list_head *path; 827 int rc; 828 829 if (!sink) 830 return ERR_PTR(-EINVAL); 831 832 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 833 if (!path) 834 return ERR_PTR(-ENOMEM); 835 836 INIT_LIST_HEAD(path); 837 838 rc = _coresight_build_path(source, sink, path); 839 if (rc) { 840 kfree(path); 841 return ERR_PTR(rc); 842 } 843 844 return path; 845 } 846 847 /** 848 * coresight_release_path - release a previously built path. 849 * @path: the path to release. 850 * 851 * Go through all the elements of a path and 1) removed it from the list and 852 * 2) free the memory allocated for each node. 853 */ 854 void coresight_release_path(struct list_head *path) 855 { 856 struct coresight_device *csdev; 857 struct coresight_node *nd, *next; 858 859 list_for_each_entry_safe(nd, next, path, link) { 860 csdev = nd->csdev; 861 862 coresight_drop_device(csdev); 863 list_del(&nd->link); 864 kfree(nd); 865 } 866 867 kfree(path); 868 path = NULL; 869 } 870 871 /* return true if the device is a suitable type for a default sink */ 872 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 873 { 874 /* sink & correct subtype */ 875 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 876 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 877 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 878 return true; 879 return false; 880 } 881 882 /** 883 * coresight_select_best_sink - return the best sink for use as default from 884 * the two provided. 885 * 886 * @sink: current best sink. 887 * @depth: search depth where current sink was found. 888 * @new_sink: new sink for comparison with current sink. 889 * @new_depth: search depth where new sink was found. 890 * 891 * Sinks prioritised according to coresight_dev_subtype_sink, with only 892 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 893 * 894 * Where two sinks of equal priority are found, the sink closest to the 895 * source is used (smallest search depth). 896 * 897 * return @new_sink & update @depth if better than @sink, else return @sink. 898 */ 899 static struct coresight_device * 900 coresight_select_best_sink(struct coresight_device *sink, int *depth, 901 struct coresight_device *new_sink, int new_depth) 902 { 903 bool update = false; 904 905 if (!sink) { 906 /* first found at this level */ 907 update = true; 908 } else if (new_sink->subtype.sink_subtype > 909 sink->subtype.sink_subtype) { 910 /* found better sink */ 911 update = true; 912 } else if ((new_sink->subtype.sink_subtype == 913 sink->subtype.sink_subtype) && 914 (*depth > new_depth)) { 915 /* found same but closer sink */ 916 update = true; 917 } 918 919 if (update) 920 *depth = new_depth; 921 return update ? new_sink : sink; 922 } 923 924 /** 925 * coresight_find_sink - recursive function to walk trace connections from 926 * source to find a suitable default sink. 927 * 928 * @csdev: source / current device to check. 929 * @depth: [in] search depth of calling dev, [out] depth of found sink. 930 * 931 * This will walk the connection path from a source (ETM) till a suitable 932 * sink is encountered and return that sink to the original caller. 933 * 934 * If current device is a plain sink return that & depth, otherwise recursively 935 * call child connections looking for a sink. Select best possible using 936 * coresight_select_best_sink. 937 * 938 * return best sink found, or NULL if not found at this node or child nodes. 939 */ 940 static struct coresight_device * 941 coresight_find_sink(struct coresight_device *csdev, int *depth) 942 { 943 int i, curr_depth = *depth + 1, found_depth = 0; 944 struct coresight_device *found_sink = NULL; 945 946 if (coresight_is_def_sink_type(csdev)) { 947 found_depth = curr_depth; 948 found_sink = csdev; 949 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 950 goto return_def_sink; 951 /* look past LINKSINK for something better */ 952 } 953 954 /* 955 * Not a sink we want - or possible child sink may be better. 956 * recursively explore each port found on this element. 957 */ 958 for (i = 0; i < csdev->pdata->nr_outport; i++) { 959 struct coresight_device *child_dev, *sink = NULL; 960 int child_depth = curr_depth; 961 962 child_dev = csdev->pdata->conns[i].child_dev; 963 if (child_dev) 964 sink = coresight_find_sink(child_dev, &child_depth); 965 966 if (sink) 967 found_sink = coresight_select_best_sink(found_sink, 968 &found_depth, 969 sink, 970 child_depth); 971 } 972 973 return_def_sink: 974 /* return found sink and depth */ 975 if (found_sink) 976 *depth = found_depth; 977 return found_sink; 978 } 979 980 /** 981 * coresight_find_default_sink: Find a sink suitable for use as a 982 * default sink. 983 * 984 * @csdev: starting source to find a connected sink. 985 * 986 * Walks connections graph looking for a suitable sink to enable for the 987 * supplied source. Uses CoreSight device subtypes and distance from source 988 * to select the best sink. 989 * 990 * If a sink is found, then the default sink for this device is set and 991 * will be automatically used in future. 992 * 993 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 994 * sink. 995 */ 996 struct coresight_device * 997 coresight_find_default_sink(struct coresight_device *csdev) 998 { 999 int depth = 0; 1000 1001 /* look for a default sink if we have not found for this device */ 1002 if (!csdev->def_sink) 1003 csdev->def_sink = coresight_find_sink(csdev, &depth); 1004 return csdev->def_sink; 1005 } 1006 1007 static int coresight_remove_sink_ref(struct device *dev, void *data) 1008 { 1009 struct coresight_device *sink = data; 1010 struct coresight_device *source = to_coresight_device(dev); 1011 1012 if (source->def_sink == sink) 1013 source->def_sink = NULL; 1014 return 0; 1015 } 1016 1017 /** 1018 * coresight_clear_default_sink: Remove all default sink references to the 1019 * supplied sink. 1020 * 1021 * If supplied device is a sink, then check all the bus devices and clear 1022 * out all the references to this sink from the coresight_device def_sink 1023 * parameter. 1024 * 1025 * @csdev: coresight sink - remove references to this from all sources. 1026 */ 1027 static void coresight_clear_default_sink(struct coresight_device *csdev) 1028 { 1029 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1030 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1031 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1032 coresight_remove_sink_ref); 1033 } 1034 } 1035 1036 /** coresight_validate_source - make sure a source has the right credentials 1037 * @csdev: the device structure for a source. 1038 * @function: the function this was called from. 1039 * 1040 * Assumes the coresight_mutex is held. 1041 */ 1042 static int coresight_validate_source(struct coresight_device *csdev, 1043 const char *function) 1044 { 1045 u32 type, subtype; 1046 1047 type = csdev->type; 1048 subtype = csdev->subtype.source_subtype; 1049 1050 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1051 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1052 return -EINVAL; 1053 } 1054 1055 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1056 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { 1057 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1058 return -EINVAL; 1059 } 1060 1061 return 0; 1062 } 1063 1064 int coresight_enable(struct coresight_device *csdev) 1065 { 1066 int cpu, ret = 0; 1067 struct coresight_device *sink; 1068 struct list_head *path; 1069 enum coresight_dev_subtype_source subtype; 1070 1071 subtype = csdev->subtype.source_subtype; 1072 1073 mutex_lock(&coresight_mutex); 1074 1075 ret = coresight_validate_source(csdev, __func__); 1076 if (ret) 1077 goto out; 1078 1079 if (csdev->enable) { 1080 /* 1081 * There could be multiple applications driving the software 1082 * source. So keep the refcount for each such user when the 1083 * source is already enabled. 1084 */ 1085 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1086 atomic_inc(csdev->refcnt); 1087 goto out; 1088 } 1089 1090 sink = coresight_get_enabled_sink(csdev); 1091 if (!sink) { 1092 ret = -EINVAL; 1093 goto out; 1094 } 1095 1096 path = coresight_build_path(csdev, sink); 1097 if (IS_ERR(path)) { 1098 pr_err("building path(s) failed\n"); 1099 ret = PTR_ERR(path); 1100 goto out; 1101 } 1102 1103 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1104 if (ret) 1105 goto err_path; 1106 1107 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1108 if (ret) 1109 goto err_source; 1110 1111 switch (subtype) { 1112 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1113 /* 1114 * When working from sysFS it is important to keep track 1115 * of the paths that were created so that they can be 1116 * undone in 'coresight_disable()'. Since there can only 1117 * be a single session per tracer (when working from sysFS) 1118 * a per-cpu variable will do just fine. 1119 */ 1120 cpu = source_ops(csdev)->cpu_id(csdev); 1121 per_cpu(tracer_path, cpu) = path; 1122 break; 1123 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1124 stm_path = path; 1125 break; 1126 default: 1127 /* We can't be here */ 1128 break; 1129 } 1130 1131 out: 1132 mutex_unlock(&coresight_mutex); 1133 return ret; 1134 1135 err_source: 1136 coresight_disable_path(path); 1137 1138 err_path: 1139 coresight_release_path(path); 1140 goto out; 1141 } 1142 EXPORT_SYMBOL_GPL(coresight_enable); 1143 1144 void coresight_disable(struct coresight_device *csdev) 1145 { 1146 int cpu, ret; 1147 struct list_head *path = NULL; 1148 1149 mutex_lock(&coresight_mutex); 1150 1151 ret = coresight_validate_source(csdev, __func__); 1152 if (ret) 1153 goto out; 1154 1155 if (!csdev->enable || !coresight_disable_source(csdev)) 1156 goto out; 1157 1158 switch (csdev->subtype.source_subtype) { 1159 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1160 cpu = source_ops(csdev)->cpu_id(csdev); 1161 path = per_cpu(tracer_path, cpu); 1162 per_cpu(tracer_path, cpu) = NULL; 1163 break; 1164 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1165 path = stm_path; 1166 stm_path = NULL; 1167 break; 1168 default: 1169 /* We can't be here */ 1170 break; 1171 } 1172 1173 coresight_disable_path(path); 1174 coresight_release_path(path); 1175 1176 out: 1177 mutex_unlock(&coresight_mutex); 1178 } 1179 EXPORT_SYMBOL_GPL(coresight_disable); 1180 1181 static ssize_t enable_sink_show(struct device *dev, 1182 struct device_attribute *attr, char *buf) 1183 { 1184 struct coresight_device *csdev = to_coresight_device(dev); 1185 1186 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1187 } 1188 1189 static ssize_t enable_sink_store(struct device *dev, 1190 struct device_attribute *attr, 1191 const char *buf, size_t size) 1192 { 1193 int ret; 1194 unsigned long val; 1195 struct coresight_device *csdev = to_coresight_device(dev); 1196 1197 ret = kstrtoul(buf, 10, &val); 1198 if (ret) 1199 return ret; 1200 1201 if (val) 1202 csdev->activated = true; 1203 else 1204 csdev->activated = false; 1205 1206 return size; 1207 1208 } 1209 static DEVICE_ATTR_RW(enable_sink); 1210 1211 static ssize_t enable_source_show(struct device *dev, 1212 struct device_attribute *attr, char *buf) 1213 { 1214 struct coresight_device *csdev = to_coresight_device(dev); 1215 1216 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1217 } 1218 1219 static ssize_t enable_source_store(struct device *dev, 1220 struct device_attribute *attr, 1221 const char *buf, size_t size) 1222 { 1223 int ret = 0; 1224 unsigned long val; 1225 struct coresight_device *csdev = to_coresight_device(dev); 1226 1227 ret = kstrtoul(buf, 10, &val); 1228 if (ret) 1229 return ret; 1230 1231 if (val) { 1232 ret = coresight_enable(csdev); 1233 if (ret) 1234 return ret; 1235 } else { 1236 coresight_disable(csdev); 1237 } 1238 1239 return size; 1240 } 1241 static DEVICE_ATTR_RW(enable_source); 1242 1243 static struct attribute *coresight_sink_attrs[] = { 1244 &dev_attr_enable_sink.attr, 1245 NULL, 1246 }; 1247 ATTRIBUTE_GROUPS(coresight_sink); 1248 1249 static struct attribute *coresight_source_attrs[] = { 1250 &dev_attr_enable_source.attr, 1251 NULL, 1252 }; 1253 ATTRIBUTE_GROUPS(coresight_source); 1254 1255 static struct device_type coresight_dev_type[] = { 1256 { 1257 .name = "none", 1258 }, 1259 { 1260 .name = "sink", 1261 .groups = coresight_sink_groups, 1262 }, 1263 { 1264 .name = "link", 1265 }, 1266 { 1267 .name = "linksink", 1268 .groups = coresight_sink_groups, 1269 }, 1270 { 1271 .name = "source", 1272 .groups = coresight_source_groups, 1273 }, 1274 { 1275 .name = "helper", 1276 }, 1277 { 1278 .name = "ect", 1279 }, 1280 }; 1281 1282 static void coresight_device_release(struct device *dev) 1283 { 1284 struct coresight_device *csdev = to_coresight_device(dev); 1285 1286 fwnode_handle_put(csdev->dev.fwnode); 1287 kfree(csdev->refcnt); 1288 kfree(csdev); 1289 } 1290 1291 static int coresight_orphan_match(struct device *dev, void *data) 1292 { 1293 int i, ret = 0; 1294 bool still_orphan = false; 1295 struct coresight_device *csdev, *i_csdev; 1296 struct coresight_connection *conn; 1297 1298 csdev = data; 1299 i_csdev = to_coresight_device(dev); 1300 1301 /* No need to check oneself */ 1302 if (csdev == i_csdev) 1303 return 0; 1304 1305 /* Move on to another component if no connection is orphan */ 1306 if (!i_csdev->orphan) 1307 return 0; 1308 /* 1309 * Circle throuch all the connection of that component. If we find 1310 * an orphan connection whose name matches @csdev, link it. 1311 */ 1312 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1313 conn = &i_csdev->pdata->conns[i]; 1314 1315 /* Skip the port if FW doesn't describe it */ 1316 if (!conn->child_fwnode) 1317 continue; 1318 /* We have found at least one orphan connection */ 1319 if (conn->child_dev == NULL) { 1320 /* Does it match this newly added device? */ 1321 if (conn->child_fwnode == csdev->dev.fwnode) { 1322 ret = coresight_make_links(i_csdev, 1323 conn, csdev); 1324 if (ret) 1325 return ret; 1326 } else { 1327 /* This component still has an orphan */ 1328 still_orphan = true; 1329 } 1330 } 1331 } 1332 1333 i_csdev->orphan = still_orphan; 1334 1335 /* 1336 * Returning '0' in case we didn't encounter any error, 1337 * ensures that all known component on the bus will be checked. 1338 */ 1339 return 0; 1340 } 1341 1342 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1343 { 1344 return bus_for_each_dev(&coresight_bustype, NULL, 1345 csdev, coresight_orphan_match); 1346 } 1347 1348 1349 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1350 { 1351 int i, ret = 0; 1352 1353 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1354 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1355 1356 if (!conn->child_fwnode) 1357 continue; 1358 conn->child_dev = 1359 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1360 if (conn->child_dev) { 1361 ret = coresight_make_links(csdev, conn, 1362 conn->child_dev); 1363 if (ret) 1364 break; 1365 } else { 1366 csdev->orphan = true; 1367 } 1368 } 1369 1370 return 0; 1371 } 1372 1373 static int coresight_remove_match(struct device *dev, void *data) 1374 { 1375 int i; 1376 struct coresight_device *csdev, *iterator; 1377 struct coresight_connection *conn; 1378 1379 csdev = data; 1380 iterator = to_coresight_device(dev); 1381 1382 /* No need to check oneself */ 1383 if (csdev == iterator) 1384 return 0; 1385 1386 /* 1387 * Circle throuch all the connection of that component. If we find 1388 * a connection whose name matches @csdev, remove it. 1389 */ 1390 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1391 conn = &iterator->pdata->conns[i]; 1392 1393 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1394 continue; 1395 1396 if (csdev->dev.fwnode == conn->child_fwnode) { 1397 iterator->orphan = true; 1398 coresight_remove_links(iterator, conn); 1399 /* 1400 * Drop the reference to the handle for the remote 1401 * device acquired in parsing the connections from 1402 * platform data. 1403 */ 1404 fwnode_handle_put(conn->child_fwnode); 1405 /* No need to continue */ 1406 break; 1407 } 1408 } 1409 1410 /* 1411 * Returning '0' ensures that all known component on the 1412 * bus will be checked. 1413 */ 1414 return 0; 1415 } 1416 1417 /* 1418 * coresight_remove_conns - Remove references to this given devices 1419 * from the connections of other devices. 1420 */ 1421 static void coresight_remove_conns(struct coresight_device *csdev) 1422 { 1423 /* 1424 * Another device will point to this device only if there is 1425 * an output port connected to this one. i.e, if the device 1426 * doesn't have at least one input port, there is no point 1427 * in searching all the devices. 1428 */ 1429 if (csdev->pdata->nr_inport) 1430 bus_for_each_dev(&coresight_bustype, NULL, 1431 csdev, coresight_remove_match); 1432 } 1433 1434 /** 1435 * coresight_timeout - loop until a bit has changed to a specific register 1436 * state. 1437 * @csa: coresight device access for the device 1438 * @offset: Offset of the register from the base of the device. 1439 * @position: the position of the bit of interest. 1440 * @value: the value the bit should have. 1441 * 1442 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1443 * TIMEOUT_US has elapsed, which ever happens first. 1444 */ 1445 int coresight_timeout(struct csdev_access *csa, u32 offset, 1446 int position, int value) 1447 { 1448 int i; 1449 u32 val; 1450 1451 for (i = TIMEOUT_US; i > 0; i--) { 1452 val = csdev_access_read32(csa, offset); 1453 /* waiting on the bit to go from 0 to 1 */ 1454 if (value) { 1455 if (val & BIT(position)) 1456 return 0; 1457 /* waiting on the bit to go from 1 to 0 */ 1458 } else { 1459 if (!(val & BIT(position))) 1460 return 0; 1461 } 1462 1463 /* 1464 * Delay is arbitrary - the specification doesn't say how long 1465 * we are expected to wait. Extra check required to make sure 1466 * we don't wait needlessly on the last iteration. 1467 */ 1468 if (i - 1) 1469 udelay(1); 1470 } 1471 1472 return -EAGAIN; 1473 } 1474 EXPORT_SYMBOL_GPL(coresight_timeout); 1475 1476 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1477 { 1478 return csdev_access_relaxed_read32(&csdev->access, offset); 1479 } 1480 1481 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1482 { 1483 return csdev_access_read32(&csdev->access, offset); 1484 } 1485 1486 void coresight_relaxed_write32(struct coresight_device *csdev, 1487 u32 val, u32 offset) 1488 { 1489 csdev_access_relaxed_write32(&csdev->access, val, offset); 1490 } 1491 1492 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1493 { 1494 csdev_access_write32(&csdev->access, val, offset); 1495 } 1496 1497 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1498 { 1499 return csdev_access_relaxed_read64(&csdev->access, offset); 1500 } 1501 1502 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1503 { 1504 return csdev_access_read64(&csdev->access, offset); 1505 } 1506 1507 void coresight_relaxed_write64(struct coresight_device *csdev, 1508 u64 val, u32 offset) 1509 { 1510 csdev_access_relaxed_write64(&csdev->access, val, offset); 1511 } 1512 1513 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1514 { 1515 csdev_access_write64(&csdev->access, val, offset); 1516 } 1517 1518 /* 1519 * coresight_release_platform_data: Release references to the devices connected 1520 * to the output port of this device. 1521 */ 1522 void coresight_release_platform_data(struct coresight_device *csdev, 1523 struct coresight_platform_data *pdata) 1524 { 1525 int i; 1526 struct coresight_connection *conns = pdata->conns; 1527 1528 for (i = 0; i < pdata->nr_outport; i++) { 1529 /* If we have made the links, remove them now */ 1530 if (csdev && conns[i].child_dev) 1531 coresight_remove_links(csdev, &conns[i]); 1532 /* 1533 * Drop the refcount and clear the handle as this device 1534 * is going away 1535 */ 1536 if (conns[i].child_fwnode) { 1537 fwnode_handle_put(conns[i].child_fwnode); 1538 pdata->conns[i].child_fwnode = NULL; 1539 } 1540 } 1541 if (csdev) 1542 coresight_remove_conns_sysfs_group(csdev); 1543 } 1544 1545 struct coresight_device *coresight_register(struct coresight_desc *desc) 1546 { 1547 int ret; 1548 int link_subtype; 1549 int nr_refcnts = 1; 1550 atomic_t *refcnts = NULL; 1551 struct coresight_device *csdev; 1552 1553 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1554 if (!csdev) { 1555 ret = -ENOMEM; 1556 goto err_out; 1557 } 1558 1559 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1560 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1561 link_subtype = desc->subtype.link_subtype; 1562 1563 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1564 nr_refcnts = desc->pdata->nr_inport; 1565 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1566 nr_refcnts = desc->pdata->nr_outport; 1567 } 1568 1569 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1570 if (!refcnts) { 1571 ret = -ENOMEM; 1572 goto err_free_csdev; 1573 } 1574 1575 csdev->refcnt = refcnts; 1576 1577 csdev->pdata = desc->pdata; 1578 1579 csdev->type = desc->type; 1580 csdev->subtype = desc->subtype; 1581 csdev->ops = desc->ops; 1582 csdev->access = desc->access; 1583 csdev->orphan = false; 1584 1585 csdev->dev.type = &coresight_dev_type[desc->type]; 1586 csdev->dev.groups = desc->groups; 1587 csdev->dev.parent = desc->dev; 1588 csdev->dev.release = coresight_device_release; 1589 csdev->dev.bus = &coresight_bustype; 1590 /* 1591 * Hold the reference to our parent device. This will be 1592 * dropped only in coresight_device_release(). 1593 */ 1594 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1595 dev_set_name(&csdev->dev, "%s", desc->name); 1596 1597 ret = device_register(&csdev->dev); 1598 if (ret) { 1599 put_device(&csdev->dev); 1600 /* 1601 * All resources are free'd explicitly via 1602 * coresight_device_release(), triggered from put_device(). 1603 */ 1604 goto err_out; 1605 } 1606 1607 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1608 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1609 ret = etm_perf_add_symlink_sink(csdev); 1610 1611 if (ret) { 1612 device_unregister(&csdev->dev); 1613 /* 1614 * As with the above, all resources are free'd 1615 * explicitly via coresight_device_release() triggered 1616 * from put_device(), which is in turn called from 1617 * function device_unregister(). 1618 */ 1619 goto err_out; 1620 } 1621 } 1622 1623 mutex_lock(&coresight_mutex); 1624 1625 ret = coresight_create_conns_sysfs_group(csdev); 1626 if (!ret) 1627 ret = coresight_fixup_device_conns(csdev); 1628 if (!ret) 1629 ret = coresight_fixup_orphan_conns(csdev); 1630 if (!ret && cti_assoc_ops && cti_assoc_ops->add) 1631 cti_assoc_ops->add(csdev); 1632 1633 mutex_unlock(&coresight_mutex); 1634 if (ret) { 1635 coresight_unregister(csdev); 1636 return ERR_PTR(ret); 1637 } 1638 1639 return csdev; 1640 1641 err_free_csdev: 1642 kfree(csdev); 1643 err_out: 1644 /* Cleanup the connection information */ 1645 coresight_release_platform_data(NULL, desc->pdata); 1646 return ERR_PTR(ret); 1647 } 1648 EXPORT_SYMBOL_GPL(coresight_register); 1649 1650 void coresight_unregister(struct coresight_device *csdev) 1651 { 1652 etm_perf_del_symlink_sink(csdev); 1653 /* Remove references of that device in the topology */ 1654 if (cti_assoc_ops && cti_assoc_ops->remove) 1655 cti_assoc_ops->remove(csdev); 1656 coresight_remove_conns(csdev); 1657 coresight_clear_default_sink(csdev); 1658 coresight_release_platform_data(csdev, csdev->pdata); 1659 device_unregister(&csdev->dev); 1660 } 1661 EXPORT_SYMBOL_GPL(coresight_unregister); 1662 1663 1664 /* 1665 * coresight_search_device_idx - Search the fwnode handle of a device 1666 * in the given dev_idx list. Must be called with the coresight_mutex held. 1667 * 1668 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1669 */ 1670 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1671 struct fwnode_handle *fwnode) 1672 { 1673 int i; 1674 1675 for (i = 0; i < dict->nr_idx; i++) 1676 if (dict->fwnode_list[i] == fwnode) 1677 return i; 1678 return -ENOENT; 1679 } 1680 1681 bool coresight_loses_context_with_cpu(struct device *dev) 1682 { 1683 return fwnode_property_present(dev_fwnode(dev), 1684 "arm,coresight-loses-context-with-cpu"); 1685 } 1686 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1687 1688 /* 1689 * coresight_alloc_device_name - Get an index for a given device in the 1690 * device index list specific to a driver. An index is allocated for a 1691 * device and is tracked with the fwnode_handle to prevent allocating 1692 * duplicate indices for the same device (e.g, if we defer probing of 1693 * a device due to dependencies), in case the index is requested again. 1694 */ 1695 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1696 struct device *dev) 1697 { 1698 int idx; 1699 char *name = NULL; 1700 struct fwnode_handle **list; 1701 1702 mutex_lock(&coresight_mutex); 1703 1704 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1705 if (idx < 0) { 1706 /* Make space for the new entry */ 1707 idx = dict->nr_idx; 1708 list = krealloc(dict->fwnode_list, 1709 (idx + 1) * sizeof(*dict->fwnode_list), 1710 GFP_KERNEL); 1711 if (ZERO_OR_NULL_PTR(list)) { 1712 idx = -ENOMEM; 1713 goto done; 1714 } 1715 1716 list[idx] = dev_fwnode(dev); 1717 dict->fwnode_list = list; 1718 dict->nr_idx = idx + 1; 1719 } 1720 1721 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1722 done: 1723 mutex_unlock(&coresight_mutex); 1724 return name; 1725 } 1726 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1727 1728 struct bus_type coresight_bustype = { 1729 .name = "coresight", 1730 }; 1731 1732 static int __init coresight_init(void) 1733 { 1734 int ret; 1735 1736 ret = bus_register(&coresight_bustype); 1737 if (ret) 1738 return ret; 1739 1740 ret = etm_perf_init(); 1741 if (ret) 1742 bus_unregister(&coresight_bustype); 1743 1744 return ret; 1745 } 1746 1747 static void __exit coresight_exit(void) 1748 { 1749 etm_perf_exit(); 1750 bus_unregister(&coresight_bustype); 1751 } 1752 1753 module_init(coresight_init); 1754 module_exit(coresight_exit); 1755 1756 MODULE_LICENSE("GPL v2"); 1757 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1758 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1759 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1760