1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/slab.h> 14 #include <linux/stringhash.h> 15 #include <linux/mutex.h> 16 #include <linux/clk.h> 17 #include <linux/coresight.h> 18 #include <linux/of_platform.h> 19 #include <linux/delay.h> 20 #include <linux/pm_runtime.h> 21 22 #include "coresight-etm-perf.h" 23 #include "coresight-priv.h" 24 25 static DEFINE_MUTEX(coresight_mutex); 26 27 /** 28 * struct coresight_node - elements of a path, from source to sink 29 * @csdev: Address of an element. 30 * @link: hook to the list. 31 */ 32 struct coresight_node { 33 struct coresight_device *csdev; 34 struct list_head link; 35 }; 36 37 /* 38 * When operating Coresight drivers from the sysFS interface, only a single 39 * path can exist from a tracer (associated to a CPU) to a sink. 40 */ 41 static DEFINE_PER_CPU(struct list_head *, tracer_path); 42 43 /* 44 * As of this writing only a single STM can be found in CS topologies. Since 45 * there is no way to know if we'll ever see more and what kind of 46 * configuration they will enact, for the time being only define a single path 47 * for STM. 48 */ 49 static struct list_head *stm_path; 50 51 /* 52 * When losing synchronisation a new barrier packet needs to be inserted at the 53 * beginning of the data collected in a buffer. That way the decoder knows that 54 * it needs to look for another sync sequence. 55 */ 56 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 57 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 58 59 static const struct cti_assoc_op *cti_assoc_ops; 60 61 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 62 { 63 cti_assoc_ops = cti_op; 64 } 65 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 66 67 void coresight_remove_cti_ops(void) 68 { 69 cti_assoc_ops = NULL; 70 } 71 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 72 73 static int coresight_id_match(struct device *dev, void *data) 74 { 75 int trace_id, i_trace_id; 76 struct coresight_device *csdev, *i_csdev; 77 78 csdev = data; 79 i_csdev = to_coresight_device(dev); 80 81 /* 82 * No need to care about oneself and components that are not 83 * sources or not enabled 84 */ 85 if (i_csdev == csdev || !i_csdev->enable || 86 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 87 return 0; 88 89 /* Get the source ID for both compoment */ 90 trace_id = source_ops(csdev)->trace_id(csdev); 91 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); 92 93 /* All you need is one */ 94 if (trace_id == i_trace_id) 95 return 1; 96 97 return 0; 98 } 99 100 static int coresight_source_is_unique(struct coresight_device *csdev) 101 { 102 int trace_id = source_ops(csdev)->trace_id(csdev); 103 104 /* this shouldn't happen */ 105 if (trace_id < 0) 106 return 0; 107 108 return !bus_for_each_dev(&coresight_bustype, NULL, 109 csdev, coresight_id_match); 110 } 111 112 static int coresight_find_link_inport(struct coresight_device *csdev, 113 struct coresight_device *parent) 114 { 115 int i; 116 struct coresight_connection *conn; 117 118 for (i = 0; i < parent->pdata->nr_outport; i++) { 119 conn = &parent->pdata->conns[i]; 120 if (conn->child_dev == csdev) 121 return conn->child_port; 122 } 123 124 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 125 dev_name(&parent->dev), dev_name(&csdev->dev)); 126 127 return -ENODEV; 128 } 129 130 static int coresight_find_link_outport(struct coresight_device *csdev, 131 struct coresight_device *child) 132 { 133 int i; 134 struct coresight_connection *conn; 135 136 for (i = 0; i < csdev->pdata->nr_outport; i++) { 137 conn = &csdev->pdata->conns[i]; 138 if (conn->child_dev == child) 139 return conn->outport; 140 } 141 142 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 143 dev_name(&csdev->dev), dev_name(&child->dev)); 144 145 return -ENODEV; 146 } 147 148 static inline u32 coresight_read_claim_tags(void __iomem *base) 149 { 150 return readl_relaxed(base + CORESIGHT_CLAIMCLR); 151 } 152 153 static inline bool coresight_is_claimed_self_hosted(void __iomem *base) 154 { 155 return coresight_read_claim_tags(base) == CORESIGHT_CLAIM_SELF_HOSTED; 156 } 157 158 static inline bool coresight_is_claimed_any(void __iomem *base) 159 { 160 return coresight_read_claim_tags(base) != 0; 161 } 162 163 static inline void coresight_set_claim_tags(void __iomem *base) 164 { 165 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMSET); 166 isb(); 167 } 168 169 static inline void coresight_clear_claim_tags(void __iomem *base) 170 { 171 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMCLR); 172 isb(); 173 } 174 175 /* 176 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 177 * to prevent an external tool from touching this device. As per PSCI 178 * standards, section "Preserving the execution context" => "Debug and Trace 179 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 180 * DBGCLAIM[0] is reserved for external tools. 181 * 182 * Called with CS_UNLOCKed for the component. 183 * Returns : 0 on success 184 */ 185 int coresight_claim_device_unlocked(void __iomem *base) 186 { 187 if (coresight_is_claimed_any(base)) 188 return -EBUSY; 189 190 coresight_set_claim_tags(base); 191 if (coresight_is_claimed_self_hosted(base)) 192 return 0; 193 /* There was a race setting the tags, clean up and fail */ 194 coresight_clear_claim_tags(base); 195 return -EBUSY; 196 } 197 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 198 199 int coresight_claim_device(void __iomem *base) 200 { 201 int rc; 202 203 CS_UNLOCK(base); 204 rc = coresight_claim_device_unlocked(base); 205 CS_LOCK(base); 206 207 return rc; 208 } 209 EXPORT_SYMBOL_GPL(coresight_claim_device); 210 211 /* 212 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 213 * Called with CS_UNLOCKed for the component. 214 */ 215 void coresight_disclaim_device_unlocked(void __iomem *base) 216 { 217 218 if (coresight_is_claimed_self_hosted(base)) 219 coresight_clear_claim_tags(base); 220 else 221 /* 222 * The external agent may have not honoured our claim 223 * and has manipulated it. Or something else has seriously 224 * gone wrong in our driver. 225 */ 226 WARN_ON_ONCE(1); 227 } 228 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 229 230 void coresight_disclaim_device(void __iomem *base) 231 { 232 CS_UNLOCK(base); 233 coresight_disclaim_device_unlocked(base); 234 CS_LOCK(base); 235 } 236 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 237 238 /* enable or disable an associated CTI device of the supplied CS device */ 239 static int 240 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 241 { 242 int ect_ret = 0; 243 struct coresight_device *ect_csdev = csdev->ect_dev; 244 struct module *mod; 245 246 if (!ect_csdev) 247 return 0; 248 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 249 return 0; 250 251 mod = ect_csdev->dev.parent->driver->owner; 252 if (enable) { 253 if (try_module_get(mod)) { 254 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 255 if (ect_ret) { 256 module_put(mod); 257 } else { 258 get_device(ect_csdev->dev.parent); 259 csdev->ect_enabled = true; 260 } 261 } else 262 ect_ret = -ENODEV; 263 } else { 264 if (csdev->ect_enabled) { 265 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 266 put_device(ect_csdev->dev.parent); 267 module_put(mod); 268 csdev->ect_enabled = false; 269 } 270 } 271 272 /* output warning if ECT enable is preventing trace operation */ 273 if (ect_ret) 274 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 275 dev_name(&ect_csdev->dev), 276 enable ? "enable" : "disable"); 277 return ect_ret; 278 } 279 280 /* 281 * Set the associated ect / cti device while holding the coresight_mutex 282 * to avoid a race with coresight_enable that may try to use this value. 283 */ 284 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 285 struct coresight_device *ect_csdev) 286 { 287 mutex_lock(&coresight_mutex); 288 csdev->ect_dev = ect_csdev; 289 mutex_unlock(&coresight_mutex); 290 } 291 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 292 293 static int coresight_enable_sink(struct coresight_device *csdev, 294 u32 mode, void *data) 295 { 296 int ret; 297 298 /* 299 * We need to make sure the "new" session is compatible with the 300 * existing "mode" of operation. 301 */ 302 if (!sink_ops(csdev)->enable) 303 return -EINVAL; 304 305 ret = coresight_control_assoc_ectdev(csdev, true); 306 if (ret) 307 return ret; 308 ret = sink_ops(csdev)->enable(csdev, mode, data); 309 if (ret) { 310 coresight_control_assoc_ectdev(csdev, false); 311 return ret; 312 } 313 csdev->enable = true; 314 315 return 0; 316 } 317 318 static void coresight_disable_sink(struct coresight_device *csdev) 319 { 320 int ret; 321 322 if (!sink_ops(csdev)->disable) 323 return; 324 325 ret = sink_ops(csdev)->disable(csdev); 326 if (ret) 327 return; 328 coresight_control_assoc_ectdev(csdev, false); 329 csdev->enable = false; 330 } 331 332 static int coresight_enable_link(struct coresight_device *csdev, 333 struct coresight_device *parent, 334 struct coresight_device *child) 335 { 336 int ret = 0; 337 int link_subtype; 338 int inport, outport; 339 340 if (!parent || !child) 341 return -EINVAL; 342 343 inport = coresight_find_link_inport(csdev, parent); 344 outport = coresight_find_link_outport(csdev, child); 345 link_subtype = csdev->subtype.link_subtype; 346 347 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 348 return inport; 349 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 350 return outport; 351 352 if (link_ops(csdev)->enable) { 353 ret = coresight_control_assoc_ectdev(csdev, true); 354 if (!ret) { 355 ret = link_ops(csdev)->enable(csdev, inport, outport); 356 if (ret) 357 coresight_control_assoc_ectdev(csdev, false); 358 } 359 } 360 361 if (!ret) 362 csdev->enable = true; 363 364 return ret; 365 } 366 367 static void coresight_disable_link(struct coresight_device *csdev, 368 struct coresight_device *parent, 369 struct coresight_device *child) 370 { 371 int i, nr_conns; 372 int link_subtype; 373 int inport, outport; 374 375 if (!parent || !child) 376 return; 377 378 inport = coresight_find_link_inport(csdev, parent); 379 outport = coresight_find_link_outport(csdev, child); 380 link_subtype = csdev->subtype.link_subtype; 381 382 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 383 nr_conns = csdev->pdata->nr_inport; 384 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 385 nr_conns = csdev->pdata->nr_outport; 386 } else { 387 nr_conns = 1; 388 } 389 390 if (link_ops(csdev)->disable) { 391 link_ops(csdev)->disable(csdev, inport, outport); 392 coresight_control_assoc_ectdev(csdev, false); 393 } 394 395 for (i = 0; i < nr_conns; i++) 396 if (atomic_read(&csdev->refcnt[i]) != 0) 397 return; 398 399 csdev->enable = false; 400 } 401 402 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 403 { 404 int ret; 405 406 if (!coresight_source_is_unique(csdev)) { 407 dev_warn(&csdev->dev, "traceID %d not unique\n", 408 source_ops(csdev)->trace_id(csdev)); 409 return -EINVAL; 410 } 411 412 if (!csdev->enable) { 413 if (source_ops(csdev)->enable) { 414 ret = coresight_control_assoc_ectdev(csdev, true); 415 if (ret) 416 return ret; 417 ret = source_ops(csdev)->enable(csdev, NULL, mode); 418 if (ret) { 419 coresight_control_assoc_ectdev(csdev, false); 420 return ret; 421 }; 422 } 423 csdev->enable = true; 424 } 425 426 atomic_inc(csdev->refcnt); 427 428 return 0; 429 } 430 431 /** 432 * coresight_disable_source - Drop the reference count by 1 and disable 433 * the device if there are no users left. 434 * 435 * @csdev - The coresight device to disable 436 * 437 * Returns true if the device has been disabled. 438 */ 439 static bool coresight_disable_source(struct coresight_device *csdev) 440 { 441 if (atomic_dec_return(csdev->refcnt) == 0) { 442 if (source_ops(csdev)->disable) 443 source_ops(csdev)->disable(csdev, NULL); 444 coresight_control_assoc_ectdev(csdev, false); 445 csdev->enable = false; 446 } 447 return !csdev->enable; 448 } 449 450 /* 451 * coresight_disable_path_from : Disable components in the given path beyond 452 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 453 * disabled. 454 */ 455 static void coresight_disable_path_from(struct list_head *path, 456 struct coresight_node *nd) 457 { 458 u32 type; 459 struct coresight_device *csdev, *parent, *child; 460 461 if (!nd) 462 nd = list_first_entry(path, struct coresight_node, link); 463 464 list_for_each_entry_continue(nd, path, link) { 465 csdev = nd->csdev; 466 type = csdev->type; 467 468 /* 469 * ETF devices are tricky... They can be a link or a sink, 470 * depending on how they are configured. If an ETF has been 471 * "activated" it will be configured as a sink, otherwise 472 * go ahead with the link configuration. 473 */ 474 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 475 type = (csdev == coresight_get_sink(path)) ? 476 CORESIGHT_DEV_TYPE_SINK : 477 CORESIGHT_DEV_TYPE_LINK; 478 479 switch (type) { 480 case CORESIGHT_DEV_TYPE_SINK: 481 coresight_disable_sink(csdev); 482 break; 483 case CORESIGHT_DEV_TYPE_SOURCE: 484 /* 485 * We skip the first node in the path assuming that it 486 * is the source. So we don't expect a source device in 487 * the middle of a path. 488 */ 489 WARN_ON(1); 490 break; 491 case CORESIGHT_DEV_TYPE_LINK: 492 parent = list_prev_entry(nd, link)->csdev; 493 child = list_next_entry(nd, link)->csdev; 494 coresight_disable_link(csdev, parent, child); 495 break; 496 default: 497 break; 498 } 499 } 500 } 501 502 void coresight_disable_path(struct list_head *path) 503 { 504 coresight_disable_path_from(path, NULL); 505 } 506 EXPORT_SYMBOL_GPL(coresight_disable_path); 507 508 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 509 { 510 511 int ret = 0; 512 u32 type; 513 struct coresight_node *nd; 514 struct coresight_device *csdev, *parent, *child; 515 516 list_for_each_entry_reverse(nd, path, link) { 517 csdev = nd->csdev; 518 type = csdev->type; 519 520 /* 521 * ETF devices are tricky... They can be a link or a sink, 522 * depending on how they are configured. If an ETF has been 523 * "activated" it will be configured as a sink, otherwise 524 * go ahead with the link configuration. 525 */ 526 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 527 type = (csdev == coresight_get_sink(path)) ? 528 CORESIGHT_DEV_TYPE_SINK : 529 CORESIGHT_DEV_TYPE_LINK; 530 531 switch (type) { 532 case CORESIGHT_DEV_TYPE_SINK: 533 ret = coresight_enable_sink(csdev, mode, sink_data); 534 /* 535 * Sink is the first component turned on. If we 536 * failed to enable the sink, there are no components 537 * that need disabling. Disabling the path here 538 * would mean we could disrupt an existing session. 539 */ 540 if (ret) 541 goto out; 542 break; 543 case CORESIGHT_DEV_TYPE_SOURCE: 544 /* sources are enabled from either sysFS or Perf */ 545 break; 546 case CORESIGHT_DEV_TYPE_LINK: 547 parent = list_prev_entry(nd, link)->csdev; 548 child = list_next_entry(nd, link)->csdev; 549 ret = coresight_enable_link(csdev, parent, child); 550 if (ret) 551 goto err; 552 break; 553 default: 554 goto err; 555 } 556 } 557 558 out: 559 return ret; 560 err: 561 coresight_disable_path_from(path, nd); 562 goto out; 563 } 564 565 struct coresight_device *coresight_get_sink(struct list_head *path) 566 { 567 struct coresight_device *csdev; 568 569 if (!path) 570 return NULL; 571 572 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 573 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 574 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 575 return NULL; 576 577 return csdev; 578 } 579 580 static struct coresight_device * 581 coresight_find_enabled_sink(struct coresight_device *csdev) 582 { 583 int i; 584 struct coresight_device *sink; 585 586 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 587 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 588 csdev->activated) 589 return csdev; 590 591 /* 592 * Recursively explore each port found on this element. 593 */ 594 for (i = 0; i < csdev->pdata->nr_outport; i++) { 595 struct coresight_device *child_dev; 596 597 child_dev = csdev->pdata->conns[i].child_dev; 598 if (child_dev) 599 sink = coresight_find_enabled_sink(child_dev); 600 if (sink) 601 return sink; 602 } 603 604 return NULL; 605 } 606 607 /** 608 * coresight_get_enabled_sink - returns the first enabled sink using 609 * connection based search starting from the source reference 610 * 611 * @source: Coresight source device reference 612 */ 613 struct coresight_device * 614 coresight_get_enabled_sink(struct coresight_device *source) 615 { 616 if (!source) 617 return NULL; 618 619 return coresight_find_enabled_sink(source); 620 } 621 622 static int coresight_sink_by_id(struct device *dev, const void *data) 623 { 624 struct coresight_device *csdev = to_coresight_device(dev); 625 unsigned long hash; 626 627 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 628 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 629 630 if (!csdev->ea) 631 return 0; 632 /* 633 * See function etm_perf_add_symlink_sink() to know where 634 * this comes from. 635 */ 636 hash = (unsigned long)csdev->ea->var; 637 638 if ((u32)hash == *(u32 *)data) 639 return 1; 640 } 641 642 return 0; 643 } 644 645 /** 646 * coresight_get_sink_by_id - returns the sink that matches the id 647 * @id: Id of the sink to match 648 * 649 * The name of a sink is unique, whether it is found on the AMBA bus or 650 * otherwise. As such the hash of that name can easily be used to identify 651 * a sink. 652 */ 653 struct coresight_device *coresight_get_sink_by_id(u32 id) 654 { 655 struct device *dev = NULL; 656 657 dev = bus_find_device(&coresight_bustype, NULL, &id, 658 coresight_sink_by_id); 659 660 return dev ? to_coresight_device(dev) : NULL; 661 } 662 663 /** 664 * coresight_get_ref- Helper function to increase reference count to module 665 * and device. 666 * Return true in successful case and power up the device. 667 * Return false when failed to get reference of module. 668 */ 669 static inline bool coresight_get_ref(struct coresight_device *csdev) 670 { 671 struct device *dev = csdev->dev.parent; 672 673 /* Make sure the driver can't be removed */ 674 if (!try_module_get(dev->driver->owner)) 675 return false; 676 /* Make sure the device can't go away */ 677 get_device(dev); 678 pm_runtime_get_sync(dev); 679 return true; 680 } 681 682 /** 683 * coresight_put_ref- Helper function to decrease reference count to module 684 * and device. Power off the device. 685 */ 686 static inline void coresight_put_ref(struct coresight_device *csdev) 687 { 688 struct device *dev = csdev->dev.parent; 689 690 pm_runtime_put(dev); 691 put_device(dev); 692 module_put(dev->driver->owner); 693 } 694 695 /* 696 * coresight_grab_device - Power up this device and any of the helper 697 * devices connected to it for trace operation. Since the helper devices 698 * don't appear on the trace path, they should be handled along with the 699 * the master device. 700 */ 701 static int coresight_grab_device(struct coresight_device *csdev) 702 { 703 int i; 704 705 for (i = 0; i < csdev->pdata->nr_outport; i++) { 706 struct coresight_device *child; 707 708 child = csdev->pdata->conns[i].child_dev; 709 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 710 if (!coresight_get_ref(child)) 711 goto err; 712 } 713 if (coresight_get_ref(csdev)) 714 return 0; 715 err: 716 for (i--; i >= 0; i--) { 717 struct coresight_device *child; 718 719 child = csdev->pdata->conns[i].child_dev; 720 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 721 coresight_put_ref(child); 722 } 723 return -ENODEV; 724 } 725 726 /* 727 * coresight_drop_device - Release this device and any of the helper 728 * devices connected to it. 729 */ 730 static void coresight_drop_device(struct coresight_device *csdev) 731 { 732 int i; 733 734 coresight_put_ref(csdev); 735 for (i = 0; i < csdev->pdata->nr_outport; i++) { 736 struct coresight_device *child; 737 738 child = csdev->pdata->conns[i].child_dev; 739 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 740 coresight_put_ref(child); 741 } 742 } 743 744 /** 745 * _coresight_build_path - recursively build a path from a @csdev to a sink. 746 * @csdev: The device to start from. 747 * @path: The list to add devices to. 748 * 749 * The tree of Coresight device is traversed until an activated sink is 750 * found. From there the sink is added to the list along with all the 751 * devices that led to that point - the end result is a list from source 752 * to sink. In that list the source is the first device and the sink the 753 * last one. 754 */ 755 static int _coresight_build_path(struct coresight_device *csdev, 756 struct coresight_device *sink, 757 struct list_head *path) 758 { 759 int i, ret; 760 bool found = false; 761 struct coresight_node *node; 762 763 /* An activated sink has been found. Enqueue the element */ 764 if (csdev == sink) 765 goto out; 766 767 /* Not a sink - recursively explore each port found on this element */ 768 for (i = 0; i < csdev->pdata->nr_outport; i++) { 769 struct coresight_device *child_dev; 770 771 child_dev = csdev->pdata->conns[i].child_dev; 772 if (child_dev && 773 _coresight_build_path(child_dev, sink, path) == 0) { 774 found = true; 775 break; 776 } 777 } 778 779 if (!found) 780 return -ENODEV; 781 782 out: 783 /* 784 * A path from this element to a sink has been found. The elements 785 * leading to the sink are already enqueued, all that is left to do 786 * is tell the PM runtime core we need this element and add a node 787 * for it. 788 */ 789 ret = coresight_grab_device(csdev); 790 if (ret) 791 return ret; 792 793 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 794 if (!node) 795 return -ENOMEM; 796 797 node->csdev = csdev; 798 list_add(&node->link, path); 799 800 return 0; 801 } 802 803 struct list_head *coresight_build_path(struct coresight_device *source, 804 struct coresight_device *sink) 805 { 806 struct list_head *path; 807 int rc; 808 809 if (!sink) 810 return ERR_PTR(-EINVAL); 811 812 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 813 if (!path) 814 return ERR_PTR(-ENOMEM); 815 816 INIT_LIST_HEAD(path); 817 818 rc = _coresight_build_path(source, sink, path); 819 if (rc) { 820 kfree(path); 821 return ERR_PTR(rc); 822 } 823 824 return path; 825 } 826 827 /** 828 * coresight_release_path - release a previously built path. 829 * @path: the path to release. 830 * 831 * Go through all the elements of a path and 1) removed it from the list and 832 * 2) free the memory allocated for each node. 833 */ 834 void coresight_release_path(struct list_head *path) 835 { 836 struct coresight_device *csdev; 837 struct coresight_node *nd, *next; 838 839 list_for_each_entry_safe(nd, next, path, link) { 840 csdev = nd->csdev; 841 842 coresight_drop_device(csdev); 843 list_del(&nd->link); 844 kfree(nd); 845 } 846 847 kfree(path); 848 path = NULL; 849 } 850 851 /* return true if the device is a suitable type for a default sink */ 852 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 853 { 854 /* sink & correct subtype */ 855 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 856 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 857 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 858 return true; 859 return false; 860 } 861 862 /** 863 * coresight_select_best_sink - return the best sink for use as default from 864 * the two provided. 865 * 866 * @sink: current best sink. 867 * @depth: search depth where current sink was found. 868 * @new_sink: new sink for comparison with current sink. 869 * @new_depth: search depth where new sink was found. 870 * 871 * Sinks prioritised according to coresight_dev_subtype_sink, with only 872 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 873 * 874 * Where two sinks of equal priority are found, the sink closest to the 875 * source is used (smallest search depth). 876 * 877 * return @new_sink & update @depth if better than @sink, else return @sink. 878 */ 879 static struct coresight_device * 880 coresight_select_best_sink(struct coresight_device *sink, int *depth, 881 struct coresight_device *new_sink, int new_depth) 882 { 883 bool update = false; 884 885 if (!sink) { 886 /* first found at this level */ 887 update = true; 888 } else if (new_sink->subtype.sink_subtype > 889 sink->subtype.sink_subtype) { 890 /* found better sink */ 891 update = true; 892 } else if ((new_sink->subtype.sink_subtype == 893 sink->subtype.sink_subtype) && 894 (*depth > new_depth)) { 895 /* found same but closer sink */ 896 update = true; 897 } 898 899 if (update) 900 *depth = new_depth; 901 return update ? new_sink : sink; 902 } 903 904 /** 905 * coresight_find_sink - recursive function to walk trace connections from 906 * source to find a suitable default sink. 907 * 908 * @csdev: source / current device to check. 909 * @depth: [in] search depth of calling dev, [out] depth of found sink. 910 * 911 * This will walk the connection path from a source (ETM) till a suitable 912 * sink is encountered and return that sink to the original caller. 913 * 914 * If current device is a plain sink return that & depth, otherwise recursively 915 * call child connections looking for a sink. Select best possible using 916 * coresight_select_best_sink. 917 * 918 * return best sink found, or NULL if not found at this node or child nodes. 919 */ 920 static struct coresight_device * 921 coresight_find_sink(struct coresight_device *csdev, int *depth) 922 { 923 int i, curr_depth = *depth + 1, found_depth = 0; 924 struct coresight_device *found_sink = NULL; 925 926 if (coresight_is_def_sink_type(csdev)) { 927 found_depth = curr_depth; 928 found_sink = csdev; 929 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 930 goto return_def_sink; 931 /* look past LINKSINK for something better */ 932 } 933 934 /* 935 * Not a sink we want - or possible child sink may be better. 936 * recursively explore each port found on this element. 937 */ 938 for (i = 0; i < csdev->pdata->nr_outport; i++) { 939 struct coresight_device *child_dev, *sink = NULL; 940 int child_depth = curr_depth; 941 942 child_dev = csdev->pdata->conns[i].child_dev; 943 if (child_dev) 944 sink = coresight_find_sink(child_dev, &child_depth); 945 946 if (sink) 947 found_sink = coresight_select_best_sink(found_sink, 948 &found_depth, 949 sink, 950 child_depth); 951 } 952 953 return_def_sink: 954 /* return found sink and depth */ 955 if (found_sink) 956 *depth = found_depth; 957 return found_sink; 958 } 959 960 /** 961 * coresight_find_default_sink: Find a sink suitable for use as a 962 * default sink. 963 * 964 * @csdev: starting source to find a connected sink. 965 * 966 * Walks connections graph looking for a suitable sink to enable for the 967 * supplied source. Uses CoreSight device subtypes and distance from source 968 * to select the best sink. 969 * 970 * If a sink is found, then the default sink for this device is set and 971 * will be automatically used in future. 972 * 973 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 974 * sink. 975 */ 976 struct coresight_device * 977 coresight_find_default_sink(struct coresight_device *csdev) 978 { 979 int depth = 0; 980 981 /* look for a default sink if we have not found for this device */ 982 if (!csdev->def_sink) 983 csdev->def_sink = coresight_find_sink(csdev, &depth); 984 return csdev->def_sink; 985 } 986 987 static int coresight_remove_sink_ref(struct device *dev, void *data) 988 { 989 struct coresight_device *sink = data; 990 struct coresight_device *source = to_coresight_device(dev); 991 992 if (source->def_sink == sink) 993 source->def_sink = NULL; 994 return 0; 995 } 996 997 /** 998 * coresight_clear_default_sink: Remove all default sink references to the 999 * supplied sink. 1000 * 1001 * If supplied device is a sink, then check all the bus devices and clear 1002 * out all the references to this sink from the coresight_device def_sink 1003 * parameter. 1004 * 1005 * @csdev: coresight sink - remove references to this from all sources. 1006 */ 1007 static void coresight_clear_default_sink(struct coresight_device *csdev) 1008 { 1009 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1010 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1011 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1012 coresight_remove_sink_ref); 1013 } 1014 } 1015 1016 /** coresight_validate_source - make sure a source has the right credentials 1017 * @csdev: the device structure for a source. 1018 * @function: the function this was called from. 1019 * 1020 * Assumes the coresight_mutex is held. 1021 */ 1022 static int coresight_validate_source(struct coresight_device *csdev, 1023 const char *function) 1024 { 1025 u32 type, subtype; 1026 1027 type = csdev->type; 1028 subtype = csdev->subtype.source_subtype; 1029 1030 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1031 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1032 return -EINVAL; 1033 } 1034 1035 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1036 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { 1037 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1038 return -EINVAL; 1039 } 1040 1041 return 0; 1042 } 1043 1044 int coresight_enable(struct coresight_device *csdev) 1045 { 1046 int cpu, ret = 0; 1047 struct coresight_device *sink; 1048 struct list_head *path; 1049 enum coresight_dev_subtype_source subtype; 1050 1051 subtype = csdev->subtype.source_subtype; 1052 1053 mutex_lock(&coresight_mutex); 1054 1055 ret = coresight_validate_source(csdev, __func__); 1056 if (ret) 1057 goto out; 1058 1059 if (csdev->enable) { 1060 /* 1061 * There could be multiple applications driving the software 1062 * source. So keep the refcount for each such user when the 1063 * source is already enabled. 1064 */ 1065 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1066 atomic_inc(csdev->refcnt); 1067 goto out; 1068 } 1069 1070 sink = coresight_get_enabled_sink(csdev); 1071 if (!sink) { 1072 ret = -EINVAL; 1073 goto out; 1074 } 1075 1076 path = coresight_build_path(csdev, sink); 1077 if (IS_ERR(path)) { 1078 pr_err("building path(s) failed\n"); 1079 ret = PTR_ERR(path); 1080 goto out; 1081 } 1082 1083 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1084 if (ret) 1085 goto err_path; 1086 1087 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1088 if (ret) 1089 goto err_source; 1090 1091 switch (subtype) { 1092 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1093 /* 1094 * When working from sysFS it is important to keep track 1095 * of the paths that were created so that they can be 1096 * undone in 'coresight_disable()'. Since there can only 1097 * be a single session per tracer (when working from sysFS) 1098 * a per-cpu variable will do just fine. 1099 */ 1100 cpu = source_ops(csdev)->cpu_id(csdev); 1101 per_cpu(tracer_path, cpu) = path; 1102 break; 1103 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1104 stm_path = path; 1105 break; 1106 default: 1107 /* We can't be here */ 1108 break; 1109 } 1110 1111 out: 1112 mutex_unlock(&coresight_mutex); 1113 return ret; 1114 1115 err_source: 1116 coresight_disable_path(path); 1117 1118 err_path: 1119 coresight_release_path(path); 1120 goto out; 1121 } 1122 EXPORT_SYMBOL_GPL(coresight_enable); 1123 1124 void coresight_disable(struct coresight_device *csdev) 1125 { 1126 int cpu, ret; 1127 struct list_head *path = NULL; 1128 1129 mutex_lock(&coresight_mutex); 1130 1131 ret = coresight_validate_source(csdev, __func__); 1132 if (ret) 1133 goto out; 1134 1135 if (!csdev->enable || !coresight_disable_source(csdev)) 1136 goto out; 1137 1138 switch (csdev->subtype.source_subtype) { 1139 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1140 cpu = source_ops(csdev)->cpu_id(csdev); 1141 path = per_cpu(tracer_path, cpu); 1142 per_cpu(tracer_path, cpu) = NULL; 1143 break; 1144 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1145 path = stm_path; 1146 stm_path = NULL; 1147 break; 1148 default: 1149 /* We can't be here */ 1150 break; 1151 } 1152 1153 coresight_disable_path(path); 1154 coresight_release_path(path); 1155 1156 out: 1157 mutex_unlock(&coresight_mutex); 1158 } 1159 EXPORT_SYMBOL_GPL(coresight_disable); 1160 1161 static ssize_t enable_sink_show(struct device *dev, 1162 struct device_attribute *attr, char *buf) 1163 { 1164 struct coresight_device *csdev = to_coresight_device(dev); 1165 1166 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1167 } 1168 1169 static ssize_t enable_sink_store(struct device *dev, 1170 struct device_attribute *attr, 1171 const char *buf, size_t size) 1172 { 1173 int ret; 1174 unsigned long val; 1175 struct coresight_device *csdev = to_coresight_device(dev); 1176 1177 ret = kstrtoul(buf, 10, &val); 1178 if (ret) 1179 return ret; 1180 1181 if (val) 1182 csdev->activated = true; 1183 else 1184 csdev->activated = false; 1185 1186 return size; 1187 1188 } 1189 static DEVICE_ATTR_RW(enable_sink); 1190 1191 static ssize_t enable_source_show(struct device *dev, 1192 struct device_attribute *attr, char *buf) 1193 { 1194 struct coresight_device *csdev = to_coresight_device(dev); 1195 1196 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1197 } 1198 1199 static ssize_t enable_source_store(struct device *dev, 1200 struct device_attribute *attr, 1201 const char *buf, size_t size) 1202 { 1203 int ret = 0; 1204 unsigned long val; 1205 struct coresight_device *csdev = to_coresight_device(dev); 1206 1207 ret = kstrtoul(buf, 10, &val); 1208 if (ret) 1209 return ret; 1210 1211 if (val) { 1212 ret = coresight_enable(csdev); 1213 if (ret) 1214 return ret; 1215 } else { 1216 coresight_disable(csdev); 1217 } 1218 1219 return size; 1220 } 1221 static DEVICE_ATTR_RW(enable_source); 1222 1223 static struct attribute *coresight_sink_attrs[] = { 1224 &dev_attr_enable_sink.attr, 1225 NULL, 1226 }; 1227 ATTRIBUTE_GROUPS(coresight_sink); 1228 1229 static struct attribute *coresight_source_attrs[] = { 1230 &dev_attr_enable_source.attr, 1231 NULL, 1232 }; 1233 ATTRIBUTE_GROUPS(coresight_source); 1234 1235 static struct device_type coresight_dev_type[] = { 1236 { 1237 .name = "none", 1238 }, 1239 { 1240 .name = "sink", 1241 .groups = coresight_sink_groups, 1242 }, 1243 { 1244 .name = "link", 1245 }, 1246 { 1247 .name = "linksink", 1248 .groups = coresight_sink_groups, 1249 }, 1250 { 1251 .name = "source", 1252 .groups = coresight_source_groups, 1253 }, 1254 { 1255 .name = "helper", 1256 }, 1257 { 1258 .name = "ect", 1259 }, 1260 }; 1261 1262 static void coresight_device_release(struct device *dev) 1263 { 1264 struct coresight_device *csdev = to_coresight_device(dev); 1265 1266 fwnode_handle_put(csdev->dev.fwnode); 1267 kfree(csdev->refcnt); 1268 kfree(csdev); 1269 } 1270 1271 static int coresight_orphan_match(struct device *dev, void *data) 1272 { 1273 int i, ret = 0; 1274 bool still_orphan = false; 1275 struct coresight_device *csdev, *i_csdev; 1276 struct coresight_connection *conn; 1277 1278 csdev = data; 1279 i_csdev = to_coresight_device(dev); 1280 1281 /* No need to check oneself */ 1282 if (csdev == i_csdev) 1283 return 0; 1284 1285 /* Move on to another component if no connection is orphan */ 1286 if (!i_csdev->orphan) 1287 return 0; 1288 /* 1289 * Circle throuch all the connection of that component. If we find 1290 * an orphan connection whose name matches @csdev, link it. 1291 */ 1292 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1293 conn = &i_csdev->pdata->conns[i]; 1294 1295 /* Skip the port if FW doesn't describe it */ 1296 if (!conn->child_fwnode) 1297 continue; 1298 /* We have found at least one orphan connection */ 1299 if (conn->child_dev == NULL) { 1300 /* Does it match this newly added device? */ 1301 if (conn->child_fwnode == csdev->dev.fwnode) { 1302 ret = coresight_make_links(i_csdev, 1303 conn, csdev); 1304 if (ret) 1305 return ret; 1306 } else { 1307 /* This component still has an orphan */ 1308 still_orphan = true; 1309 } 1310 } 1311 } 1312 1313 i_csdev->orphan = still_orphan; 1314 1315 /* 1316 * Returning '0' in case we didn't encounter any error, 1317 * ensures that all known component on the bus will be checked. 1318 */ 1319 return 0; 1320 } 1321 1322 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1323 { 1324 return bus_for_each_dev(&coresight_bustype, NULL, 1325 csdev, coresight_orphan_match); 1326 } 1327 1328 1329 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1330 { 1331 int i, ret = 0; 1332 1333 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1334 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1335 1336 if (!conn->child_fwnode) 1337 continue; 1338 conn->child_dev = 1339 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1340 if (conn->child_dev) { 1341 ret = coresight_make_links(csdev, conn, 1342 conn->child_dev); 1343 if (ret) 1344 break; 1345 } else { 1346 csdev->orphan = true; 1347 } 1348 } 1349 1350 return 0; 1351 } 1352 1353 static int coresight_remove_match(struct device *dev, void *data) 1354 { 1355 int i; 1356 struct coresight_device *csdev, *iterator; 1357 struct coresight_connection *conn; 1358 1359 csdev = data; 1360 iterator = to_coresight_device(dev); 1361 1362 /* No need to check oneself */ 1363 if (csdev == iterator) 1364 return 0; 1365 1366 /* 1367 * Circle throuch all the connection of that component. If we find 1368 * a connection whose name matches @csdev, remove it. 1369 */ 1370 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1371 conn = &iterator->pdata->conns[i]; 1372 1373 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1374 continue; 1375 1376 if (csdev->dev.fwnode == conn->child_fwnode) { 1377 iterator->orphan = true; 1378 coresight_remove_links(iterator, conn); 1379 /* 1380 * Drop the reference to the handle for the remote 1381 * device acquired in parsing the connections from 1382 * platform data. 1383 */ 1384 fwnode_handle_put(conn->child_fwnode); 1385 /* No need to continue */ 1386 break; 1387 } 1388 } 1389 1390 /* 1391 * Returning '0' ensures that all known component on the 1392 * bus will be checked. 1393 */ 1394 return 0; 1395 } 1396 1397 /* 1398 * coresight_remove_conns - Remove references to this given devices 1399 * from the connections of other devices. 1400 */ 1401 static void coresight_remove_conns(struct coresight_device *csdev) 1402 { 1403 /* 1404 * Another device will point to this device only if there is 1405 * an output port connected to this one. i.e, if the device 1406 * doesn't have at least one input port, there is no point 1407 * in searching all the devices. 1408 */ 1409 if (csdev->pdata->nr_inport) 1410 bus_for_each_dev(&coresight_bustype, NULL, 1411 csdev, coresight_remove_match); 1412 } 1413 1414 /** 1415 * coresight_timeout - loop until a bit has changed to a specific state. 1416 * @addr: base address of the area of interest. 1417 * @offset: address of a register, starting from @addr. 1418 * @position: the position of the bit of interest. 1419 * @value: the value the bit should have. 1420 * 1421 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1422 * TIMEOUT_US has elapsed, which ever happens first. 1423 */ 1424 1425 int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) 1426 { 1427 int i; 1428 u32 val; 1429 1430 for (i = TIMEOUT_US; i > 0; i--) { 1431 val = __raw_readl(addr + offset); 1432 /* waiting on the bit to go from 0 to 1 */ 1433 if (value) { 1434 if (val & BIT(position)) 1435 return 0; 1436 /* waiting on the bit to go from 1 to 0 */ 1437 } else { 1438 if (!(val & BIT(position))) 1439 return 0; 1440 } 1441 1442 /* 1443 * Delay is arbitrary - the specification doesn't say how long 1444 * we are expected to wait. Extra check required to make sure 1445 * we don't wait needlessly on the last iteration. 1446 */ 1447 if (i - 1) 1448 udelay(1); 1449 } 1450 1451 return -EAGAIN; 1452 } 1453 EXPORT_SYMBOL_GPL(coresight_timeout); 1454 1455 /* 1456 * coresight_release_platform_data: Release references to the devices connected 1457 * to the output port of this device. 1458 */ 1459 void coresight_release_platform_data(struct coresight_device *csdev, 1460 struct coresight_platform_data *pdata) 1461 { 1462 int i; 1463 struct coresight_connection *conns = pdata->conns; 1464 1465 for (i = 0; i < pdata->nr_outport; i++) { 1466 /* If we have made the links, remove them now */ 1467 if (csdev && conns[i].child_dev) 1468 coresight_remove_links(csdev, &conns[i]); 1469 /* 1470 * Drop the refcount and clear the handle as this device 1471 * is going away 1472 */ 1473 if (conns[i].child_fwnode) { 1474 fwnode_handle_put(conns[i].child_fwnode); 1475 pdata->conns[i].child_fwnode = NULL; 1476 } 1477 } 1478 if (csdev) 1479 coresight_remove_conns_sysfs_group(csdev); 1480 } 1481 1482 struct coresight_device *coresight_register(struct coresight_desc *desc) 1483 { 1484 int ret; 1485 int link_subtype; 1486 int nr_refcnts = 1; 1487 atomic_t *refcnts = NULL; 1488 struct coresight_device *csdev; 1489 1490 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1491 if (!csdev) { 1492 ret = -ENOMEM; 1493 goto err_out; 1494 } 1495 1496 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1497 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1498 link_subtype = desc->subtype.link_subtype; 1499 1500 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1501 nr_refcnts = desc->pdata->nr_inport; 1502 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1503 nr_refcnts = desc->pdata->nr_outport; 1504 } 1505 1506 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1507 if (!refcnts) { 1508 ret = -ENOMEM; 1509 goto err_free_csdev; 1510 } 1511 1512 csdev->refcnt = refcnts; 1513 1514 csdev->pdata = desc->pdata; 1515 1516 csdev->type = desc->type; 1517 csdev->subtype = desc->subtype; 1518 csdev->ops = desc->ops; 1519 csdev->orphan = false; 1520 1521 csdev->dev.type = &coresight_dev_type[desc->type]; 1522 csdev->dev.groups = desc->groups; 1523 csdev->dev.parent = desc->dev; 1524 csdev->dev.release = coresight_device_release; 1525 csdev->dev.bus = &coresight_bustype; 1526 /* 1527 * Hold the reference to our parent device. This will be 1528 * dropped only in coresight_device_release(). 1529 */ 1530 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1531 dev_set_name(&csdev->dev, "%s", desc->name); 1532 1533 ret = device_register(&csdev->dev); 1534 if (ret) { 1535 put_device(&csdev->dev); 1536 /* 1537 * All resources are free'd explicitly via 1538 * coresight_device_release(), triggered from put_device(). 1539 */ 1540 goto err_out; 1541 } 1542 1543 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1544 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1545 ret = etm_perf_add_symlink_sink(csdev); 1546 1547 if (ret) { 1548 device_unregister(&csdev->dev); 1549 /* 1550 * As with the above, all resources are free'd 1551 * explicitly via coresight_device_release() triggered 1552 * from put_device(), which is in turn called from 1553 * function device_unregister(). 1554 */ 1555 goto err_out; 1556 } 1557 } 1558 1559 mutex_lock(&coresight_mutex); 1560 1561 ret = coresight_create_conns_sysfs_group(csdev); 1562 if (!ret) 1563 ret = coresight_fixup_device_conns(csdev); 1564 if (!ret) 1565 ret = coresight_fixup_orphan_conns(csdev); 1566 if (!ret && cti_assoc_ops && cti_assoc_ops->add) 1567 cti_assoc_ops->add(csdev); 1568 1569 mutex_unlock(&coresight_mutex); 1570 if (ret) { 1571 coresight_unregister(csdev); 1572 return ERR_PTR(ret); 1573 } 1574 1575 return csdev; 1576 1577 err_free_csdev: 1578 kfree(csdev); 1579 err_out: 1580 /* Cleanup the connection information */ 1581 coresight_release_platform_data(NULL, desc->pdata); 1582 return ERR_PTR(ret); 1583 } 1584 EXPORT_SYMBOL_GPL(coresight_register); 1585 1586 void coresight_unregister(struct coresight_device *csdev) 1587 { 1588 etm_perf_del_symlink_sink(csdev); 1589 /* Remove references of that device in the topology */ 1590 if (cti_assoc_ops && cti_assoc_ops->remove) 1591 cti_assoc_ops->remove(csdev); 1592 coresight_remove_conns(csdev); 1593 coresight_clear_default_sink(csdev); 1594 coresight_release_platform_data(csdev, csdev->pdata); 1595 device_unregister(&csdev->dev); 1596 } 1597 EXPORT_SYMBOL_GPL(coresight_unregister); 1598 1599 1600 /* 1601 * coresight_search_device_idx - Search the fwnode handle of a device 1602 * in the given dev_idx list. Must be called with the coresight_mutex held. 1603 * 1604 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1605 */ 1606 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1607 struct fwnode_handle *fwnode) 1608 { 1609 int i; 1610 1611 for (i = 0; i < dict->nr_idx; i++) 1612 if (dict->fwnode_list[i] == fwnode) 1613 return i; 1614 return -ENOENT; 1615 } 1616 1617 bool coresight_loses_context_with_cpu(struct device *dev) 1618 { 1619 return fwnode_property_present(dev_fwnode(dev), 1620 "arm,coresight-loses-context-with-cpu"); 1621 } 1622 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1623 1624 /* 1625 * coresight_alloc_device_name - Get an index for a given device in the 1626 * device index list specific to a driver. An index is allocated for a 1627 * device and is tracked with the fwnode_handle to prevent allocating 1628 * duplicate indices for the same device (e.g, if we defer probing of 1629 * a device due to dependencies), in case the index is requested again. 1630 */ 1631 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1632 struct device *dev) 1633 { 1634 int idx; 1635 char *name = NULL; 1636 struct fwnode_handle **list; 1637 1638 mutex_lock(&coresight_mutex); 1639 1640 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1641 if (idx < 0) { 1642 /* Make space for the new entry */ 1643 idx = dict->nr_idx; 1644 list = krealloc(dict->fwnode_list, 1645 (idx + 1) * sizeof(*dict->fwnode_list), 1646 GFP_KERNEL); 1647 if (ZERO_OR_NULL_PTR(list)) { 1648 idx = -ENOMEM; 1649 goto done; 1650 } 1651 1652 list[idx] = dev_fwnode(dev); 1653 dict->fwnode_list = list; 1654 dict->nr_idx = idx + 1; 1655 } 1656 1657 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1658 done: 1659 mutex_unlock(&coresight_mutex); 1660 return name; 1661 } 1662 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1663 1664 struct bus_type coresight_bustype = { 1665 .name = "coresight", 1666 }; 1667 1668 static int __init coresight_init(void) 1669 { 1670 int ret; 1671 1672 ret = bus_register(&coresight_bustype); 1673 if (ret) 1674 return ret; 1675 1676 ret = etm_perf_init(); 1677 if (ret) 1678 bus_unregister(&coresight_bustype); 1679 1680 return ret; 1681 } 1682 1683 static void __exit coresight_exit(void) 1684 { 1685 etm_perf_exit(); 1686 bus_unregister(&coresight_bustype); 1687 } 1688 1689 module_init(coresight_init); 1690 module_exit(coresight_exit); 1691 1692 MODULE_LICENSE("GPL v2"); 1693 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1694 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1695 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1696