1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Coresight configuration 4# 5menuconfig CORESIGHT 6 bool "CoreSight Tracing Support" 7 depends on ARM || ARM64 8 depends on OF || ACPI 9 select ARM_AMBA 10 select PERF_EVENTS 11 help 12 This framework provides a kernel interface for the CoreSight debug 13 and trace drivers to register themselves with. It's intended to build 14 a topological view of the CoreSight components based on a DT 15 specification and configure the right series of components when a 16 trace source gets enabled. 17 18if CORESIGHT 19config CORESIGHT_LINKS_AND_SINKS 20 tristate "CoreSight Link and Sink drivers" 21 help 22 This enables support for CoreSight link and sink drivers that are 23 responsible for transporting and collecting the trace data 24 respectively. Link and sinks are dynamically aggregated with a trace 25 entity at run time to form a complete trace path. 26 27 To compile these drivers as modules, choose M here: the 28 modules will be called coresight-funnel and coresight-replicator. 29 30config CORESIGHT_LINK_AND_SINK_TMC 31 tristate "Coresight generic TMC driver" 32 33 depends on CORESIGHT_LINKS_AND_SINKS 34 help 35 This enables support for the Trace Memory Controller driver. 36 Depending on its configuration the device can act as a link (embedded 37 trace router - ETR) or sink (embedded trace FIFO). The driver 38 complies with the generic implementation of the component without 39 special enhancement or added features. 40 41 To compile this driver as a module, choose M here: the 42 module will be called coresight-tmc. 43 44config CORESIGHT_CATU 45 tristate "Coresight Address Translation Unit (CATU) driver" 46 depends on CORESIGHT_LINK_AND_SINK_TMC 47 help 48 Enable support for the Coresight Address Translation Unit (CATU). 49 CATU supports a scatter gather table of 4K pages, with forward/backward 50 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace 51 buffer by translating the addresses used by ETR to the physical address 52 by looking up the provided table. CATU can also be used in pass-through 53 mode where the address is not translated. 54 55 To compile this driver as a module, choose M here: the 56 module will be called coresight-catu. 57 58config CORESIGHT_SINK_TPIU 59 tristate "Coresight generic TPIU driver" 60 depends on CORESIGHT_LINKS_AND_SINKS 61 help 62 This enables support for the Trace Port Interface Unit driver, 63 responsible for bridging the gap between the on-chip coresight 64 components and a trace for bridging the gap between the on-chip 65 coresight components and a trace port collection engine, typically 66 connected to an external host for use case capturing more traces than 67 the on-board coresight memory can handle. 68 69 To compile this driver as a module, choose M here: the 70 module will be called coresight-tpiu. 71 72config CORESIGHT_SINK_ETBV10 73 tristate "Coresight ETBv1.0 driver" 74 depends on CORESIGHT_LINKS_AND_SINKS 75 help 76 This enables support for the Embedded Trace Buffer version 1.0 driver 77 that complies with the generic implementation of the component without 78 special enhancement or added features. 79 80 To compile this driver as a module, choose M here: the 81 module will be called coresight-etb10. 82 83config CORESIGHT_SOURCE_ETM3X 84 tristate "CoreSight Embedded Trace Macrocell 3.x driver" 85 depends on !ARM64 86 select CORESIGHT_LINKS_AND_SINKS 87 help 88 This driver provides support for processor ETM3.x and PTM1.x modules, 89 which allows tracing the instructions that a processor is executing 90 This is primarily useful for instruction level tracing. Depending 91 the ETM version data tracing may also be available. 92 93 To compile this driver as a module, choose M here: the 94 module will be called coresight-etm3x. 95 96config CORESIGHT_SOURCE_ETM4X 97 tristate "CoreSight Embedded Trace Macrocell 4.x driver" 98 depends on ARM64 99 select CORESIGHT_LINKS_AND_SINKS 100 select PID_IN_CONTEXTIDR 101 help 102 This driver provides support for the ETM4.x tracer module, tracing the 103 instructions that a processor is executing. This is primarily useful 104 for instruction level tracing. Depending on the implemented version 105 data tracing may also be available. 106 107 To compile this driver as a module, choose M here: the 108 module will be called coresight-etm4x. 109 110config CORESIGHT_STM 111 tristate "CoreSight System Trace Macrocell driver" 112 depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64 113 select CORESIGHT_LINKS_AND_SINKS 114 select STM 115 help 116 This driver provides support for hardware assisted software 117 instrumentation based tracing. This is primarily used for 118 logging useful software events or data coming from various entities 119 in the system, possibly running different OSs 120 121 To compile this driver as a module, choose M here: the 122 module will be called coresight-stm. 123 124config CORESIGHT_CPU_DEBUG 125 tristate "CoreSight CPU Debug driver" 126 depends on ARM || ARM64 127 depends on DEBUG_FS 128 help 129 This driver provides support for coresight debugging module. This 130 is primarily used to dump sample-based profiling registers when 131 system triggers panic, the driver will parse context registers so 132 can quickly get to know program counter (PC), secure state, 133 exception level, etc. Before use debugging functionality, platform 134 needs to ensure the clock domain and power domain are enabled 135 properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst 136 for detailed description and the example for usage. 137 138 To compile this driver as a module, choose M here: the 139 module will be called coresight-cpu-debug. 140 141config CORESIGHT_CTI 142 tristate "CoreSight Cross Trigger Interface (CTI) driver" 143 depends on ARM || ARM64 144 help 145 This driver provides support for CoreSight CTI and CTM components. 146 These provide hardware triggering events between CoreSight trace 147 source and sink components. These can be used to halt trace or 148 inject events into the trace stream. CTI also provides a software 149 control to trigger the same halt events. This can provide fast trace 150 halt compared to disabling sources and sinks normally in driver 151 software. 152 153 To compile this driver as a module, choose M here: the 154 module will be called coresight-cti. 155 156config CORESIGHT_CTI_INTEGRATION_REGS 157 bool "Access CTI CoreSight Integration Registers" 158 depends on CORESIGHT_CTI 159 help 160 This option adds support for the CoreSight integration registers on 161 this device. The integration registers allow the exploration of the 162 CTI trigger connections between this and other devices.These 163 registers are not used in normal operation and can leave devices in 164 an inconsistent state. 165endif 166