1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Coresight configuration 4# 5menuconfig CORESIGHT 6 bool "CoreSight Tracing Support" 7 depends on ARM || ARM64 8 depends on OF || ACPI 9 select ARM_AMBA 10 select PERF_EVENTS 11 help 12 This framework provides a kernel interface for the CoreSight debug 13 and trace drivers to register themselves with. It's intended to build 14 a topological view of the CoreSight components based on a DT 15 specification and configure the right series of components when a 16 trace source gets enabled. 17 18if CORESIGHT 19config CORESIGHT_LINKS_AND_SINKS 20 tristate "CoreSight Link and Sink drivers" 21 help 22 This enables support for CoreSight link and sink drivers that are 23 responsible for transporting and collecting the trace data 24 respectively. Link and sinks are dynamically aggregated with a trace 25 entity at run time to form a complete trace path. 26 27 To compile these drivers as modules, choose M here: the 28 modules will be called coresight-funnel and coresight-replicator. 29 30config CORESIGHT_LINK_AND_SINK_TMC 31 tristate "Coresight generic TMC driver" 32 33 depends on CORESIGHT_LINKS_AND_SINKS 34 help 35 This enables support for the Trace Memory Controller driver. 36 Depending on its configuration the device can act as a link (embedded 37 trace router - ETR) or sink (embedded trace FIFO). The driver 38 complies with the generic implementation of the component without 39 special enhancement or added features. 40 41 To compile this driver as a module, choose M here: the 42 module will be called coresight-tmc. 43 44config CORESIGHT_CATU 45 bool "Coresight Address Translation Unit (CATU) driver" 46 depends on CORESIGHT_LINK_AND_SINK_TMC 47 help 48 Enable support for the Coresight Address Translation Unit (CATU). 49 CATU supports a scatter gather table of 4K pages, with forward/backward 50 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace 51 buffer by translating the addresses used by ETR to the physical address 52 by looking up the provided table. CATU can also be used in pass-through 53 mode where the address is not translated. 54 55config CORESIGHT_SINK_TPIU 56 tristate "Coresight generic TPIU driver" 57 depends on CORESIGHT_LINKS_AND_SINKS 58 help 59 This enables support for the Trace Port Interface Unit driver, 60 responsible for bridging the gap between the on-chip coresight 61 components and a trace for bridging the gap between the on-chip 62 coresight components and a trace port collection engine, typically 63 connected to an external host for use case capturing more traces than 64 the on-board coresight memory can handle. 65 66 To compile this driver as a module, choose M here: the 67 module will be called coresight-tpiu. 68 69config CORESIGHT_SINK_ETBV10 70 tristate "Coresight ETBv1.0 driver" 71 depends on CORESIGHT_LINKS_AND_SINKS 72 help 73 This enables support for the Embedded Trace Buffer version 1.0 driver 74 that complies with the generic implementation of the component without 75 special enhancement or added features. 76 77 To compile this driver as a module, choose M here: the 78 module will be called coresight-etb10. 79 80config CORESIGHT_SOURCE_ETM3X 81 tristate "CoreSight Embedded Trace Macrocell 3.x driver" 82 depends on !ARM64 83 select CORESIGHT_LINKS_AND_SINKS 84 help 85 This driver provides support for processor ETM3.x and PTM1.x modules, 86 which allows tracing the instructions that a processor is executing 87 This is primarily useful for instruction level tracing. Depending 88 the ETM version data tracing may also be available. 89 90 To compile this driver as a module, choose M here: the 91 module will be called coresight-etm3x. 92 93config CORESIGHT_SOURCE_ETM4X 94 tristate "CoreSight Embedded Trace Macrocell 4.x driver" 95 depends on ARM64 96 select CORESIGHT_LINKS_AND_SINKS 97 select PID_IN_CONTEXTIDR 98 help 99 This driver provides support for the ETM4.x tracer module, tracing the 100 instructions that a processor is executing. This is primarily useful 101 for instruction level tracing. Depending on the implemented version 102 data tracing may also be available. 103 104 To compile this driver as a module, choose M here: the 105 module will be called coresight-etm4x. 106 107config CORESIGHT_STM 108 tristate "CoreSight System Trace Macrocell driver" 109 depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64 110 select CORESIGHT_LINKS_AND_SINKS 111 select STM 112 help 113 This driver provides support for hardware assisted software 114 instrumentation based tracing. This is primarily used for 115 logging useful software events or data coming from various entities 116 in the system, possibly running different OSs 117 118 To compile this driver as a module, choose M here: the 119 module will be called coresight-stm. 120 121config CORESIGHT_CPU_DEBUG 122 tristate "CoreSight CPU Debug driver" 123 depends on ARM || ARM64 124 depends on DEBUG_FS 125 help 126 This driver provides support for coresight debugging module. This 127 is primarily used to dump sample-based profiling registers when 128 system triggers panic, the driver will parse context registers so 129 can quickly get to know program counter (PC), secure state, 130 exception level, etc. Before use debugging functionality, platform 131 needs to ensure the clock domain and power domain are enabled 132 properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst 133 for detailed description and the example for usage. 134 135 To compile this driver as a module, choose M here: the 136 module will be called coresight-cpu-debug. 137 138config CORESIGHT_CTI 139 tristate "CoreSight Cross Trigger Interface (CTI) driver" 140 depends on ARM || ARM64 141 help 142 This driver provides support for CoreSight CTI and CTM components. 143 These provide hardware triggering events between CoreSight trace 144 source and sink components. These can be used to halt trace or 145 inject events into the trace stream. CTI also provides a software 146 control to trigger the same halt events. This can provide fast trace 147 halt compared to disabling sources and sinks normally in driver 148 software. 149 150 To compile this driver as a module, choose M here: the 151 module will be called coresight-cti. 152 153config CORESIGHT_CTI_INTEGRATION_REGS 154 bool "Access CTI CoreSight Integration Registers" 155 depends on CORESIGHT_CTI 156 help 157 This option adds support for the CoreSight integration registers on 158 this device. The integration registers allow the exploration of the 159 CTI trigger connections between this and other devices.These 160 registers are not used in normal operation and can leave devices in 161 an inconsistent state. 162endif 163